PSMN1R5-30YLC [NXP]
100A, 30V, 0.00205ohm, N-CHANNEL, Si, POWER, MOSFET, MO-235, PLASTIC, POWER-SO8, LFPAK-4;
| 型号： | PSMN1R5-30YLC |
| 厂家： | 
NXP |
| 描述： | 100A, 30V, 0.00205ohm, N-CHANNEL, Si, POWER, MOSFET, MO-235, PLASTIC, POWER-SO8, LFPAK-4 晶体 晶体管 功率场效应晶体管 开关 脉冲 |
| 文件： | 总15页 (文件大小：400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Rev. 01 — 9 April 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
Advanced TrenchMOS provides low
Improved mechanical and thermal
RDSon and low gate charge
characteristics
High efficiency gains in switching
LFPAK provides maximum power
power convertors
density in a Power SO8 package
1.3 Applications
DC-to-DC converters
Lithium-ion battery protection
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Symbol
VDS
Quick reference data
Parameter
Conditions
Min Typ Max Unit
drain-source
voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
-
-
-
30
V
[1]
ID
drain current
Tmb = 25 °C; VGS = 10 V; see
Figure 1
-
100
109
A
Ptot
Tj
total power
dissipation
Tmb = 25 °C; see Figure 2
-
W
junction
-55
175 °C
temperature
Static characteristics
RDSon drain-source
VGS = 10 V; ID = 15 A;
Tj = 100 °C; see Figure 14
-
-
-
2.4
1.5
mΩ
on-state
resistance
VGS = 10 V; ID = 15 A;
1.3
mΩ
Tj = 25 °C
Dynamic characteristics
QGD gate-drain charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 15; see
Figure 16
-
8.7
-
nC
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Table 1.
Quick reference data …continued
Parameter Conditions
Symbol
Min Typ Max Unit
QG(tot)
total gate charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 15
-
36.2
-
nC
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
V
GS = 10 V; Tj(init) = 25 °C;
ID = 100 A; Vsup ≤ 30 V;
GS = 50 Ω; unclamped
-
-
241 mJ
R
[1] Continuous current is limited by package.
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
S
S
S
G
D
source
source
source
gate
mb
D
S
2
3
G
4
mbb076
mb
mounting base; connected to
drain
1
2 3 4
SOT669 (LFPAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PSMN1R5-30YL
LFPAK
plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
2 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Typ
Max
30
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
-
-
-
-
-
-
VDGR
VGS
-
30
V
-20
20
V
[1]
[1]
ID
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
-
-
-
100
100
790
A
A
IDM
peak drain current
tp ≤ 10 µs; pulsed; Tmb = 25 °C;
A
see Figure 4
Ptot
Tstg
Tj
total power dissipation Tmb = 25 °C; see Figure 2
storage temperature
-
-
-
-
109
175
175
W
-55
-55
°C
°C
junction temperature
Source-drain diode
[1]
IS
source current
peak source current
Tmb = 25 °C
-
-
-
-
100
790
A
A
ISM
tp ≤ 10 µs; pulsed; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)R repetitive drain-source see Figure 3
[2][3][4]
-
-
-
-
-
J
avalanche energy
EDS(AL)S
non-repetitive
drain-source
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A;
Vsup ≤ 30 V; RGS = 50 Ω; unclamped
241
mJ
avalanche energy
[1] Continuous current is limited by package.
[2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[3] Repetitive avalanche rating limited by average junction temperature of 170 °C.
[4] Refer to application note AN10273 for further information.
PSMN1R5-30YL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
3 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
03aa16
003aac446
120
120
I
D
(A)
100
(1)
P
(%)
der
80
80
60
40
20
0
40
0
0
50
100
150
200
0
50
100
150
200
(°C)
T
(°C)
T
mb
mb
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aac266
103
IAL
(A)
102
10
(1)
(2)
(3)
1
10-1
10-3
10-2
10-1
1
10
AL (ms)
t
Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
4 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aad111
104
ID
(A)
Limit RDSon = VDS / ID
103
102
10
1
10 μs
(1)
100 μs
1 ms
DC
10 ms
100 ms
10-1
1
10
102
VDS (V)
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance
from junction to
mounting base
see Figure 5
-
0.5
1.1
K/W
003aac456
10
Zth(j-mb)
(K/W)
1
10-1
10-2
10-3
δ = 0.5
0.2
0.1
0.05
t
p
P
δ =
T
0.02
single shot
t
t
p
T
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
5 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
6. Characteristics
Table 6.
Characteristics
Tested to JEDEC standards where applicable.
Symbol
Static characteristics
V(BR)DSS drain-source
breakdown voltage
Parameter
Conditions
Min
Typ
Max
Unit
ID = 20 A; VGS = 0 V; Tj = 25 °C; tav
100 ns
=
35
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
30
27
1.3
-
-
V
V
V
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
1.7
2.15
voltage
see Figure 12; see Figure 13
ID = 1 mA; VDS = VGS; Tj = 150 °C;
see Figure 13
0.65
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 13
2.45
IDSS
drain leakage current
gate leakage current
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
VGS = 16 V; VDS = 0 V; Tj = 25 °C
VGS = -16 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
-
-
-
-
-
-
-
1
µA
µA
nA
-
100
100
100
1.9
2.8
IGSS
-
-
nA
RDSon
drain-source on-state
resistance
1.8
-
mΩ
mΩ
VGS = 10 V; ID = 15 A; Tj = 150 °C;
see Figure 14
VGS = 10 V; ID = 15 A; Tj = 100 °C;
-
-
2.4
mΩ
see Figure 14
VGS = 10 V; ID = 15 A; Tj = 25 °C
f = 1 MHz
-
-
1.3
1.5
1.5
mΩ
RG
gate resistance
0.77
Ω
Dynamic characteristics
QG(tot)
total gate charge
ID = 10 A; VDS = 12 V; VGS = 10 V;
see Figure 15; see Figure 16
-
77.9
-
nC
ID = 0 A; VDS = 0 V; VGS = 10 V
-
-
70
-
-
nC
nC
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15
36.2
QGS
gate-source charge
ID = 10 A; VDS = 12 V; VGS = 4.5 V;
see Figure 15; see Figure 16
-
-
11.6
8
-
-
nC
nC
QGS(th)
pre-threshold
gate-source charge
QGS(th-pl)
post-threshold
-
3.6
-
nC
gate-source charge
QGD
gate-drain charge
-
-
8.7
-
-
nC
V
VGS(pl)
gate-source plateau
voltage
VDS = 12 V; see Figure 15;
see Figure 16
2.34
Ciss
Coss
Crss
input capacitance
output capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 17
-
-
-
5057
1082
398
-
-
-
pF
pF
pF
reverse transfer
capacitance
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
6 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Table 6.
Characteristics …continued
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
46
Max
Unit
ns
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 12 V; RL = 0.5 Ω; VGS = 4.5 V;
RG(ext) = 4.7 Ω
-
-
-
-
-
-
-
-
72
ns
turn-off delay time
fall time
76
ns
34
ns
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 18
-
0.78
1.2
V
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
-
45
56
-
-
ns
VDS = 20 V
Qr
recovered charge
nC
003aac449
003aac450
300
ID
5
4
RDSon
(A)
250
10
3.6
(mΩ)
VGS (V) = 3.2
4
3
2
1
3.4
VGS (V) = 3.4
200
150
100
50
3
3.6
4
2.8
2.6
7
2.4
2.2
10
0
0
2
4
6
8
10
0
50
100
150
200
250
ID (A)
VDS (V)
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
7 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aac452
003aac455
200
8000
Ciss
C
(pF)
gfs
(S)
150
100
50
6000
4000
Crss
2000
0
0
0
20
40
60
80
2
4
6
8
10
ID (A)
V
GS (V)
Fig 8. Forward transconductance as a function of
drain current; typical values
Fig 9. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
003aac451
003aad113
3.0
80
ID
RDSon
(A)
(mΩ)
2.5
2.0
1.5
1.0
60
40
Tj = 175 °C
Tj = 25 °C
20
0
2
4
6
8
10
0
1
2
3
4
VGS (V)
VGS (V)
Fig 10. Drain-source on-state resistance as a function
of gate-source voltage; typical values
Fig 11. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
8 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aab271
003aac982
10-1
ID
3
(A)
10-2
VGS(th)
(V)
max
min
typ
max
2
10-3
typ
min
10-4
10-5
10-6
1
0
-60
0
1
2
V
GS (V)
3
0
60
120
180
Tj (°C)
Fig 12. Sub-threshold drain current as a function of
gate-source voltage
Fig 13. Gate-source threshold voltage as a function of
junction temperature
03aa27
2
V
DS
a
I
D
1.5
V
GS(pl)
V
GS(th)
GS
1
0.5
0
V
Q
Q
GS1
GS2
Q
Q
GD
GS
Q
G(tot)
003aaa508
−60
0
60
120
180
T ( C)
°
j
Fig 14. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig 15. Gate charge waveform definitions
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
9 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aac448
003aac454
10
VGS
(V)
6000
Ciss
C
(pF)
8
Coss
4000
6
VDS = 12 (V)
VDS = 19 (V)
4
2000
Crss
2
0
0
10-1
1
10
102
0
20
40
60
80
VDS (V)
Q
G (nC)
Fig 16. Gate-source voltage as a function of gate
charge; typical values
Fig 17. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aac447
100
IS
(A)
80
60
40
20
0
Tj = 150 °C
25 °C
0.0
0.2
0.4
0.6
0.8
1.0
SD (V)
V
Fig 18. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN1R5-30YL
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Product data sheet
Rev. 01 — 9 April 2010
10 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
7. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads
SOT669
A
2
E
A
C
c
E
b
b
2
1
2
L
3
1
mounting
base
b
4
D
1
D
H
L
2
1
2
3
4
X
e
w
M
c
A
b
1/2 e
A
(A )
3
C
A
1
θ
L
detail X
y
C
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
(1)
D
(1)
(1)
1
A
A
A
H
L
L
L
2
w
y
θ
UNIT
A
b
b
b
b
c
c
E
E
1
e
1
2
3
1
2
3
4
2
max
1.20 0.15 1.10
1.01 0.00 0.95
0.50 4.41 2.2 0.9 0.25 0.30 4.10
0.35 3.62 2.0 0.7 0.19 0.24 3.80
5.0 3.3
4.8 3.1
6.2 0.85 1.3 1.3
5.8 0.40 0.8 0.8
8°
0°
mm
0.25
4.20
1.27
0.25 0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
04-10-13
06-03-16
SOT669
MO-235
Fig 19. Package outline SOT669 (LFPAK)
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
11 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN1R5-30YL_1
20100409
Product data sheet
-
-
PSMN1R5-30YL
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
12 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
9. Legal information
9.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
9.2 Definitions
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in the
Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
PSMN1R5-30YL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
13 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
non-automotive qualified products in automotive equipment or applications.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN1R5-30YL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 9 April 2010
14 of 15
PSMN1R5-30YL
NXP Semiconductors
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 April 2010
Document identifier: PSMN1R5-30YL
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