PHD34NQ10T,118 [NXP]

N-channel TrenchMOS standard level FET DPAK 3-Pin;


型号：	PHD34NQ10T,118
厂家：	NXP
描述：	N-channel TrenchMOS standard level FET DPAK 3-Pin 开关脉冲晶体管
文件：	总13页 (文件大小：284K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Important notice

Dear Customer,

On 7 February 2017 the former NXP Standard Product business became a new company with the

tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS

semiconductors with its focus on the automotive, industrial, computing, consumer and wearable

application markets

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use

the references to Nexperia, as shown below.

Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,

use http://www.nexperia.com

Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use

salesaddresses@nexperia.com (email)

Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on

the version, as shown below:

reserved

Should be replaced with:

If you have any questions related to the data sheet, please contact our nearest sales office via e-mail

or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and

understanding,

Kind regards,

Team Nexperia

PHD34NQ10T

N-channel TrenchMOS standard level FET

Rev. 03 — 14 December 2010

Product data sheet

1. Product profile

1.1 General description

Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic

package using TrenchMOS technology. This product is designed and qualified for use in

computing, communications, consumer and industrial applications only.

1.2 Features and benefits

Higher operating power due to low

Suitable for high frequency

applications due to fast switching

characteristics

thermal resistance

Low conduction losses due to low

on-state resistance

1.3 Applications

DC-to-DC converters

Switched-mode power supplies

1.4 Quick reference data

Table 1.

Symbol

V_DS

Quick reference data

Parameter

Conditions

Min Typ Max Unit

drain-source voltage

drain current

T_j≥ 25 °C; T_j≤ 175 °C

T_mb= 25 °C; V_GS= 10 V

T_mb= 25 °C

100

I_D

P_tot

total power dissipation

136

Static characteristics

R_DSondrain-source on-state

resistance

Dynamic characteristics

Q_GDgate-drain charge

V_GS= 10 V; I_D= 17 A;

T_j= 25 °C

mΩ

V_GS= 10 V; I_D= 34 A;

V_DS= 80 V; T_j= 25 °C

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

2. Pinning information

Table 2.

Pinning information

Symbol Description

Simplified outline

Graphic symbol

gate

drain^[1]

source

mounting base; connected to drain

mbb076

SOT428 (DPAK)

[1] It is not possible to make connection to pin 2.

3. Ordering information

Table 3.

Ordering information

Type number

Package

Name

Description

Version

PHD34NQ10T

DPAK

plastic single-ended surface-mounted package (DPAK); 3 leads SOT428

(one lead cropped)

4. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DS

Parameter

Conditions

Min

Max

100

Unit

drain-source voltage

drain-gate voltage

gate-source voltage

drain current

T_j≥ 25 °C; T_j≤ 175 °C

T_j≥ 25 °C; T_j≤ 175 °C; R_GS= 20 kΩ

V_DGR

V_GS

-20

I_D

V_GS= 10 V; T_mb= 25 °C

V_GS= 10 V; T_mb= 100 °C

pulsed; T_mb= 25 °C

T_mb= 25 °C

I_DM

P_tot

T_stg

T_j

peak drain current

140

136

175

total power dissipation

storage temperature

junction temperature

°C

-55

Source-drain diode

I_S

source current

peak source current

T_mb= 25 °C

I_SM

pulsed; T_mb= 25 °C

140

Avalanche ruggedness

E_DS(AL)S

non-repetitive drain-source avalanche V_GS= 10 V; T_j(init)= 25 °C; I_D= 26 A;

170

energy

V_sup≤ 25 V; unclamped; t_p= 100 µs;

R_GS= 50 Ω

I_AS

non-repetitive avalanche current

V_sup≤ 25 V; V_GS= 10 V;

T_j(init)= 25 °C; R_GS= 50 Ω; unclamped

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

2 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

003aae599

003aae600

100

der

(%)

100

150

200

100

150

200

(°C)

Fig 1. Normalized total power dissipation as a

function of mounting base temperature

Fig 2. Normalized continuous drain current as a

function of mounting base temperature

003aae601

003aae613

(A)

DS(on)

= V / I

(A)

25 °C

tp = 10 μs

100 μs

T prior to avalanche = 150 °C

1 ms

10 ms

100 ms

−3

−2

−1

(V)

(ms)

T_mb= 25 °C; I_DMis single pulse

unclamped inductive load

Fig 3. Safe operating area; continuous and peak drain

currents as a function of drain-source voltage

Fig 4. Single-shot avalanche rating; avalanche

current as a function of avalanche period

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

3 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

5. Thermal characteristics

Table 5.

Symbol

R_th(j-mb)

Thermal characteristics

Parameter

Conditions

Min

Typ

Max

Unit

thermal resistance from junction to

mounting base

1.1

K/W

R_th(j-a)

thermal resistance from junction to

ambient

mounted on printed-circuit

board ; minimum footprint

K/W

003aae602

th(j-mb)

(K/W)

δ = 0.5

0.2

0.1

0.05

0.02

−1

−2

−3

δ =

single pulse

−6

−5

−4

−3

−2

−1

(s)

Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

4 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

6. Characteristics

Table 6.

Symbol

Characteristics

Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V_(BR)DSSdrain-source breakdown

I_D= 0.25 mA; V_GS= 0 V; T_j= -55 °C

I_D= 0.25 mA; V_GS= 0 V; T_j= 25 °C

I_D= 1 mA; V_DS= V_GS; T_j= -55 °C

I_D= 1 mA; V_DS= V_GS; T_j= 175 °C

I_D= 1 mA; V_DS= V_GS; T_j= 25 °C

V_DS= 100 V; V_GS= 0 V; T_j= 175 °C

V_DS= 100 V; V_GS= 0 V; T_j= 25 °C

V_GS= 10 V; V_DS= 0 V; T_j= 25 °C

V_GS= -10 V; V_DS= 0 V; T_j= 25 °C

V_GS= 10 V; I_D= 17 A; T_j= 175 °C

V_GS= 10 V; I_D= 17 A; T_j= 25 °C

voltage

100

V_GS(th)

gate-source threshold

voltage

4.4

I_DSS

drain leakage current

gate leakage current

500

100

108

µA

mΩ

0.05

I_GSS

R_DSon

drain-source on-state

resistance

Dynamic characteristics

Q_G(tot)

Q_GS

Q_GD

C_iss

C_oss

C_rss

t_d(on)

t_r

total gate charge

I_D= 34 A; V_DS= 80 V; V_GS= 10 V;

T_j= 25 °C

gate-source charge

gate-drain charge

input capacitance

output capacitance

reverse transfer capacitance

turn-on delay time

rise time

V_DS= 25 V; V_GS= 0 V; f = 1 MHz;

T_j= 25 °C

1704

227

140

V_DS= 50 V; R_L= 1.5 Ω; V_GS= 10 V;

R_G(ext)= 5.6 Ω; T_j= 25 °C

t_d(off)

t_f

turn-off delay time

fall time

L_D

internal drain inductance

measured from mounting base to

centre of die ; T_j= 25 °C

3.5

L_S

internal source inductance

measured from source lead to source

bond pad ; T_j= 25 °C

7.5

Source-drain diode

V_SD

t_rr

source-drain voltage

I_S= 17 A; V_GS= 0 V; T_j= 25 °C

I_S= 17 A; dI_S/dt = -100 A/µs;

0.85

1.2

reverse recovery time

recovered charge

µC

V_GS= 0 V; V_DS= 25 V; T_j= 25 °C

Q_r

0.24

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

5 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

003aae603

003aae604

0.1

DS(on)

(Ω)

4.8 5

5.2 5.4

(V) = 10

(A)

0.08

0.06

0.04

0.02

5.4

5.2

(V) = 10

4.8

4.6

4.4

0.4

0.8

1.2

1.6

(V)

I (A)

T_j= 25 °C

Fig 6. Output characteristics: drain current as a

function of drain-source voltage; typical values

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values

003aae605

003aae606

T = 25 °C

(S)

(A)

T = 25 °C

T = 175 °C

(V)

I (A)

V_DS> I_Dx R_DSon

Fig 8. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

Fig 9. Forward transconductance as a function of

drain current; typical values

003aae607

003aae608

2.9

GS(th)

(V)

maximum

2.1

typical

minimum

1.3

0.5

−60

100

180

−60

100

180

T (°C)

I_D= 1 mA; V_DS= V_GS

Fig 10. Normalized drain-source on-state resistance

factor as a function of junction temperature

Fig 11. Gate-source threshold voltage as a function of

junction temperature

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

6 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

003aae609

003aae610

−1

(pF)

(A)

−2

−3

−4

−5

−6

iss

oss

minimum

typical

maximum

rss

−1

(V)

T_j= 25 °C; V_DS= V_GS

V_GS= 0 V; f = 1 MHz

Fig 12. Sub-threshold drain current as a function of

gate-source voltage

Fig 13. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

003aae611

003aae612

(V)

(A)

= 20 V

= 80 V

T = 175 °C

T = 25 °C

0.4

0.8

1.2

(nC)

(V)

SDS

T_j= 25 °C; I_D= 34 A

V_GS= 0 V

Fig 14. Gate-source voltage as a function of gate

charge; typical values

Fig 15. Source (diode forward) current as a function of

source-drain (diode forward) voltage; typical

values

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

7 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

7. Package outline

Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)

SOT428

mounting

base

10 mm

scale

DIMENSIONS (mm are the original dimensions)

max

min

UNIT

2.38

2.22

0.93

0.46

0.89

0.71

1.1

0.9

5.46

5.00

0.56

0.20

6.22

5.98

6.73

6.47

10.4

9.6

2.95

2.55

0.9

0.5

4.0

4.45

0.5

2.285 4.57

0.2

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

06-02-14

06-03-16

SOT428

SC-63

TO-252

Fig 16. Package outline SOT428 (DPAK)

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

8 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

8. Revision history

Table 7.

Revision history

Document ID

PHD34NQ10T v.3

Modifications:

Release date

Data sheet status

Change notice Supersedes

20101214

Product data sheet

PHB_PHD_PHP34NQ10T v.2

• The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Type number PHD34NQ10T separated from data sheet PHB_PHD_PHP34NQ10T v.2.

PHB_PHD_PHP34NQ10T v.2 20031101

Product data sheet

PHB_PHD_PHP34NQ10T v.1

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

9 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

9. Legal information

9.1 Data sheet status

Document status^[1][2]

Product status^[3]

Definition

Objective [short] data sheet

Development

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term 'short data sheet' is explained in section "Definitions".

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

Suitability for use — NXP Semiconductors products are not designed,

9.2 Definitions

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

9.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

10 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may

be subject to export control regulations. Export might require a prior

authorization from national authorities.

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,

FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,

ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,

QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,

TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

non-automotive qualified products in automotive equipment or applications.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

10. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

PHD34NQ10T

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 03 — 14 December 2010

11 of 12

PHD34NQ10T

NXP Semiconductors

N-channel TrenchMOS standard level FET

11. Contents

Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1

1.2

1.3

1.4

General description . . . . . . . . . . . . . . . . . . . . . .1

Features and benefits. . . . . . . . . . . . . . . . . . . . .1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

Quick reference data . . . . . . . . . . . . . . . . . . . . .1

Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

Ordering information. . . . . . . . . . . . . . . . . . . . . .2

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2

Thermal characteristics . . . . . . . . . . . . . . . . . . .4

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5

Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .8

Revision history. . . . . . . . . . . . . . . . . . . . . . . . . .9

Legal information. . . . . . . . . . . . . . . . . . . . . . . .10

Data sheet status . . . . . . . . . . . . . . . . . . . . . . .10

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .11

9.1

9.2

9.3

9.4

Contact information. . . . . . . . . . . . . . . . . . . . . .11

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 14 December 2010

Document identifier: PHD34NQ10T

PHD34NQ10T,118 [NXP]

相关型号：

PHD36N03LT

PHD37N06LT

PHD37N06LT,118

PHD37N06LT/T3

PHD38999/20

PHD38999/20FB2PB

PHD38999/20FB2PC

PHD38999/20FB2PD

PHD38999/20FB2PE

PHD38999/20FB2PN

PHD38999/20FB2SA

PHD38999/20FB2SC