PHB220N03MT [NXP]

TRANSISTOR 75 A, 25 V, 0.0037 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3, FET General Purpose Power;
PHB220N03MT
型号: PHB220N03MT
厂家: NXP    NXP
描述:

TRANSISTOR 75 A, 25 V, 0.0037 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3, FET General Purpose Power

文件: 总13页 (文件大小:289K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PHP220N03MT;  
PHB220N03MT  
N-channel enhancement mode field-effect transistor  
Rev. 01 — 19 September 2001  
Product data  
1. Description  
N-channel logic level field-effect power transistor in a plastic package using  
TrenchMOS™1 technology.  
Product availability:  
PHP220N03MT in SOT78 (TO-220AB)  
PHB220N03MT in SOT404 (D2-PAK).  
2. Features  
Low on-state resistance  
Fast switching.  
3. Applications  
High frequency computer motherboard DC to DC converters  
OR-ing applications.  
4. Pinning information  
Table 1:  
Pinning - SOT78 and SOT404, simplified outline and symbol  
Pin  
1
Description  
gate (g)  
Simplified outline  
Symbol  
d
s
mb  
mb  
[1]  
2
drain (d)  
3
source (s)  
drain (d)  
g
mb  
MBB076  
2
1
3
MBK116  
MBK106  
1
2 3  
SOT404 (D2-PAK)  
SOT78 (TO-220AB)  
[1] It is not possible to make connection to pin 2 of the SOT404 package.  
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
5. Quick reference data  
Table 2:  
Quick reference data  
Symbol Parameter  
Conditions  
Typ  
Max  
25  
Unit  
V
VDS  
ID  
drain-source voltage (DC)  
Tj = 25 to 175 °C  
Tmb = 25 °C; VGS = 5 V  
Tmb = 25 °C  
drain current (DC)  
75  
A
Ptot  
Tj  
total power dissipation  
junction temperature  
230  
175  
2.7  
3.7  
W
°C  
mΩ  
mΩ  
RDSon  
drain-source on-state resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C  
VGS = 5 V; ID = 25 A; Tj = 25 °C  
2.3  
3
6. Limiting values  
Table 3:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
25  
Unit  
V
VDS  
drain-source voltage (DC)  
Tj = 25 to 175 °C  
VDGR  
VGS  
drain-gate voltage (DC)  
gate-source voltage (DC)  
gate-source voltage  
Tj = 25 to 175 °C; RGS = 20 kΩ  
25  
V
±20  
±25  
V
VGSM  
tp 50 µs; pulsed;  
V
duty cycle 25%; Tj 150 °C  
ID  
drain current (DC)  
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3  
Tmb = 100 °C; VGS = 10 V; Figure 2  
Tmb = 25 °C; pulsed; tp 10 µs; Figure 3  
Tmb = 25 °C; Figure 1  
75  
A
75  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
400  
230  
+175  
+175  
A
total power dissipation  
storage temperature  
W
°C  
°C  
55  
55  
operating junction temperature  
Source-drain diode  
IS  
source (diode forward) current (DC) Tmb = 25 °C  
75  
A
A
ISM  
peak source (diode forward) current Tmb = 25 °C; pulsed; tp 10 µs  
400  
Avalanche ruggedness  
EAS non-repetitive avalanche energy  
unclamped inductive load;  
ID = 75 A; tp = 0.1 ms; VDD = 15 V;  
RGS = 50 ; VGS = 10V; starting Tj = 25 °C  
500  
75  
mJ  
A
IAS  
non-repetitive avalanche current  
unclamped inductive load;  
VDD = 15 V; RGS = 50 ; VGS = 10V;  
starting Tj = 25 °C  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
2 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03af36  
120  
120  
der  
I
(%)  
100  
P
der  
(%)  
80  
80  
60  
40  
20  
0
40  
0
0
50  
100  
150  
200  
(oC)  
0
30  
60  
90  
120  
150  
T
180  
(ºC)  
T
mb  
mb  
Ptot  
ID  
Pder  
=
× 100%  
Ider  
=
× 100%  
-----------------------  
-------------------  
P
I
°
°
tot(25 C)  
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
03af98  
3
10  
R
= V / I  
DS  
DSon  
D
t
= 10 µs  
100 µs  
1 ms  
I
p
D
(A)  
2
10  
DC  
10 ms  
t
p
P
δ =  
T
100 ms  
10  
t
t
p
T
1
2
10  
1
10  
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
3 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
7. Thermal characteristics  
Table 4:  
Thermal characteristics  
Symbol Parameter  
Conditions  
Value Unit  
Rth(j-mb) thermal resistance from junction to mounting  
base  
Figure 4  
0.65  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
vertical in still air; SOT78 package  
60  
50  
K/W  
K/W  
mounted on a printed circuit board; minimum  
footprint; SOT404 package  
7.1 Transient thermal impedance  
03af37  
1
Z
th(j-mb)  
(K/W)  
δ = 0.5  
0.2  
-1  
10  
0.1  
0.05  
t
p
P
δ
=
T
0.02  
-2  
10  
t
t
p
T
single pulse  
-3  
10  
-6  
10  
-5  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
10  
1
10  
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
4 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
8. Characteristics  
Table 5:  
Characteristics  
Tj = 25 °C unless otherwise specified  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source breakdown voltage  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
25  
22  
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage  
drain-source leakage current  
ID = 1 mA; VDS = VGS; Figure 9  
Tj = 25 °C  
1
2
3
V
V
V
Tj = 175 °C  
0.4  
Tj = 55 °C  
3.4  
IDSS  
VDS = 25 V; VGS = 0 V  
Tj = 25 °C  
0.02  
1
µA  
µA  
nA  
Tj = 175 °C  
500  
100  
IGSS  
gate-source leakage current  
VGS = ±20 V; VDS = 0 V  
10  
RDSon  
drain-source on-state resistance  
VGS = 10V; ID = 25 A;  
Figure 7 and 8  
Tj = 25 °C  
2.3  
4.1  
2.7  
4.9  
mΩ  
mΩ  
Tj = 175 °C  
VGS = 5 V; ID = 25 A; Figure 7 and 8  
Tj = 25 °C  
3
3.7  
mΩ  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
ID = 75 A; VDD = 15 V; VGS = 10 V;  
Figure 13  
200  
45  
nC  
nC  
nC  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
60  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Figure 11  
9250  
2350  
1550  
36  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
turn-on rise time  
VDD = 15 V; ID = 12 A; VGS = 10 V;  
RG = 6 ; resistive load  
78  
td(off)  
tf  
turn-off delay time  
turn-off fall time  
236  
150  
Source-drain diode  
VSD  
source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12  
0.85  
1.2  
V
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
5 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03af99  
03ag01  
400  
100  
I
I
D
T = 25 ºC  
j
D
7 V  
V
> I x R  
D
DS  
DSon  
350  
300  
250  
200  
150  
100  
50  
(A)  
(A)  
10 V  
20 V  
80  
60  
40  
20  
0
6 V 5.2 V  
Vgs = 5 V  
175 ºC  
4.8 V  
T = 25 ºC  
j
4.6 V  
4.4 V  
4.2 V  
4 V  
3.8V  
3.6V  
0
0
1
2
3
4
5
V
6
(V)  
0
0.4  
0.8  
1.2  
1.6  
2
2.4  
(V)  
V
GS  
DS  
Tj = 25 °C  
Tj = 25 °C and 175 °C; VDS ID x RDSon  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
03af18  
03ag00  
2
0.006  
R
DSon  
a
4 V 4.2 V 4.4 V 4.6 V 4.8 V  
5 V  
()  
0.005  
1.6  
0.004  
0.003  
0.002  
0.001  
0
1.2  
0.8  
0.4  
0
5.2 V  
6 V  
10 V  
V
= 20 V  
GS  
Tj = 25 ºC  
-60  
0
60  
120  
180  
0
50  
100  
150  
200  
250  
300  
I
350  
(A)  
T (ºC)  
j
D
Tj = 25 °C  
RDSon  
a =  
----------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
6 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03af66  
03af65  
1
4
I
D
V
GS(th)  
(V)  
(A)  
-1  
10  
3
2
1
0
max  
-2  
10  
min  
typ  
max  
-3  
-4  
-5  
-6  
typ  
10  
10  
10  
10  
min  
0
1
2
3
4
-60  
-20  
20  
60  
100  
140  
180  
V
(V)  
T (ºC)  
GS  
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03ag03  
5
10  
C
(pF)  
4
C
10  
iss  
C
oss  
C
3
rss  
10  
2
10  
-1  
2
10  
1
10  
10  
V
(V)  
DS  
VGS = 0 V; f = 1 MHz  
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
7 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03ag02  
03ag04  
100  
12  
I
S
I
= 75 A  
V
= 0 V  
D
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
GS  
(A)  
V
GS  
10  
8
(V)  
V
= 15 V  
DD  
175 ºC  
T = 25 ºC  
j
T = 25 ºC  
6
j
4
2
0
0.0  
0.5  
1.0  
1.5  
0
50  
100  
150  
200  
Q
(nC)  
V
(V)  
G
SD  
Tj = 25 °C and 175 °C; VGS = 0 V  
ID = 75 A; VDD = 15 V  
Fig 12. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 13. Gate-source voltage as a function of gate  
charge; typical values.  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
8 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
9. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
L
1
A
c
UNIT  
p
q
Q
1
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.7  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
SC-46  
00-09-07  
01-02-16  
SOT78  
3-lead TO-220AB  
Fig 14. SOT78 (TO-220AB).  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
9 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
2
Plastic single-ended surface mounted package (Philips version of D -PAK); 3 leads  
(one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
99-06-25  
01-02-12  
SOT404  
Fig 15. SOT404 (D2-PAK)  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
10 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
10. Revision history  
Table 6:  
Revision history  
CPCN  
Rev Date  
Description  
01 20010919  
Product Data; Initial Version  
9397 750 08317  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
Product data  
Rev. 01 — 19 September 2001  
11 of 13  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
11. Data sheet status  
Data sheet status[1]  
Product status[2]  
Definition  
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips Semiconductors  
reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published at a  
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to  
improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to  
make changes at any time in order to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change Notification (CPCN) procedure  
SNW-SQ-650A.  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
12. Definitions  
13. Disclaimers  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes, without notice, in the products, including circuits, standard  
cells, and/or software, described or contained herein in order to improve  
design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.  
12 of 13  
9397 750 08317  
Product data  
Rev. 01 — 19 September 2001  
PHP220N03MT series  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
Contents  
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
2
3
4
5
6
7
7.1  
8
9
10  
11  
12  
13  
© Koninklijke Philips Electronics N.V. 2001.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 19 September 2001  
Document order number: 9397 750 08317  

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NXP

PHB23NQ15T/T3

23A, 150V, 0.09ohm, N-CHANNEL, Si, POWER, MOSFET
NXP

PHB24N03LT

TrenchMOS transistor Logic level FET
NXP

PHB24N03LTT/R

TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 24A I(D) | SOT-404
ETC

PHB24N03T

TrenchMOS transistor Standard level FET
NXP

PHB24N03T/T3

TRANSISTOR 24 A, 30 V, 0.056 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC PACKAGE-3, FET General Purpose Power
NXP

PHB24N03TT/R

TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 24A I(D) | SOT-404
ETC

PHB27NQ10T

N-channel TrenchMOS transistor
NXP