MCZ33905CD3EK [NXP]
System Basis Chip, 2 LIN, 2x 3.3 V/400mA LDOs, 2/3/4 wakeup, SOIC 32, Rail;型号: | MCZ33905CD3EK |
厂家: | NXP |
描述: | System Basis Chip, 2 LIN, 2x 3.3 V/400mA LDOs, 2/3/4 wakeup, SOIC 32, Rail |
文件: | 总8页 (文件大小:278K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Analog, Mixed-Signal and Power Management
MC33903/4/5
System Basis Chip Gen2 with High Speed CAN and
LIN Interface
Overview
The MC33903/4/5 is the second generation
family of System Basis Chips, which combine
several features and enhance present module
designs. The device works as an advanced
MC33903/4/5 Block Diagram
MCU Voltage Regulator (VDD)
power management unit for the MCU and
additional integrated circuits such as sensors
Internal CAN Regulator (VCAN
)
and CAN transceivers. It has a built-in enhanced
high speed CAN interface (ISO11898-2 and -5),
with local and bus failure diagnostics, protection,
and fail safe operation mode. The SBC may
include one or two LIN 2.1/J2602-2 interfaces
with LIN master terminal outputs. It includes
wake-up input pins than can also be configured
as output drivers for flexibility.
Legend
Low Power Modes
SPI Adv W/D
Secured State Machine
Flexible (I/O)
33903
33903S
33903D
33904
This device implements multiple Low Power
modes with very low-current consumption. In
addition, the device is part of a family concept
where pin compatibility, among the various
devices with and without LIN interfaces, adds
versatility to module design.
CAN High Speed
Power Sharing (VDD BALLAST)
33905S
33905D
Ballast Regulator (VAUX
LIN 1
)
The MC33903/4/5 also implements an
innovative and advanced fail-safe state machine
and concept solution. This family of devices are
supported by an enablement ecosystem that
includes an evaluation board, software interface,
EMC/ESD conformance reports and training
material that allows a faster time to market and
eases your designs.
LIN 2
Power Management Scalability
• MCU power supply (VDD): 5.0 or 3.3 V /
150 mA (power split option for scalable
needs - up to 300 mA)
Energy Savings
• Ultra low power modes (typ 15 µA with
Easy to Use
• Ecosystem to lower development time and
simplify access
VDD off)
• Innovative Wake-up management and
cyclic sense capability
• Debug mode to save time during
application development
• 5.0 or 3.3 V voltage regulator (VAUX) for
auxiliary loads
Robust Physical Layers
• Certification to LIN 2.1, J2602-2, and
ISO11898-2-5 standards
Flexibility & Compatibility:
• Selectable parameters (RST time, W/D
type, VDD under-voltage threshold, VAUX
3.3 or 5.0 V)
• Dedicated 5.0 V voltage regulator (5 V
CAN) for High Speed CAN
Functional Safety
• Innovative cranking pulse management
during VDD low
• Successfully certified for stringent EMC,
ISO, and ESD standards
• 1 or 2 LIN options (33903S, 33905S and
33903D, 33905D)
• Fail safe & configurable state machine
• Enhanced protections and diagnostics
• Scalable (I/O pins configurable as wake-up
inputs or output LIN master terminations)
IDEAL COMPANION CHIP FOR MCU IN BODY, SAFETY, AND POWERTRAIN APPLICATIONS
Segment
Applications
Proposed FSL MCU
Body
Body Controller
Gateway
S12x, MPC560x
Seat Module
Door Module
Lighting Control Module
Column Module
HVAC
S12x, MPC560x, S08x
Cluster
Safety & Chassis
Power Train
Seat Belt Pre-tensioner
Electric Parking Brake
Steering
S12x, MPC560x
Fuel Pump
S12x, S08x
Water Pump
Glow Plug
Engine Management Low End
S12x, MPC563x
Key Characteristics
Parameter
Characterization
MCU Linear VREG (LDO)
Output Current
5.0 / 3.3 V
(300 mA for 33903D/S, 33904, 33905D/S with optional external PNP implementation)
Bus Output
CAN
LIN
33903D/S, 33905D/S only
Data Rate
CAN
40 kB/s – 1.0 MB/s
10.4 kB/s – 20 kB/s (100 kB/s in fast mode)
15/25 µA
LIN
Low Power VDD OFF/ VDD ON Current
ESD - Module Level (CAN and LIN)
Operating Voltage
Maximum Input Voltage
Operating Temperature
±8000 V
5.5 - 28 V
27 VDC, 40 V (Load Dump)
-40 °C<TA<125 °C
MC33905D Simplified Application Drawing
V
BAT
Features
D1
Q2
Q1
(5.0 V/3.3 V)
•
LDO Linear Power Supply 5.0 or 3.3 V, up to 300 mA with an optional external ballast
transistor
VBAUX
VCAUX VAUX VSUP1
VE
VB
•
•
•
•
•
•
•
•
•
•
LDO Auxiliary Regulator with ballast transistor (5.0 / 3.3 V configurable)
Under-voltage management for cranking
VDD
5 V Auxiliary
Regulator
VDD Regulator
VSUP2
V
S2-INT
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
RST
INT
SAFE
Fail-safe
Power Management
State Machine
DBG
GND
MOSI
SCLK
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
Oscillator
SPI
MISO
CS
Analog Monitoring
Signals Condition & Analog MUX
VSENSE
High precision VSUP sense monitoring
MUX-OUT
5V-CAN
Multiple Analog sensing to 1 MUX output
V
S2-INT
Dual configurable I/O with W/U feature
Configurable
Input-Output
I/O-0
I/O-1
5 V-CAN
Regulator
“B” versions are recommended for new designs. Changes implemented on “B”
versions: resolved V
consumption, and improved oscillator
slow ramp up behavior, enhanced device current
SUP
CANH
SPLIT
CANL
Enhanced High-speed CAN
Physical Interface
TXD
RXD
V
V
CAN Bus
LIN Bus
S2-INT
•
•
CAN, ISO11898-2 and 11898-5 compliant
2 LIN transceivers - 2.0, 2.1, and SAE J2602-2 compliant
TXD-L1
RXD-L1
LIN Interface - #1
LIN Interface - #2
LIN-TERM1
LIN-1
S2-INT
TXD-L2
RXD-L2
LIN-TERM2
LIN-2
LIN Bus
VDD output
CAN
interface
LIN
interface(s)
VAUX VSENSE
Freescale Part Number
I/O Wake-up Capability
MUX
Package
voltage
MC33905D (Dual LIN)
MCZ33905BD3EK/R2
MCZ33905CD3EK/R2
MCZ33905D5EK/R2
MCZ33905BD5EK/R2
MCZ33905CD5EK/R2
MC33905S (Single LIN)
MCZ33905BS3EK/R2
MCZ33905CS3EK/R2
MCZ33905S5EK/R2
MCZ33905BS5EK/R2
MCZ33905CS5EK/R2
3.3 V
2 wake-up + 2 LIN terms
or
SOIC 54 pins
exposed pad
1
2
3 wake-up + 1 LIN terms
or
4 wake-up + no LIN terms
Yes
Yes
Yes
5.0 V
3.3 V
5.0 V
3 Wake-up + 1 LIN terms
or
SOIC 32 pin
exposed pad
1
1
Yes
Yes
Yes
4 Wake-up + no LIN terms
MC33905S Simplified Application Drawing
V
BAT
D1
Q2
Features
Q1
(5.0 V/3.3 V)
•
LDO Linear Power Supply 5.0 or 3.3 V, up to 300 mA with an optional external ballast
transistor
VBAUX
VCAUX
VAUX
VSUP1
VE
VB
•
•
•
•
•
•
•
•
•
•
LDO Auxiliary Regulator with ballast transistor (5.0 / 3.3 V configurable)
Under voltage management for cranking
5 V Auxiliary
Regulator
VDD Regulator
VDD
VSUP2
V
S2-INT
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
RST
INT
SAFE
Fail-safe
Power Management
State Machine
DBG
GND
MOSI
SCLK
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
Oscillator
SPI
MISO
CS
Analog Monitoring
Signals Condition & Analog MUX
VSENSE
High precision VSUP sense monitoring
MUX-OUT
5V-CAN
Multiple Analog sensing to 1 MUX output
V
S2-INT
Triple configurable I/O with W/U feature
I/O-0
I/O-1
I/O-3
5 V-CAN
Regulator
Configurable
Input-Output
V
BAT
“B” versions are recommended for new designs. Changes implemented on “B”
versions: resolved V
consumption, and improved oscillator
slow ramp up behavior, enhanced device current
CANH
SPLIT
CANL
SUP
Enhanced High-speed CAN
Physical Interface
TXD
RXD
CAN Bus
LIN Bus
V
S2-INT
•
•
CAN, ISO11898-2 and 11898-5 compliant
1 LIN transceiver - 2.0, 2.1, and SAE J2602-2 compliant
TXD-L
RXD-L
LIN Term
LIN Interface
LIN-T
LIN
MC33904 Simplified Application Drawing
V
BAT
Features
D1
Q2
Q1
(5.0 V/3.3 V)
•
LDO Linear Power Supply 5.0 or 3.3 V, up to 300 mA with an optional external ballast
transistor
VBAUX
VCAUX
VAUX
VSUP1
VE
VB
•
•
•
•
•
•
•
•
•
•
LDO Auxiliary Regulator with ballast transistor (5.0 / 3.3 V configurable)
Under-voltage management for cranking
5 V Auxiliary
Regulator
VDD Regulator
VSUP2
VDD
V
S2-INT
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
RST
INT
SAFE
Fail Safe
Power Management
State Machine
DBG
GND
MOSI
SCLK
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
Oscillator
SPI
MISO
CS
VSENSE
Analog Monitoring
Signals Condition & Analog MUX
High precision VSUP sense monitoring
MUX-OUT
5V-CAN
Multiple Analog sensing to 1 MUX output
V
I/O-0
I/O-1
I/O-2
BAT
V
S2-INT
Quad configurable I/O with W/U feature
Configurable
Input-Output
5V-CAN
Regulator
I/O-3
“B” versions are recommended for new designs. Changes implemented on “B”
versions: resolved V
slow ramp up behavior, enhanced device current
SUP
CANH
SPLIT
consumption, and improved oscillator
Enhanced High Speed CAN
Physical Interface
TxD
RXD
•
CAN transceiver: ISO11898-2 and 11898-5 compliant
CANL
CAN Bus
VDD output
CAN
interface
LIN
interface(s)
VAUX VSENSE
Freescale Part Number
I/O Wake-up Capability
MUX
Package
voltage
MC33904
MCZ33904B3EK/R2
MCZ33904C3EK/R2
MCZ33904A5EK/R2
MCZ33904B5EK/R2
MCZ33904C5EK/R2
3.3 V
SOIC 32 pins
exposed pad
1
0
4 Wake-up
Yes
Yes
Yes
5.0 V
MC33903 Simplified Application Drawing
Features
VSUP1
•
•
LDO Linear Power Supply 5.0 or 3.3 V
VDD does not allow usage of an external PNP on the 33903. Output current limited to
150 mA
VDD Regulator
VSUP2
SAFE
VDD
V
RST
INT
S-INT
•
•
•
•
•
•
•
Under-voltage management for cranking
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
Power Management
State Machine
MOSI
SCLK
DBG
GND
SPI
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
MISO
CS
Oscillator
Configurable I/O with W/U feature
V
S-INT
Configurable
Input-Output
5 V-CAN
5 V-CAN
I/O-0
“B” versions are recommended for new designs. Changes implemented on “B”
Regulator
versions: resolved V
slow ramp up behavior, enhanced device current
SUP
CANH
SPLIT
CANL
consumption, and improved oscillator
Enhanced High Speed CAN
Physical Interface
TxD
•
CAN transceiver: ISO11898-2 and 11898-5 compliant
RXD
VDD output
CAN
interface
LIN
interface(s)
VAUX VSENSE
Freescale Part Number
I/O Wake-up Capability
MUX
Package
voltage
MC33903
MCZ33903B3EK/R2
MCZ33903C3EK/R2
MCZ33903B5EK/R2
MCZ33903C5EK/R2
3.3 V
SOIC 32 pins
exposed pad
1
1 Wake-up
No
No
No
0
5.0 V
MC33903D Simplified Application Drawing
Features
VSUP
VE
VB
•
LDO Linear Power Supply 5.0 or 3.3 V, up to 300 mA with an optional
external ballast transistor
VDD
VDD Regulator
Fail-safe
V
S2-INT
•
•
•
•
•
•
•
•
•
Under-voltage management for cranking
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
RST
INT
SAFE
Power Management
State Machine
DBG
GND
MOSI
SCLK
Oscillator
SPI
MISO
CS
VSENSE
High precision VSUP sense monitoring
Analog Monitoring
Signals Condition & Analog MUX
Multiple Analog sensing to 1 MUX output
Configurable I/O with W/U feature
MUX-OUT
5 V-CAN
V
S2-INT
IO-0
“B” versions are recommended for new designs. Changes implemented on
Configurable
Input-Output
5 V-CAN
Regulator
“B” versions: resolved V
slow ramp up behavior, enhanced device
SUP
current consumption, and improved oscillator
CANH
SPLIT
CANL
Enhanced High-speed CAN
Physical Interface
TXD
•
•
CAN, ISO11898-2 and 11898-5 compliant
RXD
2 LIN transceivers - 2.0, 2.1, and SAE J2602-2 compliant
V
S2-INT
TXD-L1
RXD-L1
LIN-T1
LIN-1
LIN 2.1 Interface - #1
LIN 2.1 Interface - #2
V
S2-INT
TXD-L2
RXD-L2
LIN-T2
LIN-2
VDD output
CAN
interface
LIN
interface(s)
VAUX VSENSE
Freescale Part Number
I/O Wake-up Capability
MUX
Package
voltage
MC33903D (Dual LIN)
MCZ33903BD3EK/R2
MCZ33903CD3EK/R2
MCZ33903BD5EK/R2
MCZ33903CD5EK/R2
1 wake-up + 2 LIN terms
3.3 V
5.0 V
or
SOIC 32 pins
exposed pad
1
2
2 wake-up + 1 LIN terms
No
Yes
Yes
or
3 wake-up + no LIN terms
MC33903S Simplified Application Drawing
VSUP
VE
Features
VB
•
LDO Linear Power Supply 5.0 or 3.3 V, up to 300 mA with an optional
external ballast transistor
VDD
VDD Regulator
V
S-INT
•
•
•
•
•
•
•
•
•
Under-voltage management for cranking
Internal 5.0 V regulator for CAN driver supply
Low current consumption in sleep mode
Fail safe state machine linked with SAFE pin
Secured SPI with Watchdog capability
RST
INT
SAFE
Fail Safe
Power Management
State Machine
DBG
GND
MOSI
SCLK
Oscillator
SPI
MISO
CS
High precision VSUP sense monitoring
VSENSE
Analog Monitoring
Signals Condition & Analog MUX
Multiple Analog sensing to 1 MUX output
Configurable I/O with W/U feature
MUX-OUT
5 V-CAN
V
S-INT
“B” versions are recommended for new designs. Changes implemented on
I/O-0
I/O-3
5 V-CAN
Regulator
Configurable
Input-Output
“B” versions: resolved V
slow ramp up behavior, enhanced device
SUP
current consumption, and improved oscillator
•
•
CAN, ISO11898-2 and 11898-5 compliant
CANH
SPLIT
CANL
Enhanced High Speed CAN
Physical Interface
TXD
1 LIN transceiver - 2.0, 2.1, and SAE J2602-2 compliant
RXD
V
S-INT
TXD-L
LIN Term #1
LIN-T
LIN
LIN 2.1 Interface - #1
RXD-L
VDD output
voltage
CAN
interface
LIN
interface(s)
VAUX VSENSE
Freescale Part Number
I/O Wake-up Capability
MUX
Package
MC33903S (Single LIN)
MCZ33903BS3EK/R2
MCZ33903CS3EK/R2
MCZ33903BS5EK/R2
MCZ33903CS5EK/R2
MC33903P
B
C
B
C
SOIC
32 pin
expose
d pad
3.3 V
5.0 V
2 Wake-up + 1 LIN terms
or
3 Wake-up + no LIN terms
No
Yes
Yes
1
0
MCZ33903CP5EK/R2
5.0 V
3.3 V
SOIC
32 pin
No
3 Wake-up
Yes
Yes
C
expose
MCZ33903CP3EK/R2
d pad
MC33903, MC33904, AND MC33905 KEY FEATURES AND BENEFITS
Features
Benefits
Ecosystem
Easy-to-Use Ecosystem
• Faster time to market.
• EVB + SW interface to ease SBC usage & programming.
• Electrical and EMC/ESD conformance reports.
• Training material.
Energy Management
Ultra Low Power Modes
• Best-in-class quiescent current down to 15 µA including LIN and
CAN wake-up active.
• Reduces contribution of active blocks during stand-by mode.
Innovative Wake-up Event
Scalable Power Supply
• Save time during cyclic check by reducing the number of state
machine transitions. This contributes in reducing overall ECU
energy consumption (Energy = Current x Time).
• Enables platform solution (150 mA internal supply, or up to
300 mA with an optional ballast transistor).
System Management
Flexible Fail Safe Modes
Secured SPI
• Flexibility to address the ECU functional safety assessment and
program the default fail safe behavior via hardware
implementation.
• Fast SPI access – higher frequency combined with new register
addressing methodology to save time.
• Parity checks.
Innovative Cranking Pulse
Management
• System alternative to save customer cost (PCB space, cost of
capacitor) while keeping some degraded functionalities during
cranking mode.
Advanced Watchdog
• Improved, safer and optional Watchdog (in addition to time-out
and window watchdog) implemented to avoid unpredictable
Watchdog recognition, so that closed loop MCU activity can be
detected.
Ease Customer Debug Mode
• The DBG pin is used to inhibit the watchdog during debug mode.
This helps hardware and software designers save time during
application development.
Robust Physical Layers
Certification and Car OEM
Approval Process
• LIN and CAN HS P/L meets conformance tests and EMC/ESD
standard requirements to secure the customer design
Development Tools
Part Number
Description
KIT33903BD3EVBE
KIT33903BD5EVBE
KIT33905BD3EVBE
KIT33905D5EKEVBE
Documentation
Document Number
MC33903_4_5
Evaluation board to demonstrate the key features of the MC33903
Evaluation board to demonstrate the key features of the MC33903
Evaluation board to demonstrate the key features of the MC33903/4/5
Evaluation board to demonstrate the key features of the MC33903/4/5
Title
Description
Data Sheet
Selector Guide
Selector Guide
Presents the specifications for the product
Analog and power management device comparison
Automotive device comparison
SG1002
SG187
Questions
Freescale Semiconductor is a leading provider
• Are you looking for an automotive certified
High Speed CAN and LIN Physical Layer
integrated on a single chip SBC?
for over 25 years of high-performance products
using SMARTMOS technology that combines
digital, power and standard analog functions.
The company supplies analog and power
management ICs for the automotive, consumer,
networking and industrial markets. Freescale’s
analog and power ICs complement our broad
portfolio of micro controllers, microprocessors,
ZigBee® technology, digital signal processors,
sensors, with development tools and support to
provide system solutions to customers.
• What is the maximum current capability of
your MCU?
EK SUFFIX (PB-FREE) EK SUFFIX (PB-FREE)
• Do you need to implement very low
application quiescent current?
54-PIN SOICW-EP
98ASA10506D
32-PIN SOICW-EP
98ASA10556D
• How many wake-up sources are required
by your system?
• Do you need to monitor bus failures during
network communications?
• What battery voltage range is required by
your system? What is the application
behavior expected during cranking pulse?
• Do you need continuous system
monitoring (temperature, battery voltage,
inputs signals,...)?
• What are the safety level requirements of
your application? Do you need external
components to monitor your MCU
(watchdog,...)?
• How many regulator outputs, and what
logic voltage levels are required by your
system (3.3 or 5.0 V)?
Learn More: For current information about Freescale products,
please visit www.freescale.com.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc., 2010 - 2012 All rights reserved.
Document Number: MC33903_4_5FS, Rev. 6.0
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