BUK7213-40A [NXP]

TrenchMOS?? standard level FET; 的TrenchMOS ?标准水平FET
BUK7213-40A
型号: BUK7213-40A
厂家: NXP    NXP
描述:

TrenchMOS?? standard level FET
的TrenchMOS ?标准水平FET

文件: 总14页 (文件大小:112K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK7213-40A  
TrenchMOS™ standard level FET  
Rev. 01 — 29 January 2004  
Product data  
M3D300  
1. Product profile  
1.1 Description  
N-channel enhancement mode field-effect power transistor in a plastic package using  
Philips General-Purpose Automotive TrenchMOS™ technology.  
1.2 Features  
Very low on-state resistance  
175 °C rated  
Q101 compliant  
Standard level compatible  
1.3 Applications  
Automotive systems  
12 V loads  
Motors, lamps and solenoids  
General purpose power switching  
1.4 Quick reference data  
VDS 40 V  
ID 78 A  
RDSon = 10.3 m(typ)  
Ptot 150 W.  
2. Pinning information  
Table 1:  
Pin  
Pinning - SOT428 (D-PAK), simplified outline and symbol  
Description  
gate (g)  
Simplified outline  
Symbol  
1
d
mb  
2
drain (d)  
3
source (s)  
drain (d)  
g
mb  
s
MBB076  
2
1
3
Top view  
MBK091  
SOT428 (D-PAK)  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
3. Ordering information  
Table 2:  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK7213-40A  
D-PAK  
Plastic single-ended surface mounted package (Philips version of D-PAK); SOT428  
3 leads (one lead cropped)  
4. Limiting values  
Table 3:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
40  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
-
-
-
-
-
-
-
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
RGS = 20 kΩ  
40  
V
±20  
78  
V
[1]  
[2]  
[1]  
Tmb = 25 °C; VGS = 10 V;  
Figure 2 and 3  
A
55  
A
Tmb = 100 °C; VGS = 10 V; Figure 2  
55  
A
IDM  
peak drain current  
Tmb = 25 °C; pulsed; tp 10 µs;  
312  
A
Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
junction temperature  
Tmb = 25 °C; Figure 1  
-
150  
W
55  
55  
+175  
+175  
°C  
°C  
Source-drain diode  
[1]  
[2]  
IDR  
reverse drain current (DC)  
Tmb = 25 °C  
-
-
-
78  
A
A
A
55  
IDRM  
peak reverse drain current  
Tmb = 25 °C; pulsed; tp 10 µs  
unclamped inductive load; ID = 75 A;  
312  
Avalanche ruggedness  
EDS(AL)S non-repetitive avalanche energy  
-
244  
1.6  
mJ  
VDS 40 V; VGS = 10 V; RGS = 50 ;  
starting Tmb = 25 °C  
Electrostatic discharge  
Vesd  
electrostatic discharge voltage, all  
pins  
human body model; C = 100 pF;  
R = 1.5 kΩ  
-
kV  
[1] Current is limited by power dissipation chip rating  
[2] Continuous current is limited by package  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
2 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03na19  
03np38  
120  
100  
I
D
P
der  
(%)  
(A)  
75  
80  
40  
0
50  
25  
0
Capped at 55A due to package  
0
50  
100  
150  
T
200  
0
50  
100  
150  
200  
T ( C)  
°
j
(°C)  
mb  
VGS 10 V  
Ptot  
Pder  
=
× 100%  
-----------------------  
P
°
tot(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Continuous drain current as a function of  
mounting base temperature.  
03np04  
3
10  
I
D
= V /I  
DS D  
limit R  
DSon  
(A)  
t
= 10  
s
µ
p
2
10  
100  
s
µ
Capped at 55 A due to bondwires  
1 ms  
DC  
10  
10 ms  
100 ms  
1
2
10  
1
10  
V
(V)  
DS  
Tmb = 25 °C; IDM single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
3 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
5. Thermal characteristics  
Table 4:  
Thermal characteristics  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Rth(j-mb) thermal resistance from junction to  
mounting base  
Figure 4  
-
-
1
K/W  
Rth(j-a)  
thermal resistance from junction to  
ambient  
vertical in still air; SOT428 package  
-
71.4 -  
K/W  
5.1 Transient thermal impedance  
03nk31  
1
δ = 0.5  
Z
th(j-mb)  
(K/W)  
0.2  
0.1  
-1  
10  
0.05  
0.02  
-2  
10  
t
p
P
δ =  
T
single shot  
t
t
p
T
-3  
10  
-6  
10  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
1
t
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
4 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
6. Characteristics  
Table 5:  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Static characteristics  
V(BR)DSS drain-source breakdown  
voltage  
Characteristics  
Conditions  
Min  
Typ  
Max  
Unit  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
40  
36  
-
-
-
-
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9  
Tj = 25 °C  
2
1
-
3
-
4
V
V
V
Tj = 175 °C  
-
Tj = 55 °C  
drain-source leakage current VDS = 40 V; VGS = 0 V  
Tj = 25 °C  
-
4.4  
IDSS  
-
-
-
0.05  
10  
µA  
µA  
nA  
Tj = 175 °C  
-
500  
100  
IGSS  
gate-source leakage current VGS = ±20 V; VDS = 0 V  
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A;  
Figure 7 and 8  
Tj = 25 °C  
-
-
10.3  
-
13  
mΩ  
mΩ  
Tj = 175 °C  
24.7  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
VGS = 10 V; VDD = 32 V;  
ID = 25 A; Figure 14  
-
-
-
-
-
-
-
-
-
-
-
47  
-
nC  
nC  
nC  
pF  
pF  
pF  
ns  
gate-to-source charge  
gate-to-drain (Miller) charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
10  
-
20  
-
VGS = 0 V; VDS = 25 V;  
f = 1 MHz; Figure 12  
1684  
590  
389  
16  
2245  
708  
532  
VDD = 30 V; RL = 1.2 ;  
VGS = 10 V; RG = 10 Ω  
-
-
-
-
-
124  
57  
ns  
td(off)  
tf  
turn-off delay time  
fall time  
ns  
68  
ns  
Ld  
internal drain inductance  
measured from drain to centre  
of die  
2.5  
nH  
Ls  
internal source inductance  
measured from source lead to  
source bond pad  
-
7.5  
-
nH  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
5 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
Table 5:  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Source-drain diode  
Characteristics…continued  
Conditions  
Min  
Typ  
Max  
Unit  
VSD  
source-drain (diode forward) IS = 25 A; VGS = 0 V;  
voltage  
-
0.85  
1.2  
V
trr  
reverse recovery time  
recovered charge  
IS = 20 A; dIS/dt = 100 A/µs  
VGS = 10 V; VDS = 20 V  
-
-
50  
25  
-
-
ns  
Qr  
nC  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
6 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03nk27  
03nk26  
300  
18  
20  
14 label is V  
(V)  
GS  
R
DSon  
(mΩ)  
18  
I
D
(A)  
16  
16  
12  
10  
200  
14  
12  
10  
8
9.5  
9
8.5  
8
7.5  
7
6.5  
6
5.5  
5
4.5  
100  
0
0
2
4
6
8
10  
(V)  
5
10  
15  
20  
V
(V)  
GS  
V
DS  
Tj = 25 °C; tp = 300 µs  
Tj = 25 °C; ID = 25 A  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Drain-source on-state resistance as a function  
of gate-source voltage; typical values.  
03nk28  
03aa27  
26  
2
6
7
8
9
10 label is V  
(V)  
GS  
a
R
DSon  
(m)  
1.5  
20  
14  
8
20  
1
0.5  
0
0
100  
200  
300  
-60  
0
60  
120  
180  
I
(A)  
°
T ( C)  
j
D
Tj = 25 °C  
RDSon  
a =  
----------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain source on-state resistance  
factor as a function of junction temperature.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
7 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03aa32  
03aa35  
-1  
-2  
-3  
-4  
-5  
-6  
5
10  
I
V
D
(A)  
GS(th)  
(V)  
4
10  
max  
typ  
min  
typ  
max  
3
2
1
0
10  
10  
10  
10  
min  
-60  
0
60  
120  
180  
0
2
4
6
°
T ( C)  
V
(V)  
j
GS  
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = VGS  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03nk24  
03nk29  
30  
4000  
g
(S)  
C
(pF)  
fs  
25  
3000  
C
iss  
20  
15  
10  
2000  
C
oss  
1000  
C
rss  
0
-1  
2
10  
0
20  
40  
60  
10  
1
10  
I
(A)  
D
V
(V)  
DS  
Tj = 25 °C; VDS = 25 V  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
8 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03np37  
03nk25  
100  
10  
V
GS  
I
D
(V)  
8
(A)  
V
= 14 V  
DD  
75  
6
4
2
0
V
= 32 V  
DD  
50  
25  
T = 175 °C  
T = 25 °C  
j
j
0
0
2
4
6
8
0
10  
20  
30  
40  
50  
(nC)  
Q
V
(V)  
G
GS  
VDS = 25 V  
Tj = 25 °C; ID = 25 A  
Fig 13. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
Fig 14. Gate-source voltage as a function of turn-on  
gate charge; typical values.  
03nk22  
100  
I
S
(A)  
75  
50  
25  
T = 175 °C  
T = 25 °C  
j
j
0
0.0  
0.5  
1.0  
1.5  
V
(V)  
SD  
VGS = 0 V  
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
9 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
7. Package outline  
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads  
(one lead cropped)  
SOT428  
seating plane  
y
A
A
E
A
2
A
b
E
1
1
2
mounting  
base  
D
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10  
20 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
D
L
y
1
1
A
A
A
b
D
E
E
H
UNIT  
b
b
c
e
e
1
L
L
w
2
1
2
1
E
1
2
max.  
min.  
min.  
0.65  
0.45  
0.89  
0.71  
0.9  
0.5  
2.38  
2.22  
0.93  
0.73  
1.1  
0.9  
5.46  
5.26  
0.4 6.22  
0.2 5.98  
6.73  
6.47  
10.4 2.95  
9.6  
2.55  
4.81  
4.45  
mm  
4.57  
0.2  
0.2  
4.0  
2.285  
0.5  
Note  
1. Measured from heatsink back to lead.  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEITA  
99-09-13  
01-12-11  
SOT428  
TO-252  
SC-63  
Fig 16. SOT428 (D-PAK).  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
10 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
8. Soldering  
7.00  
6.15  
5.90  
5.80  
1.80  
1.00  
4.725  
4.60  
A
5.65  
6.50  
1.15  
3.60  
B
E
C
6.00  
6.125  
0.30  
2.30  
D
1.30  
1.40  
1.65  
solder lands  
solder resist  
occupied area  
solder paste  
4.57  
F
MSD060  
Dimensions in mm.  
Fig 17. Reflow soldering footprint for SOT428.  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
11 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
9. Revision history  
Table 6:  
Revision history  
CPCN  
Rev Date  
Description  
01 20040129  
-
Product data; initial version (9397 750 12486)  
9397 750 12486  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 01 — 29 January 2004  
12 of 14  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
10. Data sheet status  
Level Data sheet status[1]  
Product status[2][3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
11. Definitions  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
13. Trademarks  
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.  
12. Disclaimers  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
13 of 14  
9397 750 12486  
Product data  
Rev. 01 — 29 January 2004  
BUK7213-40A  
TrenchMOS™ standard level FET  
Philips Semiconductors  
Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
3
4
5
5.1  
6
7
8
9
10  
11  
12  
13  
© Koninklijke Philips Electronics N.V. 2004.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
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Date of release: 29 January 2004  
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