BST72AT/R [NXP]
TRANSISTOR 190 mA, 100 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-92, PLASTIC, SC-43, 3 PIN, FET General Purpose Small Signal;型号: | BST72AT/R |
厂家: | NXP |
描述: | TRANSISTOR 190 mA, 100 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-92, PLASTIC, SC-43, 3 PIN, FET General Purpose Small Signal 晶体 晶体管 |
文件: | 总12页 (文件大小:79K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BST72A
N-channel vertical D-MOS
transistor
April 1995
Product specification
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
vertical D-MOS transistor in TO-92
variant envelope and designed for
use in telephone ringer circuits and
for application with relay, high-speed
and line-transformer drivers.
Drain-source voltage
VDS
max.
max.
80 V
Drain-source voltage (non-repetitive
peak; tp ≤ 2 ms)
VDS(SM)
100 V
Gate-source voltage (open drain)
Drain current (DC)
VGSO
ID
max.
max.
max.
20 V
300 mA
0.83 W
Total power dissipation up to
Ptot
Tamb = 25 °C
FEATURES
Drain-source ON-resistance
ID = 150 mA; VGS = 5 V
• Direct interface to C-MOS, TTL,
etc.
typ.
max.
7 Ω
10 Ω
RDS(on)
• High-speed switching
• No second breakdown
Transfer admittance
ID = 200 mA; VDS = 5 V
Yfs
typ.
150 mS
PINNING - TO-92 VARIANT
1
2
3
= source
= gate
= drain
PIN CONFIGURATION
d
s
handbook, halfpage
1
2
3
g
MAM146
Note: Various pinout configurations available.
Fig.1 Simplified outline and symbol.
April 1995
2
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Drain-source voltage
VDS
VDS(SM)
VGSO
ID
max.
max.
max.
max.
max.
max.
80 V
100 V
Drain-source voltage (non-repetitive peak; tp ≤ 2 ms)
Gate-source voltage (open drain)
Drain current (DC)
20 V
300 mA
600 mA
0.83 W
Drain current (peak)
IDM
Total power dissipation up to Tamb = 25 °C (note 1)
Storage temperature range
Ptot
Tstg
Tj
−65 to + 150 °C
Junction temperature
max.
150 °C
THERMAL RESISTANCE
From junction to ambient (note 1)
Rth j-a
=
150 K/W
Note
1. Transistor mounted on printed circuit board, max. lead length 4 mm.
April 1995
3
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
CHARACTERISTICS
Tj = 25 °C unless otherwise specified
Drain-source breakdown voltage
ID = 10 µA; VGS = 0
V(BR)DS
min.
max.
max.
80 V
1.0 µA
100 nA
Drain-source leakage current
VDS = 60 V; VGS = 0
IDSS
Gate-source leakage current
VGS = 20 V; VDS = 0
IGSS
Gate threshold voltage
ID = 1 mA; VDS = VGS
min.
max.
1.5 V
3.5 V
VGS(th)
Drain-source ON-resistance (see Fig.4)
ID = 150 mA; VGS = 5 V
typ.
max.
7 Ω
10 Ω
RDS(on)
Transfer admittance
ID = 200 mA; VDS = 5 V
Input capacitance at f = 1 MHz
Yfs
typ.
150 mS
typ.
max.
15 pF
30 pF
V
DS = 10 V; VGS = 0
Ciss
Output capacitance at f = 1 MHz
VDS = 10 V; VGS = 0
typ.
max.
13 pF
20 pF
Coss
Feedback capacitance at f = 1 MHz
VDS = 10 V; VGS = 0
typ.
max.
3 pF
6 pF
Crss
Switching times (see Figs 2 and 3)
typ.
max.
4 ns
10 ns
ID = 200 mA; VDS = 50 V; VGS = 0 to 10 V
ton
typ.
max.
4 ns
10 ns
toff
April 1995
4
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
V
= 50 V
handbook, halfpage
handbook, halfpage
INPUT
DD
90 %
10 %
90 %
10 V
0 V
I
OUTPUT
D
50 Ω
10 %
MSA631
t
t
off
on
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
MDA732
MDA762
3
10
1
handbook, halfpage
handbook, halfpage
V
= 10 V
V
= 10 V
I
DS
8 V
GS
D
I
(A)
D
5 V
6 V
5 V
(mA)
0.8
0.6
0.4
2
10
0.2
0
0
10
0
2
4
6
8
R
10
(Ω)
2
4
6
8
10
(V)
GS
V
DSon
Fig.4 Tj = 25 °C; typical values.
Fig.5 Tj = 25 °C; typical values.
April 1995
5
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
MDA690
MDA763
1
1
handbook,
P
handbook, halfpage
V
= 10 V
GS
9 V
8 V
I
D
(A)
tot
(W)
0.8
0.8
7 V
6 V
5 V
0.6
0.4
0.6
0.4
0.2
0
0.2
0
4 V
3 V
0
2
4
6
8
10
(V)
0
50
100
150
200
(°C)
V
T
DS
amb
Fig.6 Tj = 25 °C; typical values.
Fig.7 Power derating curve.
MDA735
MDA736
3
1.2
handbook, halfpage
k
handbook, halfpage
k
2.5
1.1
2
1
1.5
0.9
1
0.8
0.5
−50
0.7
−50
0
50
100
150
0
50
100
150
T (°C)
T (°C)
j
j
Fig.8
Fig.9
VGS (th) at Tj
R
DS on at Tj
--------------------------------------------
k =
;
-----------------------------------------
k =
;
VGS (th) at 25 °C
RDS on at 25 °C
typ. values at 150 mA/5 V.
VGS(th) at 1 mA; typical values.
April 1995
6
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
MDA737
50
handbook, halfpage
C
(pF)
40
30
20
C
iss
C
oss
10
C
rss
0
0
10
20
30
V
(V)
DS
Fig.10 Tj = 25 °C; VGS = 0; f = 1 MHz; typical
values.
April 1995
7
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
PACKAGE OUTLINES
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
L
2
1
UNIT
mm
A
b
b
c
D
d
E
e
e
L
1
1
max
max
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
2.54
1.27
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-04-14
SOT54 variant
TO-92
SC-43
April 1995
8
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
NOTES
April 1995
10
Philips Semiconductors
Product specification
N-channel vertical D-MOS transistor
BST72A
NOTES
April 1995
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/01/pp12
Date of release: April 1995
Document order number: 9397 750 02497
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