BST76 [NXP]
N-channel enhancement mode vertical D-MOS transistor; N沟道增强型垂直的D- MOS晶体管
| 型号： | BST76 |
| 厂家： | 
NXP |
| 描述： | N-channel enhancement mode vertical D-MOS transistor |
| 文件： | 总12页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BST76A
N-channel enhancement mode
vertical D-MOS transistor
1997 Jun 20
Product specification
Supersedes data of April 1995
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
FEATURES
PINNING - SOT54 (TO-92) variant
• Direct interface to C-MOS, TTL, etc.
• High-speed switching
PIN
SYMBOL
DESCRIPTION
1
2
3
s
g
d
source
gate
• No secondary breakdown.
drain
APPLICATIONS
• Line current interrupter in telephone sets
• Relay, high-speed and line transformer drivers.
d
handbook, halfpage
1
2
3
DESCRIPTION
g
N-channel enhancement mode vertical D-MOS transistor
in a SOT54 (TO-92) variant package.
s
MAM146
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
180
UNIT
VDS
drain-source voltage (DC)
drain-source voltage
−
−
−
−
−
7
V
V
V
VDS(SM)
VGSO
ID
non-repetitive peak; tp ≤ 2 mS
200
±20
300
1
gate-source voltage (DC)
drain current (DC)
open drain
mA
W
Ptot
total power dissipation
drain-source on-state resistance
forward transfer admittance
Tamb ≤ 25 °C
RDSon
yfs
ID = 15 mA; VGS = 3 V
10
−
Ω
ID = 300 mA; VDS = 15 V
250
mS
1997 Jun 20
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDS
PARAMETER
drain-source voltage (DC)
drain-source voltage
gate-source voltage (DC)
drain current (DC)
CONDITIONS
MIN.
MAX.
180
UNIT
−
−
−
−
−
−
V
V
V
VDS(SM)
VGSO
ID
non-repetitive peak; tp ≤ 2 mS
200
±20
300
800
1
open drain
mA
mA
W
IDM
peak drain current
Ptot
total power dissipation
storage temperature
junction temperature
Tamb ≤ 25 °C; note 1
Tstg
Tj
−65
+150
150
°C
−
°C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
thermal resistance from junction to ambient note 1
CONDITIONS
VALUE
125
UNIT
Rth j-a
K/W
Note to the Limiting values and Thermal characteristics
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drain lead minimum
10 mm × 10 mm.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
V(BR)DSS
VGSth
PARAMETER
CONDITIONS
VGS = 0; ID = 100 µA
MIN. TYP. MAX. UNIT
drain-source breakdown voltage
gate-source threshold voltage
drain-source leakage current
gate leakage current
180
0.7
−
−
−
V
VDS = VGS; ID = 100 µA
VDS = 120 V; VGS = 0
VDS = 0; VGS = ±20 V
−
2.4
10
V
IDSS
−
µA
IGSS
−
−
±100 nA
RDSon
drain-source on-state resistance VGS = 3 V; ID = 15 mA
GS = 10 V; ID = 300 mA
−
7
10
−
Ω
V
−
6
Ω
yfs
Ciss
Coss
Crss
forward transfer admittance
input capacitance
ID = 300 mA; VDS = 15 V
−
250
50
20
6
−
mS
pF
pF
pF
VDS = 10 V; VGS = 0; f = 1 MHz
VDS = 10 V; VGS = 0; f = 1 MHz
VDS = 10 V; VGS = 0; f = 1 MHz
−
65
30
10
output capacitance
−
reverse transfer capacitance
−
Switching times (see Figs 2 and 3)
ton
turn-on time
VGS = 0 to 10 V; VDS = 50 V;
ID = 300 mA
−
−
−
−
10
15
ns
ns
toff
turn-off time
VGS = 10 to 0 V; VDS = 50 V;
ID = 300 mA
1997 Jun 20
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
V
= 50 V
handbook, halfpage
handbook, halfpage
INPUT
DD
90 %
10 %
10 V
0 V
90 %
I
D
OUTPUT
50 Ω
10 %
MSA631
t
t
off
on
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
MDA168
120
handbook, halfpage
MLC697
1.2
handbook, halfpage
C
(pF)
P
tot
(W)
80
40
0.8
(1)
0.4
(2)
(3)
0
0
10
20
30
0
0
V
(V)
DS
50
100
150
T
200
( C)
o
amb
VGS = 0; f = 1 MHz; Tj = 25 °C.
(1) Ciss
(2) Coss
(3) Crss
.
.
.
Fig.5 Capacitance as a function of drain-source
voltage; typical values.
Fig.4 Power derating curve.
1997 Jun 20
4
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
MDA164
MDA170
1
1
handbook, halfpage
handbook, halfpage
I
(1)
I
(2)
(3)
D
(A)
D
(A)
0.8
0.8
0.6
0.4
0.6
0.4
(4)
0.2
0.2
0
0
0
0
2
4
6
8
10
(V)
2
4
6
8
10
(V)
V
V
GS
DS
Tj = 25 °C.
(1) VGS = 10 V.
(2) VGS = 5 V.
(3) VGS = 4 V.
(4) VGS = 3 V.
VDS = 10 V; Tj = 25 °C.
Fig.6 Output characteristics; typical values.
Fig.7 Transfer characteristic; typical values.
MDA169
MDA167
3
10
1.2
handbook, halfpage
(1)
(2)
(3)
handbook, halfpage
k
I
D
(mA)
1
2
10
0.8
10
4
0.6
−50
6
8
10
12
R
14
(Ω)
0
50
100
150
o
T
( C)
j
DSon
Tj = 25 °C.
VGSth at Tj
--------------------------------------
VGSth at 25°C
(1) VGS = 10 V.
(2) VGS = 5 V.
k =
(3)
VGS = 4 V.
VGSth at 0.1 mA.
Fig.8 Drain current as a function of drain-source
on-state resistance; typical values.
Fig.9 Temperature coefficient of gate-source
threshold voltage; typical values.
1997 Jun 20
5
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
MDA166
3
handbook, halfpage
k
2.5
(1)
2
(2)
1.5
1
0.5
−50
0
50
100
150
o
T
( C)
j
RDSon at Tj
k =
-----------------------------------------
RDSon at 25 °C
(1) ID = 300 mA; VGS = 10 V.
(2) ID = 15 mA; VGS = 3 V.
Fig.10 Temperature coefficient of drain-source
on-state resistance; typical values.
1997 Jun 20
6
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
L
2
1
UNIT
mm
A
b
b
c
D
d
E
e
e
L
1
1
max
max
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
2.54
1.27
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-04-14
SOT54 variant
TO-92
SC-43
1997 Jun 20
7
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20
8
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
9
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
10
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/02/pp12
Date of release: 1997 Jun 20
Document order number: 9397 750 02336
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