BSS89 [NXP]
N-channel enhancement mode vertical D-MOS transistor; N沟道增强型垂直的D- MOS晶体管![BSS89](http://pdffile.icpdf.com/pdf1/p00073/img/icpdf/BSS89_384422_icpdf.jpg)
型号: | BSS89 |
厂家: | ![]() |
描述: | N-channel enhancement mode vertical D-MOS transistor |
文件: | 总8页 (文件大小:63K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BSS89
N-channel enhancement mode
vertical D-MOS transistor
1998 Apr 24
Product specification
Supersedes data of 1997 Jun 20
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
FEATURES
PINNING - TO-92 variant
• Direct interface to C-MOS, TTL, etc.
• High-speed switching
PIN
SYMBOL
DESCRIPTION
1
2
3
g
d
s
gate
• No secondary breakdown.
drain
source
APPLICATIONS
• Line current interruptor in telephone sets
• Relay, high-speed and line transformer drivers.
d
s
handbook, halfpage
1
2
3
DESCRIPTION
g
N-channel enhancement mode vertical D-MOS transistor
in a TO-92 variant package.
MAM146
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
VGSO
ID
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
200
UNIT
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
−
−
−
−
−
−
−
−
−
V
V
open drain
±20
300
1
mA
W
Ptot
RDSon
yfs
total power dissipation
Tamb ≤ 25 °C
drain-source on-state resistance ID = 400 mA; VGS = 10 V
forward transfer admittance ID = 400 mA; VDS = 25 V
4.5
6
Ω
140
350
−
mS
1998 Apr 24
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDS
VGSO
ID
PARAMETER
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
CONDITIONS
MIN.
MAX.
200
UNIT
−
−
−
−
−
V
V
open drain
±20
300
1.2
mA
A
IDM
Ptot
Tstg
Tj
peak drain current
total power dissipation
storage temperature
junction temperature
T
amb ≤ 25 °C; note 1
1
W
−55
+150
150
°C
°C
−
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient note 1
125
K/W
Note to the Limiting values and Thermal characteristics
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drain lead
minimum 10 × 10 mm.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
V(BR)DSS
VGSth
PARAMETER
CONDITIONS
MIN.
200
TYP. MAX. UNIT
drain-source breakdown voltage VGS = 0; ID = 250 µA
−
−
V
gate-source threshold voltage
drain-source leakage current
VDS = VGS; ID = 1 mA
VDS = 60 V; VGS = 0
0.8
−
−
2.8
200
60
±100
6
V
IDSS
−
nA
µA
nA
Ω
V
DS = 200 V; VGS = 0
−
0.1
−
IGSS
RDSon
yfs
gate leakage current
VDS = 0; VGS = ±20 V
−
drain-source on-state resistance VGS = 10 V; ID = 400 mA
−
4.5
350
45
15
3.5
forward transfer admittance
input capacitance
ID = 400 mA; VDS = 25 V
140
−
−
mS
pF
pF
pF
Ciss
VDS = 25 V; VGS = 0; f = 1 MHz
VDS = 25 V; VGS = 0; f = 1 MHz
VDS = 25 V; VGS = 0; f = 1 MHz
−
Coss
Crss
output capacitance
−
−
reverse transfer capacitance
−
−
Switching times (see Figs 2 and 3)
ton
turn-on time
VGS = 0 to 10 V; VDD = 50 V;
ID = 250 mA
−
−
5
−
−
ns
ns
toff
turn-off time
VGS = 10 to 0 V; VDD = 50 V;
ID = 250 mA
15
1998 Apr 24
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
V
= 50 V
handbook, halfpage
handbook, halfpage
INPUT
DD
90 %
10 %
10 V
0 V
90 %
I
D
OUTPUT
50 Ω
10 %
MSA631
t
t
off
on
MBB692
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
1998 Apr 24
4
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
L
2
1
UNIT
mm
A
b
b
c
D
d
E
e
e
L
1
1
max
max
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
2.54
1.27
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
98-03-26
SOT54 variant
TO-92 variant
SC-43
1998 Apr 24
5
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Apr 24
6
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS89
NOTES
1998 Apr 24
7
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© Philips Electronics N.V. 1997
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
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Printed in The Netherlands
137108/00/03/pp8
Date of release: 1998 Apr 24
Document order number: 9397 750 03726
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