BSS87,115 [NXP]
BSS87 - 200 V, N-channel vertical D-MOS transistor SOT-89 3-Pin;型号: | BSS87,115 |
厂家: | NXP |
描述: | BSS87 - 200 V, N-channel vertical D-MOS transistor SOT-89 3-Pin 开关 晶体管 |
文件: | 总8页 (文件大小:50K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
BSS87
N-channel enhancement mode
vertical D-MOS transistor
Product specification
2001 May 18
Supersedes data of 1997 June 23
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
FEATURES
PINNING - SOT89
PIN
• Direct interface to C-MOS, TTL, etc.
• High-speed switching
DESCRIPTION
1
2
3
source
drain
gate
• No secondary breakdown
• Low RDSon
.
APPLICATIONS
d
handbook, halfpage
• Line current interruptor in telephone sets
• Applications in relay, high-speed and line transformer
drivers.
g
1
2
3
s
DESCRIPTION
Bottom view
MAM355
N-channel enhancement mode vertical D-MOS transistor
in a SOT89 package.
Fig.1 Simplified outline (SOT89) and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
VGSO
ID
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
−
−
200
±20
400
1
V
open drain
−
−
V
−
−
mA
W
Ω
Ptot
RDSon
yfs
total power dissipation
T
amb ≤ 25 °C
−
−
drain-source on-state resistance ID = 400 mA; VGS = 10 V
forward transfer admittance ID = 400 mA; VDS = 25 V
−
1.6
750
3
140
−
mS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VDS
VGSO
ID
PARAMETER
drain-source voltage (DC)
gate-source voltage (DC)
drain current (DC)
CONDITIONS
MIN.
MAX.
200
UNIT
−
V
V
open drain
−
±20
400
1.6
−
mA
A
IDM
Ptot
Tstg
Tj
peak drain current
−
total power dissipation
storage temperature
junction temperature
T
amb ≤ 25 °C; note 1
−
1
W
−55
−
+150
150
°C
°C
Note
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum
10 × 10 mm
2001 May 18
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient note 1
125
K/W
Note
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum
10 × 10 mm
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
drain-source breakdown voltage
drain-source leakage current
CONDITIONS
ID = 250 µA; VGS = 0
VDS = 60 V; VGS = 0
MIN. TYP. MAX. UNIT
V(BR)DSS
IDSS
200
−
−
−
V
−
200
60
nA
µA
VDS = 200 V; VGS = 0
−
0.1
−
IGSS
VGSth
RDSon
Yfs
gate-source leakage current
gate-source threshold voltage
drain-source on-state resistance
transfer admittance
VGS = ±20 V; VDS = 0
ID = 1 mA; VGS = VDS
ID = 400 mA; VGS = 10 V
ID = 400 mA; VDS = 25 V
−
±100 nA
0.8
−
−
2.8
3
V
1.6
750
100
Ω
140
−
−
mS
pF
Ciss
input capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
120
Coss
Crss
output capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
−
−
20
10
30
15
pF
pF
reverse transfer capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
Switching times (see Figs 2 and 3)
ton
turn-on time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
−
6
10
60
ns
ns
toff
turn-off time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
49
2001 May 18
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
handbook, halfpage
INPUT
90 %
V
= 50 V
handbook, halfpage
DD
10 %
90 %
10 V
0 V
OUTPUT
I
D
10 %
50 Ω
t
t
off
MSA631
on
MBB692
VDD = 50 V.
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
2001 May 18
4
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 3 leads
SOT89
B
A
D
b
3
E
L
H
E
1
2
3
c
b
2
w
M
b
1
e
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
L
min.
UNIT
A
b
b
b
c
D
E
e
e
H
E
w
1
2
3
1
1.6
1.4
0.48
0.35
0.53
0.40
1.8
1.4
0.44
0.37
4.6
4.4
2.6
2.4
4.25
3.75
mm
3.0
1.5
0.8
0.13
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
EIAJ
97-02-28
99-09-13
SOT89
TO-243
SC-62
2001 May 18
5
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS(1)
STATUS(2)
DEFINITIONS
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 May 18
6
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSS87
NOTES
2001 May 18
7
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SCA
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Printed in The Netherlands
613510/03/pp8
Date of release: 2001 May 18
Document order number: 9397 750 08278
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