74LVT534D,112 [NXP]
74LVT534 - 3.3 V Octal D-type flip-flop; inverting (3-State) SOP 20-Pin;
| 型号： | 74LVT534D,112 |
| 厂家： | 
NXP |
| 描述： | 74LVT534 - 3.3 V Octal D-type flip-flop; inverting (3-State) SOP 20-Pin 驱动 信息通信管理 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总13页 (文件大小：142K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVT534
3.3 V Octal D-type flip-flop; inverting
(3-State)
Product data
2004 Aug 25
Supersedes data of 1998 Feb 19
Philips
Semiconductors
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
FEATURES
• 3-State outputs for bus interfacing
• Common output enable
• TTL input and output switching levels
• Input and output interface capability to systems at 5 V supply
DESCRIPTION
The LVT534 is a high-performance BiCMOS product designed for
V
CC
operation at 3.3 V.
This device is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
LOW-to-HIGH clock transition) is transferred to the corresponding
flip-flop’s Q output.
• Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5 V bus
• Power-up 3-State
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-LOW Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
• Power-up reset
• Latch-up protection exceeds 500mA per JEDEC Std 17
When OE is LOW, the stored data appears at the outputs. When OE
is HIGH, the outputs are in the high-impedance “off” state, which
means they will neither drive nor load the bus.
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
QUICK REFERENCE DATA
CONDITIONS
= 25 °C; GND = 0 V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
CP to Qn
C = 50 pF;
3.0
3.5
PLH
PHL
L
ns
pF
pF
V
CC
= 3.3 V
C
Input capacitance
V = 0 V or 3.0 V
I
4
IN
Outputs disabled;
C
Output capacitance
Total supply current
7
OUT
V
I/O
= 0 V or 3.0 V
Outputs disabled;
= 3.6 V
I
0.13
mA
CCZ
V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
–40 °C to +85 °C
TYPE NUMBER
74LVT534D
DWG NUMBER
SOT163-1
20-Pin Plastic SOL
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
–40 °C to +85 °C
74LVT534DB
74LVT534PW
SOT339-1
–40 °C to +85 °C
SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER SYMBOL
FUNCTION
Output enable input (active-LOW)
1
OE
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
20
19
18
17
16
V
CC
3, 4, 7, 8,
13, 14, 17, 18
Q7
D7
D6
Q6
Q5
D5
D4
Q4
D0 to D7 Data inputs
2, 5, 6, 9,
12, 15, 16, 19
Q0 to Q7 Inverting 3-State outputs
Clock pulse input (active rising
edge)
11
CP
6
7
8
9
15
14
13
12
10
20
GND
Ground (0 V)
V
CC
Positive supply voltage
GND 10
11 CP
SA00161
2
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
1
EN
C1
11
3
4
7
8
13 14 17 18
3
4
2
1D
D0 D1 D2 D3 D4 D5 D6 D7
CP
5
6
11
1
7
OE
8
9
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
13
14
17
18
12
15
16
19
2
5
6
9
12 15 16 19
SA00162
SA00163
FUNCTION TABLE
H
h
=
=
HIGH voltage level
HIGH voltage level one set-up time prior to the LOW-to-HIGH
clock transition
LOW voltage level
LOW voltage level one set-up time prior to the LOW-to-HIGH
clock transition
INPUTS
OUTPUTS
Q0 to Q7
INTERNAL
REGISTER
OPERATING
MODE
OE
CP
Dn
L
l
=
=
L
L
↑
↑
l
h
L
H
H
L
Latch and read
register
NC= No change
L
↑
X
NC
NC
Hold
X
Z
↑
=
=
=
=
Don’t care
high-impedance “off” state
LOW-to-HIGH clock transition
not a LOW-to-HIGH clock transition
H
H
↑
↑
X
Dn
NC
Dn
Z
Z
Disable
outputs
↑
LOGIC DIAGRAM
D0
2
D1
D2
D3
D4
D5
D6
D7
3
4
5
6
7
8
9
D
D
D
D
D
D
D
D
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP Q
11
1
CP
OE
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
SV00168
3
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC supply voltage
DC input diode current
V < 0 V
I
mA
V
3
V
I
DC input voltage
–0.5 to +7.0
–50
I
DC output diode current
V
O
< 0 V
mA
V
OK
3
V
OUT
DC output voltage
Output in Off or HIGH state
Output in LOW state
–0.5 to +7.0
128
I
DC output current
mA
OUT
Output in HIGH state
–64
T
stg
Storage temperature range
–65 to +150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
2.7
0
MAX
3.6
5.5
–
V
CC
DC supply voltage
Input voltage
V
V
V
I
V
IH
HIGH-level input voltage
Input voltage
2.0
–
V
V
IL
0.8
–32
32
V
I
HIGH-level output current
LOW-level output current
–
mA
OH
–
I
OL
mA
LOW-level output current; current duty cycle ≤ 50 %, f ≥ 1 kHz
Input transition rise or fall rate; outputs enabled
Operating free-air temperature range
–
64
∆t/∆v
–
10
ns/V
T
amb
–40
+85
°C
4
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
Input clamp voltage
TEST CONDITIONS
T
= –40° C to +85 °C
UNIT
amb
1
MIN
TYP
MAX
V
IK
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.7 V; I = –18 mA
–
–0.9
–1.2
–
V
V
IK
= 2.7 V to 3.6 V; I = –100 µA
V
– 0.2
V
– 0.1
OH
CC
CC
V
OH
HIGH-level output voltage
= 2.7 V; I = –8 mA
2.4
2.5
2.2
0.1
0.3
0.25
0.3
0.4
0.13
1
–
V
OH
= 3.0 V; I = –32 mA
2.0
–
V
OH
= 2.7 V; I = 100 µA
–
0.2
0.5
0.4
0.5
0.55
0.55
10
± 1
1
V
OL
= 2.7 V; I = 24 mA
–
V
OL
V
OL
LOW-level output voltage
= 3.0 V; I = 16 mA
–
V
OL
= 3.0 V; I = 32 mA
–
–
V
OL
= 3.0 V; I = 64 mA
V
OL
5
V
RST
Power-up output low voltage
Input leakage current
Output off current
= 3.6 V; I = 1 mA; V = GND or V
CC
–
V
O
I
= 0 V or 3.6 V; V = 5.5 V
–
µA
µA
µA
µA
µA
µA
µA
µA
I
= 3.6 V; V = V or GND
Control pins
–
± 0.1
0.1
–1
I
CC
CC
I
I
= 3.6 V; V = V
–
I
4
Data pins
= 3.6 V; V = 0 V
–
–5
± 100
–
I
I
= 0 V; V or V = 0 V to 4.5 V
–
1
OFF
I
O
= 3 V; V = 0.8 V
75
–75
± 500
150
–150
–
I
7
I
Bus Hold current A inputs
= 3 V; V = 2.0 V
–
HOLD
I
= 0 V to 3.6 V; V = 3.6 V
–
CC
Current into an output in the
I
V
V
= 5.5 V; V = 3.0 V
–
–
60
1
125
µA
µA
EX
O
CC
HIGH state when V > V
O
CC
Power-up/down 3-State
≤ 1.2 V; V = 0.5 V to V ; V = GND or V
;
CC
CC
O
CC
I
I
± 100
PU/PD
3
output current
OE/OE = Don’t care
I
3-State output HIGH current
3-State output LOW current
V
V
V
= 3.6 V; V = 3 V; V = V or V
IH
–
–
1
1
5
µA
µA
OZH
CC
CC
CC
O
I
IL
I
= 3.6 V; V = 0.5 V; V = V or V
IH
–5
OZL
O
I
IL
= 3.6 V; Outputs HIGH; V = GND or V
;
CC
I
I
–
–
–
–
0.13
3
0.19
12
mA
mA
mA
mA
CCH
I
O
= 0 mA
V
= 3.6 V; Outputs LOW, V = GND or V
;
CC
CC
CC
CC
I
3
I
Quiescent supply current
CCL
I
O
= 0 mA
V
= 3.6 V; Outputs Disabled; V = GND or V
;
CC
I
I
0.13
0.1
0.19
0.2
CCZ
6
I
O
= 0 mA
Additional supply current per
V
= 3 V to 3.6 V; One input at V – 0.6 V;
CC
∆I
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at V = 3.3 V and T
= 25 °C.
amb
CC
2. This is the increase in supply current for each input at the specified voltage level other than V or GND.
CC
3. This parameter is valid for any V between 0 V and 1.2 V with a transition time of up to 10 msec. From V = 1.2 V to V = 3.3 V ± 0.3 V
CC
CC
CC
a transition time of 100 µsec is permitted. This parameter is valid for T
= 25 °C only.
amb
4. Unused pins at V or GND.
CC
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. I is measured with outputs pulled to V or down to GND.
CCZ
CC
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
5
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
AC CHARACTERISTICS
GND = 0 V; t = t = 2.5 ns; C = 50 pF; R = 500 Ω; T
= –40 °C to +85 °C.
R
F
L
L
amb
LIMITS
= 3.3 V ± 0.3 V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7 V
UNIT
1
MIN
TYP
MAX
MIN
MAX
f
Maximum clock frequency
1
1
100
150
–
100
–
ns
ns
MAX
t
t
Propagation delay
CP to Qn
1.7
2.2
3.0
3.5
4.6
4.9
–
–
5.4
5.2
PLH
PHL
t
t
Output enable time
to HIGH and LOW level
3
4
1.7
1.7
3.2
3.3
5.4
5.5
–
–
7.0
5.6
PZH
PZL
ns
ns
t
Output disable time
from HIGH and LOW level
3
4
2.1
2.1
3.5
3.4
4.8
4.8
–
–
5.3
4.6
PHZ
t
PLZ
NOTE:
1. All typical values are at V = 3.3 V and T
= 25 °C.
CC
amb
AC SETUP REQUIREMENTS
GND = 0 V; t = t = 2.5 ns; C = 50 pF; R = 500 Ω; T
= –40 °C to +85 °C.
R
F
L
L
amb
LIMITS
= 3.3 V ± 0.3 V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7 V
UNIT
MIN
TYP
MIN
t (H)
t (L)
S
2.0
2.6
1.0
1.3
2.0
3.2
S
Setup time, HIGH or LOW, Dn to CP
Hold time, HIGH or LOW, Dn to CP
CP pulse width HIGH or LOW
2
2
1
ns
ns
ns
t (H)
0
0
–1.3
–0.9
0
0
H
t (L)
H
t (H)
1.5
4.2
0.8
3.0
1.5
5.0
W
t (L)
W
6
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
AC WAVEFORMS
V
M
= 1.5 V, V = GND to 2.7 V
IN
1/f
MAX
2.7V
0V
2.7V
0V
1.5V
1.5V
OE
Qn
1.5V
1.5V
1.5V
t
CP
Qn
t
t
PHZ
PZH
t
(H)
t (L)
w
w
V
OH
t
PHL
PLH
V
V
–0.3V
OH
OH
1.5V
1.5V
1.5V
0V
V
OL
SV00044
SV00119
Waveform 1. Propagation delay, clock input to output,
clock pulse width, and maximum clock frequency
Waveform 3. 3-State Output Enable time to HIGH level and
Output Disable time from HIGH level
2.7V
Dn
1.5V
1.5V
1.5V
1.5V
1.5V
2.7V
1.5V
t
1.5V
0V
OE
Qn
t (H)
t (L)
s
t
(H)
t (L)
h
s
h
0V
t
2.7V
PZL
PLZ
CP
3V
1.5V
1.5V
0V
V
+0.3V
OL
V
OL
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SV00120
SV00108
Waveform 4. 3-State Output Enable time to LOW level and
Output Disable time from LOW level
Waveform 2. Data setup and hold times
7
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
TEST CIRCUIT AND WAVEFORM
6.0 V
V
CC
t
W
AMP (V)
90%
Open
GND
90%
NEGATIVE
PULSE
V
V
M
V
V
OUT
M
10%
R
R
IN
L
10%
90%
PULSE
GENERATOR
D.U.T.
0V
t
t
(t
(t
)
t
t
(t
)
R
THL
F
TLH
R
T
C
L
L
)
(t
)
F
TLH
R
THL
AMP (V)
90%
M
Test Circuit for 3-State Outputs
POSITIVE
PULSE
V
V
M
10%
10%
t
W
0V
SWITCH POSITION
V
= 1.5 V
M
TEST
SWITCH
Open
6V
Input Pulse Definition
t
/t
PLH PHL
t
/t
PLZ PZL
t
/t
GND
PHZ PZH
INPUT PULSE REQUIREMENTS
DEFINITIONS
FAMILY
R = Load resistor; see AC CHARACTERISTICS for value.
L
Amplitude
Rep. Rate
t
t
R
t
F
W
C = Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
74LVT
2.7 V
v10 MHz 500 ns v2.5 ns v2.5 ns
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SV00092
8
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
9
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
10
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
11
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
REVISION HISTORY
Rev
Date
Description
_3
20040825
Product data sheet (9397 750 14004). Supersedes Product specification of 1998 Feb 19 (9397 750 03536).
Modifications:
• Ordering information table on page 2:
– remove ‘North America’ column
– change column heading ‘Outside North America’ to ‘Type Number’
• AC characteristics table on page 6: change Max. value of t
from ‘3.0 ns’ to ‘4.8 ns’
PHZ
_2
_1
19980219
19960813
Product specification (9397 750 03536). ECN 853-1855 18988 of 19 February 1998.
Supersedes data of 1996 Aug 13.
12
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data sheet
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data sheet
Product data sheet
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2004
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 08-04
9397 750 14004
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
相关型号：
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