74LVC1G18 [NXP]
1-of-2 non-inverting demultiplexer with 3-state deselected output; 1 -OF- 2非反相信号分离器具有三态输出取消
| 型号： | 74LVC1G18 |
| 厂家： | 
NXP |
| 描述： | 1-of-2 non-inverting demultiplexer with 3-state deselected output |
| 文件： | 总14页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC1G18
1-of-2 non-inverting demultiplexer
with 3-state deselected output
Product specification
2003 Jul 25
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
FEATURES
DESCRIPTION
The 74LVC1G18 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
• Wide supply voltage range from 1.65 to 5.5 V
• 5 V tolerant input/output for interfacing with 5 V logic
• High noise immunity
Input can be driven from either 3.3 or 5 V devices. These
features allow the use of these devices in a mixed
3.3 and 5 V environment.
• Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
This device is fully specified for partial power-down
applications using Ioff. The Ioff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
– JESD8B/JESD36 (2.7 to 3.6 V).
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer
with a 3-state output. The 74LVC1G18 buffers the data on
input pin A and passes it either to output 1Y or 2Y,
depending on whether the state of the select input (pin S)
is LOW or HIGH.
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• SOT363 and SOT457 package
• Specified from −40 to +85 °C and −40 to +125 °C.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay input A to output nY
VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ
5.1
ns
ns
ns
ns
ns
VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 3.2
V
V
CC = 2.7 V; CL = 50 pF; RL = 500 Ω 3.2
CC = 3.3 V; CL = 50 pF; RL = 500 Ω 3.0
VCC = 5.0 V; CL = 50 pF; RL = 500 Ω 2.3
CI
input capacitance
2.5
pF
pF
CPD
power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2
28.8
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
∑ (CL × VCC2 × fo) = sum of outputs.
2. The condition is VI = GND to VCC
.
2003 Jul 25
2
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
S
A
1Y
2Y
L
L
L
H
L
L
H
Z
Z
Z
Z
L
H
H
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PACKAGE MATERIAL
TEMPERATURE RANGE
PINS
CODE
MARKING
74LVC1G18GW
74LVC1G18GV
−40 to +125 °C
−40 to +125 °C
6
6
SC-88
SC-74
plastic
plastic
SOT363
SOT457
VW
V18
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
3
4
5
6
S
data select
ground (0 V)
data input
GND
A
2Y
data output
supply voltage
data output
VCC
1Y
handbook, halfpage
handbook, halfpage
1Y
6
4
S
1Y
V
1
2
3
6
5
4
1
3
S
A
GND
A
18
CC
2Y
2Y
MNB087
MNB088
Fig.1 Pin configuration.
Fig.2 Logic symbol.
2003 Jul 25
3
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
1.65
MAX.
5.5
UNIT
V
V
V
V
VI
input voltage
0
0
0
5.5
VCC
5.5
VO
output voltage
active mode
CC = 0 V; Power-down or
V
high-impedance state
Tamb
tr, tf
operating ambient temperature
input rise and fall times
−40
0
+125
20
°C
VCC = 1.65 to 2.7 V
ns/V
ns/V
VCC = 2.7 to 5.5 V
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5
V
IIK
input diode current
input voltage
VI < 0
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
±50
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0
mA
V
active mode; notes 1 and 2
−0.5
VCC + 0.5
+6.5
±50
Power-down mode; notes 1 and 2 −0.5
V
IO
output source or sink current
VCC or GND current
storage temperature
power dissipation
VO = 0 to VCC
−
mA
mA
°C
mW
ICC, IGND
Tstg
−
±100
+150
300
−65
−
PD
Tamb = −40 to +125 °C
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
2003 Jul 25
4
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +85 °C; note 1
VIH HIGH-level input voltage
1.65 to 1.95 0.65 × VCC
−
−
−
−
−
−
−
−
−
−
−
−
V
V
V
V
V
V
V
V
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.7
2.0
0.7 × VCC
VIL
LOW-level input voltage
−
−
−
−
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output voltage VI = VIH or VIL
IO = 100 µA
IO = 4 mA
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
V
V
V
V
V
0.45
0.3
2.7
0.4
3.0
0.55
0.55
4.5
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −100 µA
IO = −4 mA
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
V
1.2
1.9
2.2
2.3
3.8
−
−
V
IO = −8 mA
−
V
IO = −12 mA
IO = −24 mA
IO = −32 mA
VI = 5.5 V or GND
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage current
5.5
±0.1
±0.1
±5
±10
µA
µA
IOZ
3-state output OFF-state VI = VIH or VIL;
5.5
−
current
VO = VCC or GND
Ioff
power OFF leakage
current
VI or VO = 5.5 V
0
−
−
−
±0.1
0.1
5
±10
10
µA
µA
µA
ICC
∆ICC
quiescent supply current VI = VCC or GND;
IO = 0
5.5
additional quiescent
supply current per pin
VI = VCC − 0.6 V;
IO = 0
2.3 to 5.5
500
2003 Jul 25
5
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
TEST CONDITIONS
OTHER CC (V)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
Tamb = −40 to +125 °C
VIH
HIGH-level input voltage
LOW-level input voltage
1.65 to 1.95 0.65 × VCC
−
−
−
−
−
−
−
−
−
−
−
−
V
V
V
V
V
V
V
V
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
1.7
2.0
0.7 × VCC
VIL
−
−
−
−
0.35 × VCC
0.7
0.8
0.3 × VCC
VOL
LOW-level output voltage VI = VIH or VIL
IO = 100 µA
IO = 4 mA
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
V
V
V
V
V
0.70
0.45
0.60
0.80
0.80
2.7
3.0
4.5
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −100 µA
IO = −4 mA
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
−
−
V
0.95
1.7
1.9
2.0
3.4
−
−
V
IO = −8 mA
−
V
IO = −12 mA
IO = −24 mA
IO = −32 mA
VI = 5.5 V or GND
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage current
5.5
±20
±20
µA
µA
IOZ
3-state output OFF-state VI = VIH or VIL;
5.5
−
current
VO = VCC or GND
Ioff
power OFF leakage
current
VI or VO = 5.5 V
0
−
−
−
−
−
−
±20
40
µA
µA
µA
ICC
∆ICC
quiescent supply current VI = VCC or GND;
IO = 0
5.5
additional quiescent
supply current per pin
VI = VCC − 0.6 V;
IO = 0
2.3 to 5.5
5000
Note
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2003 Jul 25
6
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
AC CHARACTERISTICS
GND = 0 V.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
WAVEFORMS
VCC (V)
Tamb = −40 to +85 °C; note 1
tPHL/tPLH
propagation delay
input A to output nY
see Figs 3 and 5
1.65 to 1.95
2.3 to 2.7
2.7
1.0
5.1
10.0
ns
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
0.5
3.2
3.2
3.0
2.3
5.8
3.6
3.6
3.1
2.4
4.8
2.7
3.5
3.3
2.2
5.5
5.4
5.0
3.8
11.0
6.2
6.0
5.2
3.6
9.0
5.3
5.2
4.9
3.3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPZH/tPZL
3-state output enable see Figs 4 and 5
time input S to
output nY
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPHZ/tPLZ
3-state output disable see Figs 4 and 5
time input S to
output nY
3.0 to 3.6
4.5 to 5.5
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay
input A to output nY
see Figs 3 and 5
1.65 to 1.95
2.3 to 2.7
2.7
1.0
0.5
0.5
0.5
0.5
1.0
0.5
0.5
0.5
0.5
1.0
0.5
0.5
0.5
0.5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
12.5
6.9
6.8
6.3
4.8
13.8
7.8
7.5
6.5
4.5
11.3
6.6
6.5
6.1
4.1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPZH/tPZL
3-state output enable see Figs 4 and 5
time input S to
output nY
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
tPHZ/tPLZ
3-state output disable see Figs 4 and 5
time input S to
output nY
3.0 to 3.6
4.5 to 5.5
Note
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2003 Jul 25
7
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
AC WAVEFORMS
V
handbook, halfpage
A input
I
V
V
M
M
GND
t
t
PHL
PLH
V
OH
V
V
nY output
M
M
V
OL
MNB089
INPUT
VCC
VM
VI
tr = tf
1.65 to 1.95 V 0.5 × VCC
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
2.3 to 2.7 V
2.7 V
0.5 × VCC
1.5 V
VCC
2.7 V
2.7 V
VCC
3.0 to 3.6 V
4.5 to 5.5 V
1.5 V
0.5 × VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.3 Input A to output nY propagation delays.
2003 Jul 25
8
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
V
handbook, full pagewidth
I
S input
V
M
t
GND
t
PLZ
PZL
V
CC
nY output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
nY output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
output
enabled
output
enabled
output
disabled
MNB090
INPUT
tr = tf
VCC
VM
VI
1.65 to 1.95 V 0.5 × VCC VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
2.3 to 2.7 V
2.7 V
0.5 × VCC VCC
VX = VOL + 0.15 V at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.15 V at VCC < 2.7 V.
1.5 V
1.5 V
2.7 V
2.7 V
3.0 to 3.6 V
4.5 to 5.5 V
0.5 × VCC VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.4 3-state enable and disable times S to nY.
2003 Jul 25
9
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
V
EXT
V
CC
R
L
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
VCC
VI
VCC
CL
RL
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
open
open
open
open
open
GND
GND
GND
GND
GND
2 × VCC
2 × VCC
6 V
VCC
500 Ω
500 Ω
500 Ω
500 Ω
2.7 V
2.7 V
VCC
3.0 to 3.6 V
4.5 to 5.5 V
6 V
2 × VCC
Definitions for test circuit:
R
L = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.5 Load circuitry for switching times.
2003 Jul 25
10
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
PACKAGE OUTLINES
Plastic surface mounted package; 6 leads
SOT363
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT363
SC-88
2003 Jul 25
11
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
Plastic surface mounted package; 6 leads
SOT457
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
c
1
2
3
L
p
e
b
p
w
M B
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
01-05-04
SOT457
SC-74
2003 Jul 25
12
Philips Semiconductors
Product specification
1-of-2 non-inverting demultiplexer with
3-state deselected output
74LVC1G18
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Jul 25
13
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© Koninklijke Philips Electronics N.V. 2003
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Printed in The Netherlands
613508/01/pp14
Date of release: 2003 Jul 25
Document order number: 9397 750 11667
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