LMV242 [NSC]
Dual Output, Quad-Band GSM/GPRS Power Amplifier Controller; 双输出,四频GSM / GPRS功率放大器控制器型号: | LMV242 |
厂家: | National Semiconductor |
描述: | Dual Output, Quad-Band GSM/GPRS Power Amplifier Controller |
文件: | 总16页 (文件大小:557K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
July 2004
LMV242
Dual Output, Quad-Band GSM/GPRS Power Amplifier
Controller
General Description
Features
n Support of InGaP HBT, bipolar technology
n Quad-band operation
The LMV242 is a power amplifier (PA) controller intended for
use within an RF transmit power control loop in GSM/GPRS
mobile phones. The LMV242 supports all single-supply PA’s
including InGaP, HBT and bipolar power amplifiers. The
device operates with a single supply from 2.6V to 5.5V.
n Shutdown mode for power save in RX slot
n Integrated ramp filter
n 50 dB RF detector
Included in the PA controller are an RF detector, a ramp filter
and two selectable output drivers that function as error am-
plifiers for two different bands. The LMV242 input interface
consists two analog and two digital inputs. The analog inputs
are the RF input, Ramp voltage input. The digital inputs
perform the function of “Band Select” and “Shutdown/
Transmit Enable” respectively. The “Band Select” function
enables either of two outputs, namely OUT1 when BS =
High, or output OUT2 when BS = Low. The output that is not
enabled is pulled low to the minimum output voltage. The
LMV242 is active in the case TX_EN = High. When TX_EN
= Low the device is in a low power consumption shutdown
mode. During shutdown both outputs will be pulled low to the
minimum output voltage. Individual PA characteristics are
accommodated by a user selectable external RC combina-
tion.
n GPRS compliant
n External loop compensation option
n Accurate temperature compensation
n LLP package 3x3 mm and fully tested die sales
Applications
n GSM/GPRS/TDMA/TD_SCDMA mobile phone
n Pulse RF control
n Wireless LAN
n GSM/GPRS power amplifier module
n Transmit module
The LMV242 is offered in fully tested die form as well as in a
10-lead LLP package and is therefore especially suitable for
small footprint PA module solutions.
Typical Application
20079501
VIP® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200795
www.national.com
Absolute Maximum Ratings (Note 1)
Mounting Temperature
Infrared or convection (20 sec)
235˚C
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Note 1)
Supply Voltage
Supply Voltage
2.6V to 5.5V
VDD - GND
6.5V Max
Operating Temperature
Range
ESD Tolerance (Note 2)
Human Body Model
−40˚C to +85˚C
0V to 2V
2 kV
200V
VRAMP Voltage Range
RF Frequency Range
Machine Model
450 MHz to 2 GHz
Storage Temperature Range
Junction Temperature (Note 6)
−65˚C to 150˚C
150˚C Max
2.6V Electrical Characteristics Unless otherwise specified, all limits are guaranteed to TJ = 25˚C.
VDD = 2.6V. Boldface limits apply at temperature extremes (Note 4).
Symbol
IDD
Parameter
Supply Current
Condition
Min
Typ
Max
9
Units
VOUT = (VDD - GND)/2
6.9
mA
12
30
In Shutdown (TX_EN = 0V)
VOUT = (VDD - GND)/2
(Note 7)
0.2
µA
VHIGH
VLOW
TON
Logic Level to Enable Power
Logic Level to Disable Power
Turn-on-Time from Shutdown
Current into TX_EN and BS Pin
1.8
V
V
(Note 7)
0.8
6
3.6
µs
µA
I
EN, IBS
0.03
5
RAMP Amplifier
VRD
VRAMP Deadband
Transconductance
155
70
206
96
265
mV
µA/V
µA
1/RRAMP
(Note 8)
120
IOUT RAMP Ramp Amplifier Output Current
VRAMP = 2V
100
162
RF Input
PIN
RF Input Power Range (Note 5) 20 kΩ // 68 pF between
−50
0
dBm
dBV
VCOMP1 and VCOMP2
−63
−13
−1.74
@
Logarithmic Slope (Note 9)
Logarithmic Intercept (Note 9)
DC Resistance
900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
1800 MHz, 20 kΩ // 68 pF
−1.62
−1.60
−1.59
–50.4
–52.3
–51.9
–52.3
55.7
between VCOMP1 and VCOMP2
µA/dB
@
1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
1800 MHz, 20 kΩ // 68 if
between VCOMP1 and VCOMP2
dBm
@
1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(Note 8)
RIN
Error Amplifier
Ω
GBW
Gain-Bandwidth Product
(Note 8)
5.1
MHz
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2
2.6V Electrical Characteristics Unless otherwise specified, all limits are guaranteed to TJ = 25˚C.
VDD = 2.6V. Boldface limits apply at temperature extremes (Note 4). (Continued)
Symbol
VO
Parameter
Condition
From Positive Rail, Sourcing,
IO = 7 mA
Min
Typ
Max
90
Units
Output Swing from Rail
47
115
90
mV
From Negative Rail Sinking,
IO = −7 mA
52
115
IO
Output Short Circuit Current
(Note 3)
Sourcing, VO = 2.4V
10
10
29.5
27.1
700
mA
Sinking, VO. = 0.2V
en
Output Referred Noise
fMEASURE = 10 KHz,
nV/
RF Input = 1800 MHz, -10
dBm, 20 kΩ // 68 pF between
VCOMP1 and VCOMP2, VOUT
=1.4V, set by VRAMP, (Note 8)
SR
Slew Rate
2.1
4.4
V/µs
5.0V Electrical Characteristics Unless otherwise specified, all limits are guaranteed to TJ = 25˚C.
VDD = 5.0V. Boldface limits apply at temperature extremes (Note 4).
Symbol
IDD
Parameter
Supply Current
Condition
Min
1.8
Typ
Max
12
Units
VOUT = (VDD - GND)/2
7.8
mA
15
In Shutdown (TX_EN = 0V)
VOUT = (VDD - GND)/2
(Note 7)
0.4
30
µA
VHIGH
VLOW
TON
Logic Level to Enable Power
Logic Level to Disable Power
Turn-on-Time from Shutdown
Current into TX_EN and BS Pin
V
V
(Note 7)
0.8
6
1.5
µs
µA
I
EN, IBS
0.03
5
RAMP Amplifier
VRD
VRAMP Deadband
Transconductance
155
70
206
96
265
mV
µA/V
µA
1/RRAMP
(Note 8)
120
IOUT RAMP Ramp Amplifier Output Current
VRAMP = 2V
100
168
RF Input
PIN
RF Input Power Range
(Note 5)
20 kΩ // 68 pF between
VCOMP1 and VCOMP2
−50
0
dBm
dBV
−63
−13
−1.79
@
Logarithmic Slope
(Note 9)
900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
1800 MHz, 20 kΩ // 68 pF
–1.69
−1.67
–1.65
–50.2
–52.5
–52.5
–52.9
55.7
between VCOMP1 and VCOMP2
µA/dB
@
1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
Logarithmic Intercept
(Note 9)
900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
1800 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
dBm
@
1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@
2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(Note 8)
RIN
DC Resistance
Ω
3
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5.0V Electrical Characteristics Unless otherwise specified, all limits are guaranteed to TJ = 25˚C.
VDD = 5.0V. Boldface limits apply at temperature extremes (Note 4). (Continued)
Symbol
Parameter
Condition
Min
Typ
Max
Units
Error Amplifier
GBW
VO
Gain-Bandwidth Product
Output Swing from Rail
(Note 8)
5.7
31
MHz
From Positive Rail, Sourcing,
IO = 7 mA
80
105
80
mV
From Negative Rail Sinking,
IO = −7 mA
35
105
IO
Output Short Circuit Current
(Note 3)
Sourcing, VO = 4.8V
Sinking, VO = 0.2V
15
15
31.5
31.5
770
mA
en
Output Referred Noise
fMEASURE = 10 kHz,
RF Input = 1800 MHz,
-10dBm, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
nV/
,
VOUT = 1.4V, set by VRAMP
(Note 8)
,
SR
Slew Rate
2.5
4.9
V/µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model: 1.5 kΩ in series with 100 pF.
Note 3: The output is not short circuit protected internally. External protection is necessary to prevent overheating and destruction or adverse reliability.
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
>
the device such that T = T . No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where T
J
T .
A
J
A
Note 5: Power in dBV = dBm + 13 when the impedance is 50Ω.
Note 6: The maximum power dissipation is a function of T
, θ and T . The maximum allowable power dissipation at any ambient temperature is P
=
D
J(MAX)
JA
A
(T
- T )/θ . All numbers apply for packages soldered directly into a PC board.
J(MAX)
A JA
Note 7: All limits are guaranteed by design or statistical analysis.
Note 8: Typical values represent the most likely parametric norm.
Note 9: Slope and intercept are calculated from graphs "V
vs. RF input power" where the current is obtained by division of the voltage by 20 kΩ.
OUT
Connection Diagrams
LLP-10
Bond Pad Layout
20079502
Top View
20079503
Top View
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Bond Pad mechanical Dimensions
X/Y Coordinates
Pad Size
Signal Name
Out 1
Pad Number
X
Y
X
Y
1
2
−281
−281
−281
−281
−281
281
617
490
363
236
−617
−617
−360
−118
20
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
Out 2
Comp2
VDD
3
4
RFIN
5
VRAMP
TX_EN
BS
6
7
281
8
281
Comp1
GND
9
281
10
281
187
Note: Dimensions of the bond pad coordinates are in µm Origin of the coordinates: center of the die Coordinates refer to the center of the bond pad
Pin Descriptions
Pin
Name
VDD
Description
Power Supply
Digital Inputs
4
Positive Supply Voltage
Power Ground
10
7
GND
TX_EN
Schmitt-triggered logic input. A LOW shuts down the whole
chip for battery saving purposes. A HIGH enables the chip.
Schmitt-triggered Band Select pin. When BS = H, channel 1
(OUT1) is selected, when BS = L, channel 2 (OUT2) is
selected.
8
5
6
9
BS
Analog Inputs
Compensation
RFIN
RF Input connected to the Coupler output with optional
attenuation to measure the Power Amplifier (PA) / Antenna
RF power levels.
VRAMP
Comp1
Sets the RF output power level. The useful input voltage
range is from 0.2V to 1.8V, although voltages from 0V to VDD
are allowed.
Connects an external RC network between the Comp1 pin
and the Comp2 pin for an overall loop compensation and to
control the closed loop frequency response. Conventional
loop stability techniques can be used in selecting this
network, such as Bode plots. A good starting value for the
RC combination will be C = 68 pF and R = 0Ω.
Frequency compensation pin. The BS signal switches this pin
either to OUT1 or to OUT2.
3
Comp2
Output
1
2
Out1
Out2
This pin is connected to the PA of either channel 1 or
channel 2.
Note: 1. All inputs and outputs are referenced to GND (pin 10).
<
>
2. For the digital inputs, a LOW is 0.8V and a HIGH is 1.8V.
3. RF power detection is performed internally in the LMV242 and only an RF power coupler with optional extra attenuation has to be used.
5
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Ordering Information
Package
Part Number
Package Marking
Transport Media
1k Units Tape and Reel
4.5k Units tape and Reel
300 Units Waffle Pack
25 Wafer/Vial
NSC Drawing
LMV242LD
LMV242LDX
LMV242MDA
LMV242MWA
10-Pin LLP
242LD
LDA10A
DA0620035
W008
Tested and Wafer
Form
No Mark
Block Diagram
20079504
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Typical Performance Characteristics Unless otherwise specified, VDD = +2.6V, TJ = 25˚C.
Supply Current vs. Supply Voltage
VOUT and Log Conformance vs. RF Input Power
20079506
20079505
VOUT and Log Conformance vs. RF Input Power
VOUT and Log Conformance vs. RF Input Power
@
@
900 MHz
1800 MHz
20079507
20079508
VOUT and Log Conformance vs. RF Input Power
VOUT and Log Conformance vs. RF Input Power
@
@
1900 MHz
2000 MHz
20079514
20079515
7
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Typical Performance Characteristics Unless otherwise specified, VDD = +2.6V, TJ
=
25˚C. (Continued)
Logarithmic Slope vs. Frequency
Logarithmic Intercept vs. Frequency
20079517
20079516
RF Input Impedance vs. Frequency
@
Resistance and Reactance
Gain and Phase vs. Frequency
20079519
20079518
ICOMP vs. VRAMP
PIN vs. VRAMP
20079520
20079521
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Typical Performance Characteristics Unless otherwise specified, VDD = +2.6V, TJ
=
25˚C. (Continued)
Sourcing Current vs. Output Voltage
Sinking Current vs. Output Voltage
20079510
20079511
Output Voltage vs. Sourcing Current
Output Voltage vs. Sinking Current
20079513
20079512
@
Closed Loop POUT (PA) vs. VRAMP DCS 1800 MHz
@
Closed Loop POUT (PA) vs. VRAMP GSM 900 MHz Band
Band
20079522
20079523
9
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Typical Performance Characteristics Unless otherwise specified, VDD = +2.6V, TJ
=
25˚C. (Continued)
@
Closed Loop POUT (PA) vs. VRAMP PCS 1900 MHz
Band
Closed Loop GSM- 900 MHz Band
20079525
20079524
Closed Loop DCS-1800 MHz Band
Closed Loop PCS-1900 MHz Band
20079526
20079527
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voltage (VAPC) of the PA is of no consequence to the overall
transfer function. It is a function of the controller’s VRAMP
voltage. Based upon the value of VRAMP, the PA controller
will set the gain control voltage of the PA to a level that is
necessary to produce the desired output level. Any tempera-
ture dependency in the PA gain control function will be
eliminated. Also, non-linearity’s in the gain transfer function
of the PA do not appear in the overall transfer function (POUT
vs. VRAMP). The only requirement is that the gain control
function of the PA has to be monotonic. To achieve this, it is
crucial, that the LMV242’s detector is temperature stable.
Application Section
POWER CONTROL PRINCIPLES
The LMV242 is a member of the power loop controller family
of National Semiconductor, for quad-band TDMA/GSM solu-
tions. The typical application diagram demonstrates a basic
approach for implementing the quad-band solution around
an RF Power Amplifier (PA). The LMV242 contains a 50 dB
Logamp detector and interfaces directly with the directional
coupler.
The LMV242 Base Band (control-) interface consists of 3
signals: TX_EN to enable the device, BS to select either
output 1 or output 2 and VRAMP to set the RF output power to
the specified level. The LMV242 gives maximum flexibility to
meet GSM frequency- and time mask criteria for many dif-
ferent single supply Power Amplifier types like HBT or Mes-
FET in GaAs, SiGe or Si technology. This is accomplished by
the programmable Ramp characteristic from the Base Band
and the TX_EN signal along with the external compensation
capacitor.
Typical PA Closed Loop Control Setup
A typical setup of PA control loop is depicted in Figure 1.
Beginning at the output of the Power Amplifier (PA), this
signal is fed, usually via a directional coupler, to a detector.
The error between the detector output current IDET and the
ramp current IRAMP, representing the selected power setting,
drives the inverting input of an op amp, configured as an
integrator. A reference voltage drives the non-inverting input
of the op amp. Finally the output of the integrator op amp
drives the gain control input of the power amplifier, which
sets the output power. The loop is stabilized when IDET is
equal to IRAMP . Lets examine how this circuit works in detail.
POWER AMPLIFIER CONTROLLED LOOP
This section gives a general overview and understanding of
how a typical Power Amplifier control loop works and how to
solve the most common problems confronted in the design.
General Overview
The key benefit of a PA control loop circuit is its immunity to
changes in the PA gain control function. When a PA control-
ler is used, the relationship between gain and gain control
20079528
FIGURE 1. PA Control Loop
11
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Using a closed loop to control the PA has benefits over the
use of a directly controlled PA. Non-linearity’s and tempera-
ture variations present in the PA transfer function do not
appear in the overall transfer function, POUT vs. VRAMP The
response of a typical closed loop is given in Figure 3. The
shape of this curve is determined by the response of the
controller’s detector. Therefore the detector needs to be
accurate, temperature stable and preferably linear in dB to
achieve a accurately controlled output power. The only re-
quirement for the control loop is that the gain control function
of the PA has to be monotonic. With a linear in dB detector,
the relation between VRAMP and PA output power becomes
linear in dB as well, which makes calibration of the system
easy.
Application Section (Continued)
We will assume initially that the output of the PA is at some
low level and that the VRAMP voltage is at 1V. The V/I
converter converts the VRAMP voltage to a sinking current
IRAMP. This current can only come from the integrator ca-
pacitor C. Current flow from this direction increases the
output voltage of the integrator. The output voltage, which
drives the VAPC of the PA, increases the gain (we assume
that the PA’s gain control input has a positive sense, that is,
increasing voltage increases gain). The gain will increase,
thereby increasing the amplifier’s output level until the de-
tector output current equals the ramp current IRAMP. At that
point, the current through the capacitor will decrease to zero
and the integrator output will be held constant, thereby set-
tling the loop. If capacitor charge is lost over time, output
voltage will decrease. However, this leakage will quickly be
corrected by additional current from the detector. The loop
stabilizes to IDET = IRAMP thereby creating a direct relation
between the VRAMP set voltage and the PA output power,
independent of the PA’s VAPC-POUT characteristics.
Power Control Over Wide Dynamic Range
The circuit as described so far, has been designed to pro-
duce a temperature independent output power level. If the
detector has a high dynamic range, the circuit can precisely
set PA output levels over a wide power range. To set a PA
output power level, the reference voltage, VRAMP, is varied.
To estimate the response of POUT vs. VRAMP, PIN vs. VRAMP
of the LMV242 should be known (POUT = PIN + attenuation
as discussed is section 3).
The relation between PIN and VRAMP can be constructed out
of 2 curves:
20079522
•
•
ICOMP vs, VRAMP
VOUT vs. RF Input Power (detection curve)
FIGURE 3. Closed Loop Response
IOUT can be calculated by dividing the VOUT of the detection
curve by the feedback resistor used for measuring. With the
knowledge that ICOMP = IOUT in a closed loop the resulting
function PIN vs. VRAMP is shown in Figure 2. Extra attenua-
tion should be inserted between PA output and LMV242’s
PIN to match their dynamic ranges.
The response time of the loop can be controlled by varying
the RC time constant of the integrator. Setting this at a low
level will result in fast output settling but can result in ringing
in the output envelope. Setting the RC time constant to a
high value will give the loop good stability but will increase
settling time.
ATTENUATION BETWEEN COUPLER AND LMV242
DETECTOR
Figure 4 shows a practical RF power control loop realized by
using the National’s LMV242 with integrated RF detector.
The RF signal from the PA passes through a directional
coupler on its way to the antenna. Directional couplers are
characterized by their coupling factor, which is in the 10 dB
to 30 dB range, typical 20 dB. Because the coupled output
must in its own right deliver some power (in this case to the
detector), the coupling process takes some power from the
main output. This manifests itself as insertion loss, the inser-
tion loss being higher for lower coupling factors.
It is very important to choose the right attenuation between
PA output and detector input to achieve power control over
the full output power range of the PA. A typical value for the
output power of the PA is +35.5 dBm for GSM and +30 dBm
for PCS/DCS. In order to accommodate these levels into the
LMV242 detection range the minimum required total attenu-
ation is about 35 dBm (please refer to typical performance
characteristics in the datasheet and Figure 2). A typical
coupler factor is 20 dB. An extra attenuation of about 15 dB
should be inserted.
20079521
FIGURE 2. PIN vs. VRAMP
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12
about 206 mV, so offset voltages in the DAC or amplifier
supplying the RAMP signal will not cause excess RF signal
output and increased power consumption.
Application Section (Continued)
Extra attenuation Z between the coupler and the RF input of
the LMV242 can be achieved by 2 resistors RX and RY
according to Figure 3, where
Transmit Enable
Power consumption requirements are supported by the
TX_EN function, which puts the entire chip into a power
saving mode to enable maximum standby and talk time while
ensuring the output does not glitch excessively during
Power-up and Power-down. The device will be active in the
case TX_EN = High, or otherwise go to a low power con-
sumption shutdown mode. During shutdown the output is
pulled low to minimize the output voltage.
Z = 20 LOG (RIN / [RIN + RY])
or
e.g. RY = 300Ω results in an attenuation of 16.9 dB.
Band Select
To prevent reflection back to the coupler the impedance
seen by the coupler should be 50Ω (RO). The impedance
consists of RX in parallel with RY + RIN. RX can be calculated
with the formula:
The LMV242 is especially suitable for PA control loops with 2
PA’s. The 2 outputs to steer the VAPCS of the PA’s can be
controlled with the band select pin. When the band select is
LOW output2 is selected, while output1 is selected when
band select is HIGH. The not-selected output is pulled low.
RX = [RO * (RY + RIN)] / RY
RX = 50 * [1 + (50 / RY)]
→
e.g. with RY = 300Ω, RIN = 50Ω
RX = 58Ω.
Analog Output
The output is driven by a rail-to-rail amplifier capable of both
sourcing and sinking. Several curves are given in the “Typi-
cal performance characteristics”-section regarding the out-
put. The output voltage vs. sourcing/sinking current curves
show the typical voltage drop from the rail over temperature.
The sourcing/sinking current vs. output voltage characteris-
tics show the typical charging/discharging current, which the
output is capable of delivering at a certain voltage. The
output is free from glitches when enabled by TX_EN. When
TX_EN is low, the selected output voltage is fixed or near
GND.
FREQUENCY COMPENSATION
To compensate and prevent the closed loop arrangement
from oscillations and overshoots at the output of the RF
detector/error amplifier of the LMV242, the system can be
adjusted by means of external RC components connected
between Comp1 and Comp2. Exact values heavily depend
on PA characteristics. A good starting point is R = 0Ω and
C = 68 pF. The vast combination of PA’s and couplers
available preclude a generalized formula for choosing these
components. Additional frequency compensation of the
closed loop system can be achieved by adding a resistor
(and if needed an inductor) between the LMV242’s output
and the VAPC input of the PA. Please contact National Semi-
conductor for additional support.
20079530
FIGURE 4. Simplified PA Control Loop with Extra
Attenuation
BASEBAND CONTROL OF THE LMV242
The LMV242 has 3 baseband-controlled inputs:
TIMING DIAGRAM
•
•
VRAMP signal (Base band DAC ramp signal)
In order to meet the timemask specifications for GSM, a
good timing between the control signals and the RF signal is
essential. According to the specifications the PA’s RF output
power needs to ramp within 28 µsec with minimum over-
shoot. To achieve this, the output of the PA controller should
ramp at the same time as the RF signal from the Base Band.
The ramp signal sets the controllers output to the required
value, where the loop needs a certain time to set this output.
Therefore the ramp should be set high some time before the
output has to be high. How much time depends on the setup
and the PA used. If the controllers shutdown functionality is
used, the shutdown should be set high about 6 µsec before
the ramp is set high.
TX_EN is digital signal (performs the function
a
“Shutdown/Transmit Enable”).
•
Band Select (BS)
VRAMP Signal
The actual VRAMP input value sets the RF output power. By
applying a certain mask shape to the “Ramp in” pin, the
output voltage level of the LMV242 is adjusting the PA
control voltage to get a power level (POUT/dBm) out of the
PA, which is proportional to the single ramp voltage steps.
The recommended VRAMP voltage range for RF power con-
trol is 0.2V to 2.0V. The VRAMP input will tolerate voltages
from 0V to VDD without malfunction or damage. The VRAMP
input does not change the output level until the level reaches
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•
•
•
Lead time VRAMP vs. start GSM burst
Ramp profile
Application Section (Continued)
The control loop can be configured by the following vari-
ables:
Loop compensation
•
Lead time TX_EN event vs. start GSM burst
20079531
FIGURE 5. Timing VRAMP vs. RF Signal
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14
10-Pad Bare Die
20079503
General Die Information
Die / Wafer Characteristics
Fabrication Attributes
Bond Pad Opening Size (min) 92 µm x 92µm
Physical Die Identification
Die Step
LMV242A
A
Bond Pad Metallization
0.5% Copper_Bal.
Aluminum
Physical Attributes
Passivation
VOM Nitride
Bare Back
Wafer Diameter
Die Size (Drawn)
200 mm
Back Side Metal
Back Side Connection
889 µm x 1562 µm
35.0 mils x 61.5 mils
216 µm Nominal
123 µm Nominal
Floating
Note: Note: Actual die size is rounded to the nearest micron
Thickness
Min Pitch
15
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Physical Dimensions inches (millimeters)
unless otherwise noted
10-Pin LLP
NS Package Number LDA10A
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相关型号:
LMV243BLX/NOPB
SPECIALTY TELECOM CIRCUIT, PBGA8, 1.50 X 1.50 MM, 0.995 MM HEIGHT, MICRO, BUMP, SMD-8
TI
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