LMV242_15 [TI]
LMV242 Dual Output, Quad-Band GSM/GPRS Power Amplifier Controller;
| 型号： | LMV242_15 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LMV242 Dual Output, Quad-Band GSM/GPRS Power Amplifier Controller GSM |
| 文件： | 总25页 (文件大小：1009K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV242
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SNWS014C –APRIL 2004–REVISED MAY 2013
LMV242 Dual Output, Quad-Band GSM/GPRS Power Amplifier Controller
Check for Samples: LMV242
1
FEATURES
DESCRIPTION
The LMV242 is a power amplifier (PA) controller
intended for use within an RF transmit power control
loop in GSM/GPRS mobile phones. The LMV242
supports all single-supply PA’s including InGaP, HBT
and bipolar power amplifiers. The device operates
with a single supply from 2.6V to 5.5V.
2
•
•
•
•
•
•
•
•
•
Support of InGaP HBT, Bipolar Technology
Quad-Band Operation
Shutdown Mode for Power Save in RX Slot
Integrated Ramp Filter
50 dB RF Detector
Included in the PA controller are an RF detector, a
ramp filter and two selectable output drivers that
function as error amplifiers for two different bands.
The LMV242 input interface consists two analog and
two digital inputs. The analog inputs are the RF input,
Ramp voltage input. The digital inputs perform the
function of “Band Select” and “Shutdown/Transmit
Enable” respectively. The “Band Select” function
enables either of two outputs, namely OUT1 when BS
= High, or output OUT2 when BS = Low. The output
that is not enabled is pulled low to the minimum
output voltage. The LMV242 is active in the case
TX_EN = High. When TX_EN = Low the device is in
a low power consumption shutdown mode. During
shutdown both outputs will be pulled low to the
minimum output voltage. Individual PA characteristics
are accommodated by a user selectable external RC
combination.
GPRS Compliant
External Loop Compensation Option
Accurate Temperature Compensation
WSON Package 3x3 mm and Fully Tested Die
Sales
APPLICATIONS
•
•
•
•
•
GSM/GPRS/TDMA/TD_SCDMA Mobile Phone
Pulse RF Control
Wireless LAN
GSM/GPRS Power Amplifier Module
Transmit Module
The LMV242 is offered in fully tested die form as well
as in a 10-lead WSON package and is therefore
especially suitable for small footprint PA module
solutions.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
LMV242
SNWS014C –APRIL 2004–REVISED MAY 2013
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TYPICAL APPLICATION
ANTENNA
RF1
PA1
SWITCH
COUPLER
50W
RF2
PA2
OUT1
OUT2
9
RF
IN
1
2
5
COMP1
COMP2
V
DD
LMV242
4
GND
10
3
6
7
8
V
RAMP
TX_EN
BS
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)(2)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VDD - GND
6.5V Max
2 kV
(3)
ESD Tolerance
Human Body Model
Machine Model
200V
Storage Temperature Range
−65°C to 150°C
150°C Max
235°C
(4)
Junction Temperature
Mounting Temperature
Infrared or convection (20 sec)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the 2.6V ELECTRICAL CHARACTERISTICS.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Human body model: 1.5 kΩ in series with 100 pF.
(4) The maximum power dissipation is a function of TJ(MAX) , θJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.
(1)
OPERATING RATINGS
Supply Voltage
2.6V to 5.5V
Operating Temperature Range
VRAMP Voltage Range
RF Frequency Range
−40°C to +85°C
0V to 2V
450 MHz to 2 GHz
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the 2.6V ELECTRICAL CHARACTERISTICS.
2
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2.6V ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all limits are specified to TJ = 25°C. VDD = 2.6V. Boldface limits apply at temperature extremes
(1)
.
Symbol
IDD
Parameter
Supply Current
Condition
Min
Typ
Max
Units
VOUT = (VDD - GND)/2
6.9
9
mA
12
In Shutdown (TX_EN = 0V)
VOUT = (VDD - GND)/2
0.2
30
μA
(2)
VHIGH
VLOW
TON
Logic Level to Enable Power
Logic Level to Disable Power
Turn-on-Time from Shutdown
Current into TX_EN and BS Pin
See
1.8
V
V
(2)
See
0.8
6
3.6
μs
μA
IEN, IBS
0.03
5
RAMP Amplifier
VRD
VRAMP Deadband
Transconductance
155
70
206
96
265
mV
μA/V
μA
(3)
1/RRAMP
See
120
IOUT RAMP Ramp Amplifier Output Current
VRAMP = 2V
100
162
RF Input
(4)
PIN
RF Input Power Range
20 kΩ // 68 pF between VCOMP1
and VCOMP2
−50
0
dBm
dBV
−63
−13
(5)
Logarithmic Slope
@ 900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
−1.74
−1.62
−1.60
−1.59
–50.4
–52.3
–51.9
–52.3
55.7
@ 1800 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
μA/dB
@ 1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(5)
Logarithmic Intercept
@ 900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 1800 MHz, 20 kΩ // 68 if
between VCOMP1 and VCOMP2
dBm
@ 1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(3)
RIN
DC Resistance
See
Ω
Error Amplifier
(3)
GBW
VO
Gain-Bandwidth Product
See
5.1
47
MHz
Output Swing from Rail
From Positive Rail, Sourcing,
IO = 7 mA
90
115
mV
mA
From Negative Rail Sinking,
IO = −7 mA
52
90
115
(6)
IO
Output Short Circuit Current
Sourcing, VO = 2.4V
Sinking, VO. = 0.2V
10
10
29.5
27.1
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA.
(2) All limits are specified by design or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Power in dBV = dBm + 13 when the impedance is 50Ω.
(5) Slope and intercept are calculated from graphs "VOUT vs. RF input power" where the current is obtained by division of the voltage by 20
kΩ.
(6) The output is not short circuit protected internally. External protection is necessary to prevent overheating and destruction or adverse
reliability.
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2.6V ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified, all limits are specified to TJ = 25°C. VDD = 2.6V. Boldface limits apply at temperature extremes (1)
.
Symbol
en
Parameter
Condition
Min
Typ
Max
Units
Output Referred Noise
fMEASURE = 10 KHz,
700
nV/√Hz
RF Input = 1800 MHz, -10 dBm,
20 kΩ // 68 pF between VCOMP1
and VCOMP2, VOUT =1.4V, set by
(3)
VRAMP
,
SR
Slew Rate
2.1
4.4
V/μs
5.0V ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all limits are specified to TJ = 25°C. VDD = 5.0V. Boldface limits apply at temperature extremes
(1)
.
Symbol
IDD
Parameter
Supply Current
Condition
Min
Typ
Max
Units
VOUT = (VDD - GND)/2
7.8
12
mA
15
In Shutdown (TX_EN = 0V)
VOUT = (VDD - GND)/2
0.4
30
μA
(2)
VHIGH
VLOW
TON
Logic Level to Enable Power
Logic Level to Disable Power
Turn-on-Time from Shutdown
Current into TX_EN and BS Pin
See
1.8
V
V
(2)
See
0.8
6
1.5
μs
μA
IEN, IBS
0.03
5
RAMP Amplifier
VRD
VRAMP Deadband
Transconductance
155
70
206
96
265
mV
μA/V
μA
(3)
1/RRAMP
See
120
IOUT RAMP Ramp Amplifier Output Current
VRAMP = 2V
100
168
RF Input
(4)
PIN
RF Input Power Range
20 kΩ // 68 pF between VCOMP1
−50
dBm
dBV
and VCOMP2
0
−63
−13
(5)
Logarithmic Slope
@ 900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
−1.79
–1.69
−1.67
–1.65
–50.2
–52.5
–52.5
–52.9
55.7
@ 1800 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
μA/dB
@ 1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(5)
Logarithmic Intercept
@ 900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 1800 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
dBm
@ 1900 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
@ 2000 MHz, 20 kΩ // 68 pF
between VCOMP1 and VCOMP2
(3)
RIN
DC Resistance
See
Ω
Error Amplifier
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA.
(2) All limits are specified by design or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Power in dBV = dBm + 13 when the impedance is 50Ω.
(5) Slope and intercept are calculated from graphs "VOUT vs. RF input power" where the current is obtained by division of the voltage by 20
kΩ.
4
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5.0V ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise specified, all limits are specified to TJ = 25°C. VDD = 5.0V. Boldface limits apply at temperature extremes (1)
.
Symbol
GBW
Parameter
Gain-Bandwidth Product
Output Swing from Rail
Condition
Min
Typ
5.7
31
Max
Units
(3)
See
MHz
VO
From Positive Rail, Sourcing,
IO = 7 mA
80
105
mV
From Negative Rail Sinking,
35
80
IO = −7 mA
105
(6)
IO
Output Short Circuit Current
Output Referred Noise
Sourcing, VO = 4.8V
Sinking, VO = 0.2V
15
15
31.5
31.5
770
mA
en
fMEASURE = 10 kHz,
nV/√Hz
RF Input = 1800 MHz, -10dBm,
20 kΩ // 68 pF between VCOMP1
and VCOMP2, VOUT = 1.4V, set by
(3)
VRAMP
,
SR
Slew Rate
2.5
4.9
V/μs
(6) The output is not short circuit protected internally. External protection is necessary to prevent overheating and destruction or adverse
reliability.
CONNECTION DIAGRAM
1
2
3
4
10
9
1
2
3
4
5
GND
OUT1
OUT 2
COMP 1
BS
8
COMP 2
10
9
7
DIE ID
V
TX_EN
DD
RF
6
V
RAMP
IN
8
7
6
5
Figure 1. WSON-10
Top View
Figure 2. Bond Pad Layout
Top View
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BOND PAD MECHANICAL DIMENSIONS(1)
X/Y Coordinates
Pad Size
Signal Name
Out 1
Pad Number
X
Y
X
Y
1
2
−281
−281
−281
−281
−281
281
617
490
363
236
−617
−617
−360
−118
20
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
Out 2
Comp2
VDD
3
4
RFIN
5
VRAMP
TX_EN
BS
6
7
281
8
281
Comp1
GND
9
281
10
281
187
(1) Dimensions of the bond pad coordinates are in μm Origin of the coordinates: center of the die Coordinates refer to the center of the
bond pad
PIN DESCRIPTIONS(1)
Pin
4
Name
VDD
Description
Power Supply
Digital Inputs
Positive Supply Voltage
Power Ground
10
7
GND
TX_EN
Schmitt-triggered logic input. A LOW shuts down the whole chip for
battery saving purposes. A HIGH enables the chip.
8
5
6
9
BS
Schmitt-triggered Band Select pin. When BS = H, channel 1 (OUT1)
is selected, when BS = L, channel 2 (OUT2) is selected.
Analog Inputs
Compensation
RFIN
RF Input connected to the Coupler output with optional attenuation to
measure the Power Amplifier (PA) / Antenna RF power levels.
VRAMP
Comp1
Sets the RF output power level. The useful input voltage range is
from 0.2V to 1.8V, although voltages from 0V to VDD are allowed.
Connects an external RC network between the Comp1 pin and the
Comp2 pin for an overall loop compensation and to control the
closed loop frequency response. Conventional loop stability
techniques can be used in selecting this network, such as Bode
plots. A good starting value for the RC combination will be C = 68 pF
and R = 0Ω.
3
Comp2
Frequency compensation pin. The BS signal switches this pin either
to OUT1 or to OUT2.
Output
1
2
Out1
Out2
This pin is connected to the PA of either channel 1 or channel 2.
(1) 1. All inputs and outputs are referenced to GND (pin 10).
2. For the digital inputs, a LOW is < 0.8V and a HIGH is > 1.8V.
3. RF power detection is performed internally in the LMV242 and only an RF power coupler with optional extra attenuation has to be
used.
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BLOCK DIAGRAM
COMP1
9
ERROR AMP 1
RAMP
6
4
V/I
-
1
8
3
OUT1
BS
+
V
DD
COMP2
RAMP
CONVERTER
SWITCH
-
2
OUT2
GND
10
7
+
ERROR AMP 2
TX_EN
RF
IN
5
LMV242
10dB
10dB
10dB
10dB
DUAL CHANNEL
QUAD-BAND GSM
CONTROLLER
DETECTOR
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified, VDD = +2.6V, TJ = 25°C.
Supply Current
VOUT and Log Conformance
vs.
vs.
Supply Voltage
RF Input Power
11
10
9
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
5
85°C
4
V
OUT
3
25°C
1900 MHz
2
1
8
ERROR
0
7
-1
-2
-3
-4
-5
900 MHz
6
1800 MHz
-40°C
5
2000 MHz
4
-70 -60 -50 -40 -30 -20 -10
0
10 20
2.5
3
3.5
4.5
5
5.5
4
RF INPUT POWER (dBm)
SUPPLY VOLTAGE (V)
Figure 3.
Figure 4.
VOUT and Log Conformance
vs.
RF Input Power @ 900 MHz
VOUT and Log Conformance
vs.
RF Input Power @ 1800 MHz
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
5
5
4
4
V
OUT
V
OUT
3
3
25°C
2
2
-40°C
25°C
1
1
-40°C
85°C
0
0
ERROR
ERROR
85°C
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
-40°C
25°C
85°C
-40°C
25°C
85°C
-70 -60 -50 -40 -30 -20 -10
0
10 20
-70 -60 -50 -40 -30 -20 -10
0
10 20
RF INPUT POWER (dBm)
RF INPUT POWER (dBm)
Figure 5.
Figure 6.
VOUT and Log Conformance
vs.
RF Input Power @ 1900 MHz
VOUT and Log Conformance
vs.
RF Input Power @ 2000 MHz
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
5
5
4
4
V
OUT
V
OUT
3
3
25°C
25°C
2
2
1
1
-40°C
-40°C
85°C
0
0
ERROR
ERROR
85°C
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
-40°C
25°C
85°C
-40°C
25°C
85°C
-70 -60 -50 -40 -30 -20 -10
0
10 20
-70 -60 -50 -40 -30 -20 -10
0
10 20
RF INPUT POWER (dBm)
RF INPUT POWER (dBm)
Figure 7.
Figure 8.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VDD = +2.6V, TJ = 25°C.
Logarithmic Slope
Logarithmic Intercept
vs.
vs.
Frequency
Frequency
-49.5
-1.50
85°C
-50.0
-50.5
-1.55
-40°C
-1.60
25°C
-51.0
-51.5
-52.0
-52.5
-53.0
25°C
-1.65
-40°C
-1.70
85°C
-1.75
-1.80
400
800
1200
1600
2000
400
800
1200
1600
2000
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 9.
Figure 10.
RF Input Impedance
vs.
Frequency @ Resistance and Reactance
Gain and Phase
vs.
Frequency
80
120
90
60
30
0
60
PHASE
R
50
60
40
20
0
40
30
20
10
GAIN
0
X
-20
-40
-30
-10
-60
-20
10k
100k
1M
10M
100M
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1
FREQUENCY (Hz)
FREQUENCY (GHz)
Figure 11.
Figure 12.
ICOMP
vs.
VRAMP
PIN
vs.
VRAMP
40
160
140
120
30
20
MAX PA OUTPUT LEVEL
10
0
100
80
-10
60
40
20
0
-20
-30
-40
-20
-40
-50
-60
0
0.25 0.5 0.75
1
1.25 1.5 1.75
(V)
2
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6
V
V
(V)
RAMP
RAMP
Figure 13.
Figure 14.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VDD = +2.6V, TJ = 25°C.
Sourcing Current
Sinking Current
vs.
Output Voltage
vs.
Output Voltage
160
140
160
140
120
100
80
-40°C
-40°C
120
100
25°C
25°C
80
85°C
85°C
60
40
20
60
40
20
V
= 1V
V
= 1.4V
COMP1
COMP1
0
0
0
0.4 0.8 1.2 1.6
(V)
2
2.4 2.8
0
0.4 0.8 1.2 1.6
(V)
2
2.4 2.8
V
V
OUT
OUT
Figure 15.
Figure 16.
Output Voltage
vs.
Sourcing Current
Output Voltage
vs.
Sinking Current
2
1.5
1
3
V
= 1.4V
COMP1
2.5
-40°C
2
1.5
1
85°C
85°C
25°C
25°C
0.5
0
0.5
0
V
= 1V
COMP1
20
-40°C
80
0
40
60
80
100
0
20
40
60
100
I
(mA)
SINK
I
(mA)
SOURCE
Figure 17.
Figure 18.
Closed Loop POUT (PA)
vs.
VRAMP @ GSM 900 MHz Band
Closed Loop POUT (PA)
vs.
VRAMP @ DCS 1800 MHz Band
40
30
20
10
0
40
30
20
10
0
85°C
85°C
25°C
25°C
-40°C
-40°C
-40°C
-10
-20
-10
-20
25°C
85°C
0.75
0
0.25
0.5
0.75
1
1.25
1.5
0
0.25
0.5
1
1.25
1.5
V
RAMP
(V)
V
RAMP
(V)
Figure 19.
Figure 20.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VDD = +2.6V, TJ = 25°C.
Closed Loop POUT (PA)
vs.
VRAMP @ PCS 1900 MHz Band
Closed Loop GSM- 900 MHz Band
60
40
40
85°C
30
25°C
20
20
0
-40°C
25°C
10
0
-20
-40°C
85°C
LIMIT
-10
-40
-60
25°C
85°C
-20
TIME (60 ms/DIV)
0
0.25
0.5
0.75
1
1.25
1.5
V
RAMP
(V)
Figure 21.
Figure 22.
Closed Loop DCS-1800 MHz Band
Closed Loop PCS-1900 MHz Band
60
40
60
40
20
0
20
0
-40°C
25°C
-40°C
25°C
-20
-20
LIMIT
85°C
LIMIT
85°C
-40
-60
-40
-60
TIME (60 ms/DIV)
TIME (60 ms/DIV)
Figure 23.
Figure 24.
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APPLICATION SECTION
POWER CONTROL PRINCIPLES
The LMV242 is a member of the power loop controller family of TI, for quad-band TDMA/GSM solutions. The
typical application diagram demonstrates a basic approach for implementing the quad-band solution around an
RF Power Amplifier (PA). The LMV242 contains a 50 dB Logamp detector and interfaces directly with the
directional coupler.
The LMV242 Base Band (control-) interface consists of 3 signals: TX_EN to enable the device, BS to select
either output 1 or output 2 and VRAMP to set the RF output power to the specified level. The LMV242 gives
maximum flexibility to meet GSM frequency- and time mask criteria for many different single supply Power
Amplifier types like HBT or MesFET in GaAs, SiGe or Si technology. This is accomplished by the programmable
Ramp characteristic from the Base Band and the TX_EN signal along with the external compensation capacitor.
POWER AMPLIFIER CONTROLLED LOOP
This section gives a general overview and understanding of how a typical Power Amplifier control loop works and
how to solve the most common problems confronted in the design.
General Overview
The key benefit of a PA control loop circuit is its immunity to changes in the PA gain control function. When a PA
controller is used, the relationship between gain and gain control voltage (VAPC) of the PA is of no consequence
to the overall transfer function. It is a function of the controller's VRAMP voltage. Based upon the value of VRAMP
,
the PA controller will set the gain control voltage of the PA to a level that is necessary to produce the desired
output level. Any temperature dependency in the PA gain control function will be eliminated. Also, non-linearity’s
in the gain transfer function of the PA do not appear in the overall transfer function (POUT vs. VRAMP). The only
requirement is that the gain control function of the PA has to be monotonic. To achieve this, it is crucial, that the
LMV242’s detector is temperature stable.
Typical PA Closed Loop Control Setup
A typical setup of PA control loop is depicted in Figure 25. Beginning at the output of the Power Amplifier (PA),
this signal is fed, usually via a directional coupler, to a detector. The error between the detector output current
IDET and the ramp current IRAMP, representing the selected power setting, drives the inverting input of an op amp,
configured as an integrator. A reference voltage drives the non-inverting input of the op amp. Finally the output of
the integrator op amp drives the gain control input of the power amplifier, which sets the output power. The loop
is stabilized when IDET is equal to IRAMP . Lets examine how this circuit works in detail.
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P
P
IN1
ANTENNA
PA1
PA2
SWITCH
COUPLER
50W
V
APC1
IN2
C
V
APC2
COMP1
ERROR AMP1
DETECTOR
OUT1
-
I
DET
+
RF
IN
V/I
COMP2
OUT2
-
V
RAMP
+
+
I
RAMP
LMV242
ERROR AMP2
BS
Figure 25. PA Control Loop
We will assume initially that the output of the PA is at some low level and that the VRAMP voltage is at 1V. The V/I
converter converts the VRAMP voltage to a sinking current IRAMP. This current can only come from the integrator
capacitor C. Current flow from this direction increases the output voltage of the integrator. The output voltage,
which drives the VAPC of the PA, increases the gain (we assume that the PA’s gain control input has a positive
sense, that is, increasing voltage increases gain). The gain will increase, thereby increasing the amplifier’s output
level until the detector output current equals the ramp current IRAMP. At that point, the current through the
capacitor will decrease to zero and the integrator output will be held constant, thereby settling the loop. If
capacitor charge is lost over time, output voltage will decrease. However, this leakage will quickly be corrected
by additional current from the detector. The loop stabilizes to IDET = IRAMP thereby creating a direct relation
between the VRAMP set voltage and the PA output power, independent of the PA's VAPC-POUT characteristics.
Power Control Over Wide Dynamic Range
The circuit as described so far, has been designed to produce a temperature independent output power level. If
the detector has a high dynamic range, the circuit can precisely set PA output levels over a wide power range.
To set a PA output power level, the reference voltage, VRAMP, is varied. To estimate the response of POUT vs.
VRAMP, PIN vs. VRAMP of the LMV242 should be known (POUT = PIN + attenuation as discussed in ATTENUATION
BETWEEN COUPLER AND LMV242 DETECTOR).
The relation between PIN and VRAMP can be constructed out of 2 curves:
•
•
ICOMP vs, VRAMP
VOUT vs. RF Input Power (detection curve)
IOUT can be calculated by dividing the VOUT of the detection curve by the feedback resistor used for measuring.
With the knowledge that ICOMP = IOUT in a closed loop the resulting function PIN vs. VRAMP is shown in Figure 26.
Extra attenuation should be inserted between PA output and LMV242’s PIN to match their dynamic ranges.
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40
30
20
MAX PA OUTPUT LEVEL
10
0
-10
-20
-30
-40
-50
-60
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6
V
(V)
RAMP
Figure 26. PIN vs. VRAMP
Using a closed loop to control the PA has benefits over the use of a directly controlled PA. Non-linearity's and
temperature variations present in the PA transfer function do not appear in the overall transfer function, POUT vs.
VRAMP The response of a typical closed loop is given in Figure 27. The shape of this curve is determined by the
response of the controller’s detector. Therefore the detector needs to be accurate, temperature stable and
preferably linear in dB to achieve a accurately controlled output power. The only requirement for the control loop
is that the gain control function of the PA has to be monotonic. With a linear in dB detector, the relation between
VRAMP and PA output power becomes linear in dB as well, which makes calibration of the system easy.
40
85°C
30
25°C
-40°C
20
10
0
-40°C
-10
-20
0
0.25
0.5
0.75
1
1.25
1.5
V
RAMP
(V)
Figure 27. Closed Loop Response
The response time of the loop can be controlled by varying the RC time constant of the integrator. Setting this at
a low level will result in fast output settling but can result in ringing in the output envelope. Setting the RC time
constant to a high value will give the loop good stability but will increase settling time.
ATTENUATION BETWEEN COUPLER AND LMV242 DETECTOR
Figure 28 shows a practical RF power control loop realized by using TI’s LMV242 with integrated RF detector.
The RF signal from the PA passes through a directional coupler on its way to the antenna. Directional couplers
are characterized by their coupling factor, which is in the 10 dB to 30 dB range, typical 20 dB. Because the
coupled output must in its own right deliver some power (in this case to the detector), the coupling process takes
some power from the main output. This manifests itself as insertion loss, the insertion loss being higher for lower
coupling factors.
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It is very important to choose the right attenuation between PA output and detector input to achieve power
control over the full output power range of the PA. A typical value for the output power of the PA is +35.5 dBm for
GSM and +30 dBm for PCS/DCS. In order to accommodate these levels into the LMV242 detection range the
minimum required total attenuation is about 35 dBm (please refer to typical performance characteristics in the
datasheet and Figure 26). A typical coupler factor is 20 dB. An extra attenuation of about 15 dB should be
inserted.
Extra attenuation Z between the coupler and the RF input of the LMV242 can be achieved by 2 resistors RX and
RY according to Figure 27, where
Z = 20 LOG (RIN / [RIN + RY])
(1)
or
«
z
∆
∆
≈
≈
-
20
∆
RY = RIN
·
-1
10
∆
«
(2)
e.g. RY = 300Ω results in an attenuation of 16.9 dB.
To prevent reflection back to the coupler the impedance seen by the coupler should be 50Ω (RO). The
impedance consists of RX in parallel with RY + RIN. RX can be calculated with the formula:
RX = [RO * (RY + RIN)] / RY
RX = 50 * [1 + (50 / RY)]
(3)
(4)
e.g. with RY = 300Ω, RIN = 50Ω → RX = 58Ω.
ANTENNA
COUPLER
PA
50W
OUT2
OUT1
LMV242
COMP1
RF
IN
R
IN
50W
R
Y
COMP2
R
X
TX_EN
V
RAMP
BS
Figure 28. Simplified PA Control Loop with Extra Attenuation
BASEBAND CONTROL OF THE LMV242
The LMV242 has 3 baseband-controlled inputs:
•
•
•
VRAMP signal (Base band DAC ramp signal)
TX_EN is a digital signal (performs the function “Shutdown/Transmit Enable”).
Band Select (BS)
VRAMP Signal
The actual VRAMP input value sets the RF output power. By applying a certain mask shape to the “Ramp in” pin,
the output voltage level of the LMV242 is adjusting the PA control voltage to get a power level (POUT/dBm) out of
the PA, which is proportional to the single ramp voltage steps. The recommended VRAMP voltage range for RF
power control is 0.2V to 2.0V. The VRAMP input will tolerate voltages from 0V to VDD without malfunction or
damage. The VRAMP input does not change the output level until the level reaches about 206 mV, so offset
voltages in the DAC or amplifier supplying the RAMP signal will not cause excess RF signal output and increased
power consumption.
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Transmit Enable
Power consumption requirements are supported by the TX_EN function, which puts the entire chip into a power
saving mode to enable maximum standby and talk time while ensuring the output does not glitch excessively
during Power-up and Power-down. The device will be active in the case TX_EN = High, or otherwise go to a low
power consumption shutdown mode. During shutdown the output is pulled low to minimize the output voltage.
Band Select
The LMV242 is especially suitable for PA control loops with 2 PA’s. The 2 outputs to steer the VAPCS of the PA’s
can be controlled with the band select pin. When the band select is LOW output2 is selected, while output1 is
selected when band select is HIGH. The not-selected output is pulled low.
Analog Output
The output is driven by a rail-to-rail amplifier capable of both sourcing and sinking. Several curves are given in
the Typical performance characteristics section regarding the output. The output voltage vs. sourcing/sinking
current curves show the typical voltage drop from the rail over temperature. The sourcing/sinking current vs.
output voltage characteristics show the typical charging/discharging current, which the output is capable of
delivering at a certain voltage. The output is free from glitches when enabled by TX_EN. When TX_EN is low,
the selected output voltage is fixed or near GND.
FREQUENCY COMPENSATION
To compensate and prevent the closed loop arrangement from oscillations and overshoots at the output of the
RF detector/error amplifier of the LMV242, the system can be adjusted by means of external RC components
connected between Comp1 and Comp2. Exact values heavily depend on PA characteristics. A good starting
point is R = 0Ω and C = 68 pF. The vast combination of PA’s and couplers available preclude a generalized
formula for choosing these components. Additional frequency compensation of the closed loop system can be
achieved by adding a resistor (and if needed an inductor) between the LMV242’s output and the VAPC input of the
PA. Please contact TI for additional support.
TIMING DIAGRAM
In order to meet the timemask specifications for GSM, a good timing between the control signals and the RF
signal is essential. According to the specifications the PA’s RF output power needs to ramp within 28 μsec with
minimum overshoot. To achieve this, the output of the PA controller should ramp at the same time as the RF
signal from the Base Band. The ramp signal sets the controllers output to the required value, where the loop
needs a certain time to set this output. Therefore the ramp should be set high some time before the output has to
be high. How much time depends on the setup and the PA used. If the controllers shutdown functionality is used,
the shutdown should be set high about 6 μsec before the ramp is set high.
The control loop can be configured by the following variables:
•
•
•
•
Lead time TX_EN event vs. start GSM burst
Lead time VRAMP vs. start GSM burst
Ramp profile
Loop compensation
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6 msec
MINIMUM
TX_EN
V
RAMP
OUT
RF SIGNAL
TIMING V
RAMP
vs. RF SIGNAL
Figure 29. Timing VRAMP vs. RF Signal
1
2
3
4
10
DIE ID
9
8
7
5
6
Figure 30. 10-Pad Bare Die
Die / Wafer Characteristics
Fabrication Attributes
Physical Die Identification
Die Step
LMV242A
A
Physical Attributes
Wafer Diameter
Die Size (Drawn)
200 mm
889 μm x 1562 μm
35.0 mils x 61.5 mils
216 μm Nominal
123 μm Nominal
Thickness
Min Pitch
Table 1. General Die Information
Bond Pad Opening Size (min)
Bond Pad Metallization
Passivation
92 μm x 92μm
0.5% Copper_Bal. Aluminum
VOM Nitride
Back Side Metal
Bare Back
Back Side Connection
Floating
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NOTE
Actual die size is rounded to the nearest micron
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SNWS014C –APRIL 2004–REVISED MAY 2013
REVISION HISTORY
Changes from Revision B (May 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 18
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2015
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LMV242LD/NOPB
ACTIVE
WSON
NGY
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
242LD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2015
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMV242LD/NOPB
WSON
NGY
10
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
*All dimensions are nominal
Device
Package Type Package Drawing Pins
WSON NGY 10
SPQ
Length (mm) Width (mm) Height (mm)
213.0 191.0 55.0
LMV242LD/NOPB
1000
Pack Materials-Page 2
MECHANICAL DATA
NGY0010A
LDA10A (Rev B)
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相关型号：
LMV243BLX/NOPB
SPECIALTY TELECOM CIRCUIT, PBGA8, 1.50 X 1.50 MM, 0.995 MM HEIGHT, MICRO, BUMP, SMD-8
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