LME49880MRX [NSC]
Dual JFET Input Audio Operational Amplifier; 双路JFET输入音频运算放大器
| 型号： | LME49880MRX |
| 厂家： | 
National Semiconductor |
| 描述： | Dual JFET Input Audio Operational Amplifier |
| 文件： | 总14页 (文件大小：492K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 22, 2010
LME49880 Overture®
E-Series
Dual JFET Input Audio Operational Amplifier
General Description
Key Specifications
The LME49880 is part of the ultra-low distortion, low noise,
high slew rate operational amplifier series optimized and fully
specified for high performance, high fidelity application. The
LME49880 is developed in JFET technology and reducing the
flicker noise as well as the noise corner frequency significant-
ly. It combines low voltage noise density (7nV/√Hz) with very
low THD+N (0.00003%). The LME49880 has a high slew rate
of ±17 V/μs and an output current capability of ±22mA. It
drives 600Ω loads to within 1.3V of either power supply volt-
age.
■ꢀInput Bias Current
■ꢀPower Supply Voltage Range
■ꢀTHD+N
ꢀ(AV = 1, VOUT = 3VRMS, fIN = 1kHz)
5pA (typ)
±5V to ±17V
RL = 2kΩ
0.00003% (typ)
0.00003% (typ)
±17V/μs (typ)
25MHz (typ)
RL = 600Ω
■ꢀSlew Rate
The LME49880 has a wide supply range of ±5V to ±17V. Its
outstanding GAIN (120dB), and low input bias current (5pA)
give the amplifier excellent operational amplifier DC perfor-
mance. The LME49880 is unity gain stable and capable of
driving complex loads with values as high as 100pF. It is
available in an 8-lead narrow body PSOP.
■ꢀGain Bandwidth Product
■ꢀOpen Loop Gain (RL = 600Ω)
■ꢀInput Noise Density
■ꢀInput Offset Voltage
■ꢀCMRR
115dB (typ)
7nV/√Hz (typ)
5mV (typ)
110dB (typ)
Features
Easily drives 600Ω loads
Output short circuit protection
■
■
Applications
Ultra high quality audio signal processing
■
■
■
■
Preamplifier
Spectrum analyzers
Ultrasound preamplifier
Active filters
■
Typical Application
ꢁ
VCC = ±15V, VO = 3VRMS, RL = 600Ω
300596t9
300596s0
FIGURE 1: Current Noise and Voltage Spectral Density
FIGURE 2: THD+N vs Frequency
Overture® is a registered trademark of National Semiconductor.
© 2010 National Semiconductor Corporation
300596
www.national.com
Connection Diagram
30059655
Order Number LME49880MR
See NS Package Number — MRA08B
Ordering Information
Ordering Information
Order Number
Package
Package DWG #
Transport Media
MSL Level
Green Status
8 Ld PSOP
with Exposed Pad
LME49880MR
MRA08B
95 units
3
3
RoHS and noSb/Br
8 Ld PSOP
with Exposed Pad
LME49880MRX
MRA08B
2500 units on rail
RoHS and noSb/Br
www.national.com
2
ESD Rating (Note 8)
Junction Temperature
Thermal Resistance
ꢁθJA (PSOP)
Solder Information
Infrared or Convection (20 sec)
1000V
150°C
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
55°C/W
260°C
Power Supply Voltage
(VS = V+ - V-)
Storage Temperature
Input Voltage
36V
−65°C to 150°C
Operating Ratings (Note 1)
Temperature Range
(V-)ꢀ-ꢀ0.3V to (V+)ꢀ+ꢀ0.3V
Continuous
Output Short Circuit (Note 3)
Power Dissipation
ESD Rating (Note 4)
ESD Rating (Note 5)
Internally Limited
2000V
TMIN ≤ TA ≤ TMAX
Supply Voltage Range
–40°C ≤ TA ≤ 85°C
±5V ≤ VS ≤ ±17V
200V
Electrical Characteristics (Note 2) The following specifications apply for VS = ±15V, TA = 25°C, unless
otherwise specified.
LME49880
Unit s
(Limits)
Symbol
Parameter
Conditions
Typical
Limit
(Note 6)
(Note 7)
AV = 1, VOUT = 3VRMS
RL = 2kΩ
RL = 600Ω
THD+N
Total Harmonic Distortion + Noise
% (max)
0.00003
0.00003
0.00009
19
GBWP
SR
Gain Bandwidth Product
Slew Rate
AV = 1k, RL = 2k
RL = 2k
25
MHz (min)
±17
±12
V/μs (min)
AV = –1, 10V step, CL = 100pF
0.1% error range
ts
Settling time
0.8
0.7
μs
μVRMS
(max)
fBW = 20Hz to 20kHz
Equivalent Input Noise Voltage
Equivalent Input Noise Density
1.6
11
eN
f = 1kHz
f = 10Hz
7
16
ꢀnV/√Hz
(max)
iN
Current Noise Density
Offset Voltage
f = 1kHz
6
ꢀfA/√Hz
mV (max)
VOS
±5
±10
Average Input Offset Voltage Drift
vs Temperature
ΔVOS/ΔTemp
3
–40°C ≤ TA ≤ 85°C
μV/°C
Power Supply Rejection Ratio
Input Bias Current
VCC = ±5V to ±15V
VCM = 0V
PSRR
IB
110
5
dB
150
100
pA (max)
pA (max)
IOS
VCM = 0V
Input Offset Current
2
+11.5
–11.5
(V+) –5V
(V-) +5V
VIN-CM
CMRR
Common-Mode Input Voltage Range CMRR > 55dB
V (min)
Common-Mode Rejection
–10V<Vcm<10V
110
115
90
dB (min)
dB (min)
dB (min)
dB (min)
V (min)
V (min)
V (min)
mA
–10V<Vout<10V, RL = 600Ω
–10V<Vout<10V, RL = 2kΩ
–10V<Vout<10V, RL = 10kΩ
RL = 600Ω
100
AVOL
Open Loop Voltage Gain
120
100
120
100
±13.2
±13.2
±13.2
±12.0
±12.5
±12.5
VOUTMAX
Maximum Output Voltage Swing
Output Current
RL = 2kΩ
RL = 10kΩ
IOUT
IOUT-CC
ROUT
IS
RL = 600Ω, VS = ±17V
±26
±48
15
Instantaneous Short Circuit Current
Output Impedance
mA
fIN = 10kHz, Open-Loop
IOUT = 0mA
Ω
Total Quiescent Current
14
18
mA (max)
3
www.national.com
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3: Amplifier output connected to GND, any number of amplifiers within a package.
Note 4: Human body model, applicable std. JESD22-A114C.
Note 5: Machine model, applicable std. JESD22-A115-A.
Note 6: Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product
characterization and are not guaranteed.
Note 7: Datasheet min/max specification limits are guaranteed by test or statistical analysis.
Note 8: Charge device model, applicable std JESD22-C101-A.
www.national.com
4
Typical Performance Characteristics
THD+N vs Frequency
VCC = 15V, VOUT = 3V
THD+N vs Frequency
VCC = 15V, VOUT = 3V
RL = 2kΩ
RL = 600Ω
300596r9
300596s0
THD+N vs Frequency
VCC = 18V, VOUT = 3V
THD+N vs Frequency
VCC = 18V, VOUT = 3V
RL = 2kΩ
RL = 600Ω
300596s1
300596s2
THD+N vs Output Voltage
VCC = 15V
THD+N vs Output Voltage
VCC = 15V
RL = 2kΩ
RL = 600Ω
300596s3
300596s4
5
www.national.com
THD+N vs Output Voltage
VCC = 18V
THD+N vs Output Voltage
VCC = 18V
RL = 2kΩ
RL = 600Ω
300596s5
300596s6
+PSRR vs Frequency
−PSRR vs Frequency
300596s7
300596t0
CMRR vs Frequency
Current Noise vs Frequency
300596t7
300596s8
www.national.com
6
Voltage Noise vs Frequency
300596t8
7
www.national.com
PSOP EXPOSED PAD PACKAGE
Application Hints
The LME49880 has an exposed pad on the bottom side of the
IC package. Connect the exposed pad to pin 4 (V-) of the IC.
The PCB footprint for the exposed pad should be a open
polygon of copper to provide a good thermal path away from
the LME49880. Use multiple vias on the exposed pad to cre-
ate better thermal conductivity. Do not route traces below the
exposed pad as they risk shorting to the exposed pad.
OUTPUT DRIVE AND STABILITY
The LME49880 is unity gain stable within the part’s common-
mode range. Some instabilities may occur near the limit of the
common-mode range. It can drive resistive load 600Ω with
output circuit with a typical 26mA. Capacitive loads up to
100pF will cause little change in the phase characteristics of
the amplifiers and are therefore allowable.
Capacitive loads greater than 100pF must be isolated from
the output. The most straight forward way to do this is to put
a resistor in series with the output. This resistor will also pre-
vent excess power dissipation if the output is accidentally
shorted. The internal short-circuit protection of LME49880 al-
so prevent the device from damage when the either outputs
are being shorted.
The effective load impedance (including feedback resistance)
should be kept above 600Ω for fast settling. Load capacitance
should also be minimized if good settling time is to be opti-
mized. Large feedback resistors will make the circuit more
susceptible to stray capacitance, so in high-speed applica-
tions keep the feedback resistors in the 1kΩ to 2kΩ range
whenever practical.
OUTPUT COMPENSATION
300596t3
In most of the audio applications, the device will be operated
in a room temperature and compensation networks are not
necessary. However, the consideration of network as shown
in Figure 3 may be taken into account for some of the high
performance audio applications such as high speed data con-
version or when operating in a relatively low junction temper-
ature. The compensation network will also provide a small
improvement in settling time for the response time demanding
applications.
FIGURE 4: LME49880 Output Compensation Network
SUPPLY BYPASSING
To achieve a low noise and high-speed audio performance,
power supply bypassing is extremely important. Applying
multiple bypass capacitors is highly recommended. From ex-
periment results, a 10μF tantalum, 2.2μF ceramic, and a
0.47μF ceramic work well. All bypass capacitors leads should
be very short. The ground leads of capacitors should also be
separated to reduce the inductance to ground. To obtain the
best result, a large ground plane layout technique is recom-
mended and it was applied in the LME49880 evaluation
board.
300596r5
FIGURE 3: LME49880 Output Compensation Network
www.national.com
8
settling will be faster for inverting applications, as well. It is
important to note that the oscilloscope input amplifier may be
overdriven during a settling time measurement, so the oscil-
loscope must be capable of recovering from overdrive very
quickly. The signal generator used for this measurement must
be able to drive 50Ω with a very clean ±10VPP square wave.
The Slew Rate of LME49880 tells how fast it responses to a
transient or a step input. It may be measured by the test circuit
in Figure 6. The Slew Rate of LME49880 is specified in close-
Application Information
SETTLING TIME AND SLEW RATE MEASUREMENTS
The settling time of LME49880 may be verified using the test
circuit in Figure 5. The LME49880 is connected for inverting
operation, and the output voltage is summed with the input
voltage step. When the LME49880’s output voltage is equal
to the input voltage, the voltage on the PROBE 1 will be zero.
Any voltage appearing at this point will represent an error. And
the settling time is equal to the time required for the error sig-
nal displayed on the oscilloscope to decay to less than one-
half the necessary accuracy (See Settling Time – Output
Swing photo). For a 10V input signal, settling time to 0.01%
(1mV) will occur when the displayed error is less than 0.5mV.
Since settling time is strongly dependent on slew rate, settling
will be faster for smaller signal swings. The LME49880’s in-
verting slew rate is faster than its non-inverting slew rate, so
loop gain = -1 when the output driving a 1kΩ load at 20VPP
.
The LME49880 behaves very stable in shape step response
and have a minimal ringing in both small and large signal step
response (See Typical Performance Characteristic). The slew
rate typical value reach as high as ±18V/μS was measured
when the output reach -20V refer to the start point when input
voltage equals to zero.
300596r6
FIGURE 5: Settling Time Test Circuit
300596r7
FIGURE 6: Slew Rate Test Circuit
9
www.national.com
DISTORTION MEASUREMENTS
the error signal (distortion) is amplified by a factor of 101. Al-
though the amplifier’s closed-loop gain is unaltered, the feed-
back available to correct distortion errors is reduced by 101,
which means that measurement resolution increases by 101.
To ensure minimum effects on distortion measurements,
keep the value of R1 low as shown in Figure 7.
The vanishingly low residual distortion produced by
LME49880 is below the capabilities of all commercially avail-
able equipment. This makes distortion measurements just
slightly more difficult than simply connecting a distortion me-
ter to the amplifier’s inputs and outputs. The solution, how-
ever, is quite simple: an additional resistor. Adding this
resistor extends the resolution of the distortion measurement
equipment.
This technique is verified by duplicating the measurements
with high closed loop gain and/or making the measurements
at high frequencies. Doing so produces distortion compo-
nents that are within the measurement equipment’s capabili-
ties. This datasheet’s THD+N and IMD values were generat-
ed using the above described circuit connected to an Audio
Precision System Two Cascade.
The LME49880’s low residual distortion is an input referred
internal error. As shown in Figure 7, adding the 10Ω resistor
connected between the amplifier’s inverting and non-inverting
inputs changes the amplifier’s noise gain. The result is that
300596k4
FIGURE 7: THD+N and IMD Distortion Test Circuit
www.national.com
10
Typical Applications
Balanced Input Mic Amp
30059643
Illustration is:
V0 = 101(V2 − V1)
Active Crossover Network for Loudspeaker
300596r8
11
www.national.com
Revision History
Rev
1.0
Date
Description
12/16/09
01/08/10
Initial released.
Input text edits.
1.01
Edited the scaling (Y-axis) on the THD+N curves to match the limits described
in the datasheet.
1.02
03/22/10
www.national.com
12
Physical Dimensions inches (millimeters) unless otherwise noted
Narrow PSOP Package
Order Number LME49880MR
NS Package Number MRA08B
13
www.national.com
Notes
For more National Semiconductor product information and proven design tools, visit the following Web sites at:
www.national.com
Products
www.national.com/amplifiers
Design Support
www.national.com/webench
Amplifiers
WEBENCH® Tools
App Notes
Audio
www.national.com/audio
www.national.com/timing
www.national.com/adc
www.national.com/interface
www.national.com/lvds
www.national.com/power
www.national.com/appnotes
www.national.com/refdesigns
www.national.com/samples
www.national.com/evalboards
www.national.com/packaging
www.national.com/quality/green
www.national.com/contacts
www.national.com/quality
www.national.com/feedback
www.national.com/easy
Clock and Timing
Data Converters
Interface
Reference Designs
Samples
Eval Boards
LVDS
Packaging
Power Management
Green Compliance
Distributors
Switching Regulators www.national.com/switchers
LDOs
www.national.com/ldo
www.national.com/led
www.national.com/vref
www.national.com/powerwise
Quality and Reliability
Feedback/Support
Design Made Easy
Applications & Markets
Mil/Aero
LED Lighting
Voltage References
PowerWise® Solutions
www.national.com/solutions
www.national.com/milaero
www.national.com/solarmagic
www.national.com/training
Serial Digital Interface (SDI) www.national.com/sdi
Temperature Sensors
PLL/VCO
www.national.com/tempsensors SolarMagic™
www.national.com/wireless
PowerWise® Design
University
THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION
(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY
OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO
SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,
IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT.
TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT
NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL
PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR
APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND
APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE
NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.
EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO
LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE
AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY
RIGHT.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected
to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.
National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other
brand or product names may be trademarks or registered trademarks of their respective holders.
Copyright© 2010 National Semiconductor Corporation
For the most current product information visit us at www.national.com
National Semiconductor
Americas Technical
Support Center
National Semiconductor Europe
Technical Support Center
Email: europe.support@nsc.com
National Semiconductor Asia
Pacific Technical Support Center
Email: ap.support@nsc.com
National Semiconductor Japan
Technical Support Center
Email: jpn.feedback@nsc.com
Email: support@nsc.com
Tel: 1-800-272-9959
www.national.com
相关型号：
©2020 ICPDF网 联系我们和版权申明