LMC7101BIM5 [NSC]
Tiny Low Power Operational Amplifier with Rail-To-Rail Input and Output; 具有轨至轨输入和输出微型低功耗运算放大器型号: | LMC7101BIM5 |
厂家: | National Semiconductor |
描述: | Tiny Low Power Operational Amplifier with Rail-To-Rail Input and Output |
文件: | 总18页 (文件大小:856K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
September 1999
LMC7101
Tiny Low Power Operational Amplifier with Rail-To-Rail
Input and Output
General Description
Features
n Tiny SOT23-5 package saves space — typical circuit
layouts take half the space of SO-8 designs
n Guaranteed specs at 2.7V, 3V, 5V, 15V supplies
n Typical supply current 0.5 mA at 5V
The LMC7101 is a high performance CMOS operational am-
plifier available in the space saving SOT 23-5 Tiny package.
This makes the LMC7101 ideal for space and weight critical
designs. The performance is similar to a single amplifier of
the LMC6482/4 type, with rail-to-rail input and output, high
open loop gain, low distortion, and low supply currents.
n Typical total harmonic distortion of 0.01% at 5V
n 1.0 MHz gain-bandwidth
The main benefits of the Tiny package are most apparent in
small portable electronic devices, such as mobile phones,
pagers, notebook computers, personal digital assistants,
and PCMCIA cards. The tiny amplifiers can be placed on a
board where they are needed, simplifying board layout.
n Similar to popular LMC6482/4
n Input common-mode range includes V− and V+
n Tiny package outside dimensions — 120 x 118 x 56 mils,
3.05 x 3.00 x 1.43 mm
Applications
n Mobile communications
n Notebooks and PDAs
n Battery powered products
n Sensor interface
Connection Diagram
5-Pin SOT23-5
DS011991-2
Top View
Package
Ordering Information
NSC Drawing
Number
MA05A
Package
Marking
Supplied As
LMC7101AIM5
LMC7101AIM5X
LMC7101BIM5
LMC7101BIM5X
A00A
1k Units on Tape and Reel
3k Units Tape and Reel
1k Units on Tape and Reel
3k Units Tape and Reel
MA05A
MA05A
MA05A
A00A
A00B
A00B
5-Pin SOT 23-5
© 1999 National Semiconductor Corporation
DS011991
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range
Junction Temperature (Note 4)
−65˚C to +150˚C
150˚C
Recommended Operating
Conditions (Note 1)
ESD Tolerance (Note 2)
2000V
±
Difference Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin
Supply Voltage
Supply Voltage
2.7V ≤ V+ ≤ 15.5V
−40˚C ≤ TJ ≤ +85˚C
325˚C/W
(V+) + 0.3V, (V−) − 0.3V
Junction Temperature Range
LMC7101AI, LMC7101BI
16V
±
5 mA
Thermal Resistance (θJA
)
±
Current at Output Pin (Note 3)
Current at Power Supply Pin
Lead Temp. (Soldering, 10 sec.)
35 mA
35 mA
260˚C
M05A Package, 5-Pin Surface Mt.
2.7V Electrical Characteristics
+
−
+
=
=
= = =
>
0V, VCM VO V /2 and RL 1 MΩ. Bold-
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
2.7V, V
face limits apply at the temperature extremes.
Typ
LMC7101AI
Limit
LMC7101BI
Limit
Symbol
VOS
Parameter
Conditions
(Note 5)
Units
(Note 6)
6
(Note 6)
9
V+ 2.7V
0.11
1
mV
max
=
Input Offset Voltage
TCVOS
Input Offset Voltage
Average Drift
µV/˚C
IB
Input Bias Current
Input Offset Current
Input Resistance
Common-Mode
1.0
0.5
64
32
64
32
pA max
pA max
Tera Ω
dB
IOS
>
RIN
1
CMRR
0V ≤ VCM ≤ 2.7V
70
0.0
3.0
55
0.0
2.7
50
0.0
2.7
V+ 2.7V
min
=
Rejection Ratio
V+
V
V
=
VCM
Input Common-Mode
Voltage Range
For CMRR ≥ 50 dB
min
V
max
dB
PSRR
Power Supply
Rejection Ratio
V+ 1.35V to 1.65V
=
V− −1.35V to −1.65V
60
3
50
45
min
=
=
VCM
0
CIN
VO
Common-Mode Input
Capacitance
pF
=
Output Swing
RL 2 kΩ
2.45
0.25
2.68
0.025
0.5
2.15
0.5
2.15
0.5
V min
V max
V min
V max
mA
=
RL 10 kΩ
2.64
0.06
0.81
0.95
2.64
0.06
0.81
0.95
IS
Supply Current
max
SR
Slew Rate
(Note 8)
0.7
0.6
V/µs
GBW
Gain-Bandwidth Product
MHz
3V DC Electrical Characteristics
+
−
+
=
=
=
=
=
=
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
3V, V
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Boldface limits apply at the temperature extremes.
Typ
LMC7101AI
Limit
LMC7101BI
Limit
Symbol
VOS
Parameter
Conditions
(Note 5)
Units
(Note 6)
4
(Note 6)
7
Input Offset Voltage
0.11
mV
www.national.com
2
3V DC Electrical Characteristics (Continued)
+
−
+
=
=
= = = =
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
3V, V
Boldface limits apply at the temperature extremes.
Typ
LMC7101AI
Limit
LMC7101BI
Limit
Symbol
Parameter
Conditions
(Note 5)
Units
(Note 6)
6
(Note 6)
9
max
TCVOS
Input Offset Voltage
Average Drift
1
µV/˚C
IB
Input Current
1.0
0.5
64
32
64
32
pA max
pA max
Tera Ω
db
IOS
Input Offset Current
Input Resistance
Common-Mode
Rejection Ratio
Input Common-Mode
Voltage Range
>
RIN
1
CMRR
0V ≤ VCM ≤ 3V
74
0.0
3.3
64
0.0
3.0
60
0.0
3.0
V+ 3V
min
=
VCM
V
For CMRR ≥ 50 dB
min
V
max
dB
PSRR
Power Supply
Rejection Ratio
V+ 1.5V to 7.5V
=
V− −1.5V to −7.5V
80
3
68
60
min
=
=
=
0
VO VCM
CIN
VO
Common-Mode Input
Capacitance
pF
=
Output Swing
RL 2 kΩ
2.8
0.2
2.6
0.4
2.6
0.4
V min
V max
V min
V max
mA
=
RL 600Ω
2.7
2.5
2.5
0.37
0.5
0.6
0.6
IS
Supply Current
0.81
0.95
0.81
0.95
max
3
www.national.com
5V DC Electrical Characteristics
+
−
+
=
=
= = = =
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
5V, V
Boldface limits apply at the temperature extremes.
Typ
LMC7101AI
LMC7101BI
Symbol
VOS
Parameter
Conditions
(Note 5)
Limit
Limit
Units
(Note 6)
(Note 6)
V+ 5V
0.11
1.0
3
7
mV
max
=
Input Offset Voltage
5
9
TCVOS
Input Offset Voltage
Average Drift
µV/˚C
IB
Input Current
1
64
32
64
32
pA max
pA max
Tera Ω
db
IOS
Input Offset Current
Input Resistance
Common-Mode
0.5
>
RIN
1
CMRR
0V ≤ VCM ≤ 5V
82
65
60
60
55
Rejection Ratio
min
dB
+PSRR
−PSRR
VCM
Positive Power Supply
Rejection Ratio
V+ 5V to 15V
=
82
70
65
V− 0V, VO 1.5V
65
62
min
dB
=
=
V− −5V to −15V
82
70
65
=
Negative Power Supply
Rejection Ratio
V+ 0V, VO −1.5V
65
62
min
V
=
=
Input Common-Mode
Voltage Range
For CMRR ≥ 50 dB
−0.3
5.3
3
−0.20
0.00
5.20
5.00
−0.20
0.00
5.20
5.00
min
V
max
pF
CIN
VO
Common-Mode
Input Capacitance
Output Swing
=
RL 2 kΩ
4.9
0.1
4.7
0.3
24
4.7
4.6
4.7
4.6
V
min
V
0.18
0.24
4.5
0.18
0.24
4.5
max
V
=
RL 600Ω
4.24
0.5
4.24
0.5
min
V
0.65
16
0.65
16
max
mA
min
mA
min
mA
max
=
Sourcing, VO 0V
ISC
Output Short Circuit
Current
11
11
=
Sinking, VO 5V
19
11
11
7.5
7.5
IS
Supply Current
0.5
0.85
1.0
0.85
1.0
5V AC Electrical Characteristics
+
−
+
=
=
=
=
=
=
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
5V, V
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Boldface limits apply at the temperature extremes.
Typ
LMC7101AI
Limit
LMC7101BI
Limit
Symbol
Parameter
Total Harmonic
Conditions
(Note 5)
Units
(Note 6)
(Note 6)
=
=
T.H.D.
F
10 kHz, AV −2
0.01
%
=
=
Distortion
RL 10 kΩ, VO 4.0 VPP
SR
Slew Rate
1.0
1.0
V/µs
MHz
GBW
Gain__Bandwidth Product
www.national.com
4
15V DC Electrical Characteristics
+
−
+
=
=
= = = =
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
15V, V
Boldface limits apply at the temperature extremes.
Typ
LMC7101AI
Limit
LMC7101BI
Limit
Symbol
Parameter
Conditions
(Note 5)
Units
(Note 6)
(Note 6)
VOS
Input Offset Voltage
Input Offset Voltage
Average Drift
0.11
1.0
mV max
µV/˚C
TCVOS
IB
Input Current
1.0
0.5
64
32
64
32
pA max
pA max
Tera Ω
dB
IOS
Input Offset Current
Input Resistance
Common-Mode
>
RIN
1
CMRR
0V ≤ VCM ≤ 15V
82
70
65
65
60
Rejection Ratio
min
+PSRR
−PSRR
VCM
Positive Power Supply
Rejection Ratio
V+ 5V to 15V
=
82
70
65
dB
V− 0V, VO 1.5V
65
62
min
=
=
V− −5V to −15V
82
70
65
dB
=
Negative Power Supply
Rejection Ratio
V+ 0V, VO −1.5V
65
62
min
=
=
V+ 5V
−0.3
15.3
340
24
−0.20
0.00
15.20
15.00
80
−0.20
0.00
15.20
15.00
80
V
=
Input Common-Mode
Voltage Range
For CMRR ≥ 50 dB
min
V
max
V/mV
=
AV
Large Signal
Voltage Gain
RL 2 kΩ
Sourcing
(Note 7)
40
40
Sinking
15
15
10
10
=
RL 600Ω Sourcing
300
15
34
34
V/mV
(Note 7)
Sinking
6
6
CIN
VO
Input Capacitance
Output Swing
3
pF
V
V+ 15V
=
14.7
14.4
14.2
0.32
0.45
13.4
13.0
1.0
14.4
14.2
0.32
0.45
13.4
13.0
1.0
=
RL 2 kΩ
min
V
0.16
14.1
0.5
50
max
V
V+ 15V
=
=
RL 600Ω
min
V
1.3
1.3
max
mA
min
mA
min
mA
max
=
ISC
Output Short Circuit
Current
Sourcing, VO 0V
30
30
(Note 9)
20
20
=
Sinking, VO 12V
50
30
30
(Note 9)
20
20
IS
Supply Current
0.8
1.50
1.71
1.50
1.71
5
www.national.com
15V AC Electrical Characteristics
+
−
+
=
=
=
=
=
=
Unless otherwise specified, all limits guaranteed for TJ 25˚C, V
15V, V
0V, VCM 1.5V, VO V /2 and RL 1 MΩ.
Boldface limits apply at the temperature extremes.
Typ LMC7101AI LMC7101BI
Symbol
Parameter
Slew Rate
Conditions
(Note 5)
1.1
Limit
(Note 6)
0.5
Limit
(Note 6)
0.5
Units
V+ 15V
(Note 8)
V+ 15V
V/µs
min
MHz
Deg
dB
=
SR
0.4
0.4
=
GBW
φm
Gain-Bandwidth Product
Phase Margin
1.1
45
10
37
Gm
en
Gain Margin
=
1 kHz
Input-Referred
F
=
VCM 1V
Voltage Noise
=
in
Input-Referred
F
F
1 kHz
1.5
Current Noise
=
=
T.H.D.
Total Harmonic Distortion
10 kHz, AV −2
0.01
%
=
=
RL 10 kΩ, VO 8.5 VPP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short operation at elevated ambient temperature can result in exceeding the maximum
allowed junction temperature at 150˚C.
=
, θ and T . The maximum allowable power dissipation at any ambient temperature is PD (T
A J(max)
Note 4: The maximum power dissipation is a function of T
J(max) JA
− T )/θ . All numbers apply for packages soldered directly into a PC board.
JA
A
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
=
=
1.5V and R connect to 7.5V. For Sourcing tests, 7.5V ≤ V ≤ 12.5V. For Sinking tests, 2.5V ≤ V ≤ 7.5V.
Note 7:
Note 8:
V
15V, V
CM
L
O
O
+
=
=
V
15V. Connected as a Voltage Follower with a 10V step input. Number specified is the slower of the positive and negative slew rates. R
100 kΩ con-
L
=
nected to 7.5V. Amp excited with 1 kHz to produce V
10 V .
PP
O
+
+
Note 9: Do not short circuit output to V when V is greater than 12V or reliability will be adversely affected.
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6
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless specified
2.7V PERFORMANCE
Open Loop
Frequency Response (2.7V)
Input Voltage vs
Output Voltage (2.7V)
Gain and Phase vs
Capacitance Load (2.7V)
DS011991-16
DS011991-17
DS011991-20
DS011991-23
DS011991-18
Gain and Phase vs
Capacitance Load (2.7V)
dVOS vs
Supply Voltage
dVOS vs Common
Mode Voltage (2.7V)
DS011991-19
DS011991-21
Sinking Current vs
Output Voltage (2.7V)
Sourcing Current vs
Output Voltage (2.7V)
DS011991-22
7
www.national.com
=
Typical Performance Characteristics Single Supply, TA 25˚C unless specified
3V PERFORMANCE
Open Loop
Frequency Response (3V)
Input Voltage vs
Output Voltage (3V)
Input Voltage Noise
vs Input Voltage (3V)
DS011991-25
DS011991-24
DS011991-26
Sourcing Current
vs Output Voltage (3V)
Sinking Current vs
Output Voltage (3V)
CMRR vs Input Voltage (3V)
DS011991-29
DS011991-27
DS011991-28
5V PERFORMANCE
Open Loop
Frequency Response (5V)
Input Voltage vs
Output Voltage (5V)
Input Voltage Noise
vs Input Voltage (5V)
DS011991-31
DS011991-30
DS011991-32
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8
5V PERFORMANCE (Continued)
Sourcing Current
vs Output Voltage (5V)
Sinking Current vs
Output Voltage (5V)
CMRR vs Input Voltage (5V)
DS011991-35
DS011991-33
DS011991-34
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless specified
Open Loop
Frequency Response (15V)
Input Voltage vs
Output Voltage (15V)
Input Voltage Noise
vs Input Voltage (15V)
DS011991-36
DS011991-37
DS011991-38
Sourcing Current vs
Output Voltage (15V)
Sinking Current vs
Output Voltage (15V)
CMRR vs Input Voltage (15V)
DS011991-41
DS011991-39
DS011991-40
9
www.national.com
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless
specified (Continued)
Supply Current vs
Supply Voltage
Input Current vs
Temperature
Output Voltage Swing
vs Supply Voltage
DS011991-42
DS011991-44
DS011991-43
DS011991-46
DS011991-49
Input Voltage Noise
vs Frequency
Positive PSRR
vs Frequency
Negative PSRR
vs Frequency
DS011991-45
DS011991-47
CMRR vs Frequency
Open Loop Frequency
Open Loop Frequency
@
Response −40˚C
@
Response 25˚C
DS011991-48
DS011991-50
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10
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless
specified (Continued)
Open Loop Frequency
Maximum Output Swing
vs Frequency
Gain and Phase
vs Capacitive Load
@
Response 85˚C
DS011991-51
DS011991-52
DS011991-55
DS011991-58
DS011991-53
Gain and Phase
vs Capacitive Load
Output Impedance
vs Frequency
Slew Rate vs
Temperature
DS011991-54
DS011991-56
Slew Rate vs
Supply Voltage
Inverting Small Signal
Pulse Response
Inverting Small Signal
Pulse Response
DS011991-57
DS011991-59
11
www.national.com
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless
specified (Continued)
Inverting Small Signal
Pulse Response
Inverting Large Signal
Pulse Response
Inverting Large Signal
Pulse Response
DS011991-60
DS011991-61
DS011991-62
Inverting Large Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
DS011991-63
DS011991-64
DS011991-65
Non-Inverting Small Signal
Pulse Response
Non-Inverting Large Signal
Pulse Response
Non-Inverting Large Signal
Pulse Response
DS011991-66
DS011991-67
DS011991-68
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12
=
=
Typical Performance Characteristics VS +15V, Single Supply, TA 25˚C unless
specified (Continued)
Non-Inverting Large Signal
Pulse Response
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011991-69
DS011991-70
DS011991-71
Stability vs
Capacitive Load
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011991-75
DS011991-76
DS011991-77
Stability vs
Capacitive Load
DS011991-78
13
www.national.com
Application Information
1.0 Benefits of the LMC7101
Tiny Amp
Size. The small footprint of the SOT 23-5 packaged Tiny
amp, (0.120 x 0.118 inches, 3.05 x 3.00 mm) saves space on
printed circuit boards, and enable the design of smaller elec-
tronic products. Because they are easier to carry, many cus-
tomers prefer smaller and lighter products.
Height. The height (0.056 inches, 1.43 mm) of the Tiny amp
makes it possible to use it in PCMCIA type III cards.
Signal Integrity. Signals can pick up noise between the sig-
nal source and the amplifier. By using a physically smaller
amplifier package, the Tiny amp can be placed closer to the
signal source, reducing noise pickup and increasing signal
integrity. The Tiny amp can also be placed next to the signal
destination, such as a buffer for the reference of an analog to
digital converter.
DS011991-8
FIGURE 1. An Input Voltage Signal Exceeds the
LMC7101 Power Supply Voltages with
No Output Phase Inversion
Simplified Board Layout. The Tiny amp can simplify board
layout in several ways. First, by placing an amp where amps
are needed, instead of routing signals to a dual or quad de-
vice, long pc traces may be avoided.
By using multiple Tiny amps instead of duals or quads, com-
plex signal routing and possibly crosstalk can be reduced.
Low THD. The high open loop gain of the LMC7101 amp al-
lows it to achieve very low audio distortion — typically 0.01%
at 10 kHz with a 10 kΩ load at 5V supplies. This makes the
Tiny an excellent for audio, modems, and low frequency sig-
nal processing.
Low Supply Current. The typical 0.5 mA supply current of
the LMC7101 extends battery life in portable applications,
and may allow the reduction of the size of batteries in some
applications.
DS011991-9
Wide Voltage Range. The LMC7101 is characterized at
15V, 5V and 3V. Performance data is provided at these
popular voltages. This wide voltage range makes the
LMC7101 a good choice for devices where the voltage may
vary over the life of the batteries.
±
FIGURE 2. A 7.5V Input Signal Greatly
Exceeds the 3V Supply in Figure 3 Causing
No Phase Inversion Due to RI
Applications that exceed this rating must externally limit the
±
maximum input current to 5 mA with an input resistor as
shown in Figure 3.
2.0 Input Common Mode
Voltage Range
The LMC7101 does not exhibit phase inversion when an in-
put voltage exceeds the negative supply voltage. Figure 1
shows an input voltage exceeding both supplies with no re-
sulting phase inversion of the output.
The absolute maximum input voltage is 300 mV beyond ei-
ther rail at room temperature. Voltages greatly exceeding
this maximum rating, as in Figure 2, can cause excessive
current to flow in or out of the input pins, adversely affecting
reliability.
DS011991-10
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltage
3.0 Rail-To-Rail Output
The approximate output resistance of the LMC7101 is 180Ω
=
sourcing and 130Ω sinking at VS 3V and 110Ω sourcing
=
and 80Ω sinking at VS 5V. Using the calculated output re-
sistance, maximum output voltage swing can be estimated
as a function of load.
4.0 Capacitive Load Tolerance
The LMC7101 can typically directly drive a 100 pF load with
=
VS 15V at unity gain without oscillating. The unity gain fol-
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
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14
4.0 Capacitive Load Tolerance
(Continued)
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
DS011991-11
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
5.0 Compensating for Input
Capacitance when Using Large
Value Feedback Resistors
When using very large value feedback resistors, (usually
>
500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), Cf is first estimated by:
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for CF may be different. The values of CF should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS011991-12
FIGURE 5. Cancelling the Effect of Input Capacitance
15
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SOT-23-5 Tape and Reel Specification
TAPE FORMAT
Tape Section
Leader
# Cavities
0 (min)
75 (min)
3000
Cavity Status
Empty
Cover Tape Status
Sealed
(Start End)
Carrier
Empty
Sealed
Filled
Sealed
1000
Filled
Sealed
Trailer
125 (min)
0 (min)
Empty
Sealed
(Hub End)
Empty
Sealed
TAPE DIMENSIONS
DS011991-13
±
±
±
0.315 0.012
8 mm
0.130
(3.3)
0.124
(3.15)
0.130
0.126
(3.2)
0.138 0.002
0.055 0.004
0.157
(4)
±
±
±
(3.3)
(3.5 0.05)
(1.4 0.11)
(8 0.3)
Tape Size
DIM A
DIM Ao
DIM B
DIM Bo
DIM F
DIM Ko
DIM P1
DIM W
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16
SOT-23-5 Tape and Reel Specification (Continued)
REEL DIMENSIONS
DS011991-14
8 mm
7.00 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567
W1+ 0.078/−0.039
330.00 1.50 13.00 20.20 55.00
8.40 + 1.50/−0.00
14.40
W1 + 2.00/−1.00
Tape Size
A
B
C
D
N
W1
W2
W3
•
Output swing dependence on loading conditions and
6.0 SPICE Macromodel
A SPICE macromodel is available for the LMC7101. This
model includes simulation of:
many more characteristics as listed on the macro model
disk. Contact your local National Semiconductor sales of-
fice to obtain an operational amplifier spice model library
disk.
•
•
•
•
Input common-mode voltage range
Frequency and transient response
GBW dependence on loading conditions
Quiescent and dynamic supply current
17
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Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT Package
Order Number LMC7101AIM5, LMC7101AIM5X, LMC7101BIM5 or LMC7101BIM5X
NS Package Number MA05A
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相关型号:
LMC7101BIM5X/NOPB
IC OP-AMP, 9000 uV OFFSET-MAX, 0.6 MHz BAND WIDTH, PDSO5, ROHS COMPLIANT, SOT-23, 5 PIN, Operational Amplifier
NSC
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