LMC7101Q [NSC]
Tiny Low Power Operational Amplifier with Rail-to-Rail Input and Output; 具有轨至轨输入和输出微型低功耗运算放大器
| 型号： | LMC7101Q |
| 厂家： | 
National Semiconductor |
| 描述： | Tiny Low Power Operational Amplifier with Rail-to-Rail Input and Output |
| 文件： | 总24页 (文件大小：819K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 12, 2009
LMC7101/LMC7101Q
Tiny Low Power Operational Amplifier with Rail-to-Rail
Input and Output
General Description
Features
The LMC7101 is a high performance CMOS operational am-
plifier available in the space saving 5-Pin SOT23 Tiny pack-
age. This makes the LMC7101 ideal for space and weight
critical designs. The performance is similar to a single ampli-
fier of the LMC6482/LMC6484 type, with rail-to-rail input and
output, high open loop gain, low distortion, and low supply
currents.
Tiny 5-Pin SOT23 package saves space—typical circuit
■
layouts take half the space of 8-Pin SOIC designs
Guaranteed specs at 2.7V, 3V, 5V, 15V supplies
■
■
■
■
■
■
■
Typical supply current 0.5 mA at 5V
Typical total harmonic distortion of 0.01% at 5V
1.0 MHz gain-bandwidth
Similar to popular LMC6482/LMC6484
The main benefits of the Tiny package are most apparent in
small portable electronic devices, such as mobile phones,
pagers, notebook computers, personal digital assistants, and
PCMCIA cards. The tiny amplifiers can be placed on a board
where they are needed, simplifying board layout.
Rail-to-rail input and output
Temperature Range –40°C to 125°C (LMC7101Q)
Applications
Mobile communications
■
■
■
■
Notebooks and PDAs
Battery powered products
Sensor interface
Automotive applications (LMC7101Q)
■
Connection Diagram
5-Pin SOT23
1199102
Top View
Ordering Information
Package
Part Number
Package
Marking
Transport Media
NSC Drawing
Features
LMC7101AIM5
LMC7101AIM5X
LMC7101BIM5
LMC7101BIM5X
LMC7101QM5
LMC7101QM5X
1k Units on Tape and Reel
3k Units Tape and Reel
1k Units on Tape and Reel
3k Units Tape and Reel
1k Units on Tape and Reel
3k Units Tape and Reel
A00A
A00B
AT6A
5-Pin SOT23
MF05A
–40°C to 125°C
Operating range
* The LMC7101Q incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.
© 2009 National Semiconductor Corporation
11991
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Lead Temp. (Soldering, 10 sec.)
Storage Temperature Range
Junction Temperature (Note 4)
260°C
−65°C to +150°C
150°C
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
ESD Tolerance (Note 2)
Conditions (Note 1)
Human Body Model
Machine Model
1000V
200V
1000V
2.7V ≤ V+ ≤ 15.5V
Supply Voltage
Charged Device Model
Difference Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin
Temperature Range
LMC7101AI, LMC7101BI
LMC7101Q
±Supply Voltage
(V+) + 0.3V, (V−) − 0.3V
−40°C to 85°C
−40°C to 125°C
16V
±5 mA
±35 mA
35 mA
Thermal Resistance (θJA
)
5-Pin SOT23
325°C/W
Current at Output Pin (Note 3)
Current at Power Supply Pin
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface
limits apply at the temperature extremes.
LMC7101AI LMC7101BI LMC7101Q
Typ
Symbol
Parameter
Conditions
V+ = 2.7V
Limit
Limit
Limit
Units
(Note 5)
(Note 6)
(Note 6)
(Notes 6, 10)
VOS
Input Offset Voltage Average Drift
0.11
1
6
9
9
mV max
TCVOS Input Offset Voltage
μV/°C
pA max
pA max
IB
Input Bias Current
Input Offset Current
Input Resistance
1.0
0.5
>1
64
32
64
32
1000
2000
IOS
RIN
Tera Ω
0V ≤ VCM ≤ 2.7V
CMRR Common-Mode Rejection Ratio
70
55
50
50
dB min
V+ = 2.7V
0.0
3.0
0.0
2.7
0.0
2.7
0.0
2.7
V min
Input Common Mode Voltage
Range
VCM
For CMRR ≥ 50 dB
V max
V+ = 1.35V to 1.65V
V− = −1.35V to −1.65V
VCM = 0
PSRR Power Supply Rejection Ratio
60
50
45
45
dB min
CIN
VO
Common-Mode Input Capacitance
Output Swing
3
pF
2.45
0.25
2.68
0.025
0.5
2.15
0.5
2.15
0.5
2.15
0.5
V min
V max
V min
V max
mA max
RL = 2 kΩ
2.64
0.06
2.64
0.06
2.64
0.06
RL = 10 kΩ
0.81
0.95
0.81
0.95
0.81
0.95
IS
Supply Current
SR
Slew Rate (Note 8)
0.7
0.6
V/μs
MHz
GBW
Gain-Bandwidth Product
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2
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 3V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ. Bold-
face limits apply at the temperature extremes.
LMC7101AI LMC7101BI LMC7101Q
Typ
Symbol
Parameter
Conditions
Limit
Limit
Limit
Units
(Note 5)
0.11
(Note 6)
(Note 6)
(Notes 6, 10)
4
6
7
9
VOS
Input Offset Voltage
7
mV max
TCVOS Input Offset Voltage Average Drift
1
μV/°C
pA max
pA max
IB
Input Current
1.0
0.5
>1
64
32
64
32
1000
2000
IOS
RIN
Input Offset Current
Input Resistance
Tera Ω
0V ≤ VCM ≤ 3V
CMRR Common-Mode Rejection Ratio
74
64
60
60
db min
V+ = 3V
0.0
3.3
0.0
3.0
0.0
3.0
0.0
3.0
V min
Input Common-Mode Voltage
Range
VCM
For CMRR ≥ 50 dB
V max
V+ = 1.5V to 7.5V
V− = −1.5V to −7.5V
VO = VCM = 0
PSRR Power Supply Rejection Ratio
80
68
60
60
dBmin
CIN
VO
Common-Mode Input Capacitance
Output Swing
3
pF
2.8
0.2
2.7
0.37
2.6
0.4
2.5
0.6
2.6
0.4
2.5
0.6
2.6
0.4
2.5
0.6
V min
V max
V min
V max
RL = 2 kΩ
RL = 600Ω
0.81
0.95
0.81
0.95
0.81
0.95
IS
Supply Current
0.5
mA max
3
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5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ. Boldface
limits apply at the temperature extremes.
LMC7101AI LMC7101BI LMC7101Q
Typ
Symbol
Parameter
Conditions
Limit
Limit
Limit
Units
(Note 5)
(Note 6)
(Note 6)
(Notes 6, 10)
0.11
3
5
7
9
7
9
mV max
VOS
V+ = 5V
Input Offset Voltage
TCVOS Input Offset Voltage Average Drift
1.0
1
μV/°C
pA max
pA max
IB
Input Current
64
32
64
32
1000
2000
IOS
RIN
Input Offset Current
Input Resistance
0.5
>1
82
Tera Ω
db min
65
60
60
55
60
55
0V ≤ VCM ≤ 5V
LMC7101Q @ 125°C
CMRR Common-Mode Rejection Ratio
0.2V ≤ VCM ≤ 4.8V
V+ = 5V to 15V
V− = 0V, VO = 1.5V
82
82
70
65
65
62
65
62
dB min
dB min
Positive Power Supply Rejection
+PSRR
Ratio
V− = −5V to −15V
V+ = 0V, VO = −1.5V
70
65
65
62
65
62
Negative Power Supply Rejection
−PSRR
Ratio
−0.3
5.3
−0.20
0.00
−0.20
0.00
−0.2
0.2
V min
For CMRR ≥ 50 dB
Input Common-Mode Voltage
Range
VCM
5.20
5.20
5.2
V max
5.00
5.00
4.8
CIN
Common-Mode Input Capacitance
3
pF
4.9
4.7
4.6
4.7
4.6
4.7
4.54
V min
RL = 2 kΩ
RL = 600Ω
0.1
4.7
0.3
0.18
0.24
0.18
0.24
0.18
0.28
V max
V min
VO
Output Swing
4.5
4.24
4.5
4.24
4.5
4.28
0.5
0.5
0.5
V max
0.65
0.65
0.8
16
11
16
11
16
9
mA min
mA min
mA max
VO = 0V 24
VO = 5V
Sourcing
Sinking
24
19
ISC
Output Short Circuit Current
Supply Current
11
7.5
11
7.5
11
5.8
0.85
1.0
0.85
1.0
0.85
1.0
IS
0.5
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ. Boldface
limits apply at the temperature extremes.
LMC7101AI
Limit
(Note 6)
LMC7101BI
Limit
(Note 6)
Typ
(Note 5)
Symbol
Parameter
Conditions
Units
f = 10 kHz, AV = −2
THD
Total Harmonic Distortion
0.01
%
RL = 10 kΩ, VO = 4.0 VPP
SR
Slew Rate
1.0
1.0
V/μs
MHz
GBW
Gain Bandwidth Product
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4
15V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 15V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
LMC7101AI LMC7101BI LMC7101Q
Typ
(Note 5)
Symbol
Parameter
Conditions
Limit
Limit
Limit
Units
(Note 6)
(Note 6)
(Notes 6, 10)
VOS
Input Offset Voltage
0.11
1.0
1.0
0.5
>1
mV max
TCVOS Input Offset Voltage Average Drift
μV/°C
pA max
pA max
IB
Input Current
64
32
64
32
1000
2000
IOS
RIN
Input Offset Current
Input Resistance
Tera Ω
82
70
65
65
60
65
60
dB min
0V ≤ VCM ≤ 15V
LMC7101Q @°125C
CMRR Common-Mode Rejection Ratio
0.2V ≤ VCM ≤ 14.8V
V+ = 5V to 15V
V− = 0V, VO = 1.5V
82
82
70
65
65
62
65
62
dB min
dB min
V min
Positive Power Supply Rejection
+PSRR
Ratio
V− = −5V to −15V
V+ = 0V, VO = −1.5V
70
65
65
62
65
62
Negative Power Supply Rejection
−PSRR
Ratio
V+ = 5V
−0.3
−0.20
−0.20
−0.2
0.00
0.00
0.2
Input Common-Mode Voltage
Range
For CMRR ≥ 50 dB
VCM
15.3
340
24
15.20
15.00
15.20
15.00
15.2
14.8
V max
80
40
80
40
80
30
Sourcing
RL = 2 kΩ
RL = 600Ω
V/mV
V/mV
15
10
15
10
15
4
Large Signal Voltage Gain
(Note 7)
Sinking
AV
Sourcing
Sinking
300
15
34
6
34
6
34
6
CIN
Input Capacitance
Output Swing
3
pF
V+ = 15V
14.7
14.4
14.2
14.4
14.2
14.4
14.2
V min
RL = 2 kΩ
0.16
14.1
0.32
0.45
0.32
0.45
0.32
0.45
V max
V min
VO
V+ = 15V
13.4
13.4
13.4
13.0
13.0
12.85
RL = 600Ω
0.5
50
1.0
1.3
1.0
1.3
1.0
1.5
V max
30
20
30
20
30
20
VO = 0V
Sourcing
Sinking
Output Short Circuit Current
(Note 9)
ISC
mA min
mA max
50
30
20
30
20
30
20
VO = 12V
0.8
1.50
1.50
1.50
IS
Supply Current
1.71
1.71
1.75
5
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15V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 15V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
LMC7101AI LMC7101BI LMC7101Q
Typ
Symbol
Parameter
Conditions
Limit
Limit
Limit
Units
(Note 5)
1.1
(Note 6)
(Note 6)
(Notes 6, 10)
0.5
0.5
0.5
Slew Rate
(Note 8)
V/μs
min
V+ = 15V
SR
0.4
0.4
0.4
GBW
φm
Gain-Bandwidth Product
Phase Margin
V+ = 15V
1.1
45
10
MHz
deg
dB
Gm
Gain Margin
en
f = 1 kHz, VCM = 1V
f = 1 kHz
Input-Referred Voltage Noise
Input-Referred Current Noise
Total Harmonic Distortion
37
1.5
in
f = 10 kHz, AV = −2
THD
0.01
%
RL = 10 kΩ, VO = 8.5 VPP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model is 1.5 kΩ in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short operation at elevated ambient temperature can result in exceeding the maximum
allowed junction temperature at 150°C.
Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) − TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ = 15V, VCM = 1.5V and RL connect to 7.5V. For sourcing tests, 7.5V ≤ VO ≤ 12.5V. For sinking tests, 2.5V ≤ VO ≤ 7.5V.
Note 8: V+ = 15V. Connected as a voltage follower with a 10V step input. Number specified is the slower of the positive and negative slew rates. RL = 100 kΩ
connected to 7.5V. Amp excited with 1 kHz to produce VO = 10 VPP
.
Note 9: Do not short circuit output to V+ when V+ is greater than 12V or reliability will be adversely affected.
Note 10: When operated at temperature between −40°C and 85°C, the LMC7101Q will meet LMC7101BI specifications.
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6
2.7V Typical Performance Characteristics V+ = 2.7V, V− = 0V, TA = 25°C, unless otherwise specified.
Open Loop Frequency Response
Input Voltage vs. Output Voltage
1199116
1199117
Gain and Phase vs. Capacitance Load
Gain and Phase vs. Capacitance Load
1199118
1199119
dVOS vs. Supply Voltage
dVOS vs. Common Mode Voltage
1199120
1199121
7
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Sinking Current vs. Output Voltage
Sourcing Current vs. Output Voltage
1199122
1199123
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8
3V Typical Performance Characteristics V+ = 3V, V− = 0V, TA = 25°C, unless otherwise specified.
Open Loop Frequency Response
Input Voltage vs. Output Voltage
1199125
1199124
Input Voltage Noise vs. Input Voltage
Sourcing Current vs. Output Voltage
1199126
1199127
Sinking Current vs. Output Voltage
CMRR vs. Input Voltage
1199129
1199128
9
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5V Typical Performance Characteristics V+ = 5V, V− = 0V, TA = 25°C, unless otherwise specified.
Open Loop Frequency Response
Input Voltage vs. Output Voltage
1199131
1199130
Input Voltage Noise vs. Input Voltage
Sourcing Current vs, Output Voltage
1199133
1199132
Sinking Current vs. Output Voltage
CMRR vs. Input Voltage
1199135
1199134
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10
15V Typical Performance Characteristics V+ = +15V, V− = 0V, TA = 25°C, unless otherwise specified.
Open Loop Frequency Response
Input Voltage vs. Output Voltage
1199136
1199137
Input Voltage Noise vs. Input Voltage
Sourcing Current vs. Output Voltage
1199139
1199138
Sinking Current vs. Output Voltage
CMRR vs. Input Voltage
1199141
1199140
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Supply Current vs. Supply Voltage
Input Current vs. Temperature
Input Voltage Noise vs. Frequency
Negative PSRR vs. Frequency
1199142
1199143
1199145
1199147
Output Voltage Swing vs. Supply Voltage
1199144
Positive PSRR vs. Frequency
1199146
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CMRR vs. Frequency
Open Loop Frequency Response @ −40°C
Open Loop Frequency Response @ 85°C
Gain and Phase vs. Capacitive Load
1199148
1199149
1199151
1199153
Open Loop Frequency Response @ 25°C
1199150
Maximum Output Swing vs. Frequency
1199152
13
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Gain and Phase vs. Capacitive Load
Output Impedance vs. Frequency
1199154
1199155
Slew Rate vs. Temperature
Slew Rate vs. Supply Voltage
1199157
1199156
Inverting Small Signal Pulse Response
Inverting Small Signal Pulse Response
1199158
1199159
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Inverting Small Signal Pulse Response
Inverting Large Signal Pulse Response
1199160
1199161
Inverting Large Signal Pulse Response
Inverting Large Signal Pulse Response
1199162
1199163
Non-Inverting Small Signal Pulse Response
Non-Inverting Small Signal Pulse Response
1199164
1199165
15
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Non-Inverting Small Signal Pulse Response
Non-Inverting Large Signal Pulse Response
1199166
1199167
Non-Inverting Large Signal Pulse Response
Non-Inverting Large Signal Pulse Response
1199168
1199169
Stability vs. Capacitive Load
Stability vs. Capacitive Load
1199170
1199171
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Stability vs. Capacitive Load
Stability vs. Capacitive Load
1199175
1199176
Stability vs. Capacitive Load
Stability vs. Capacitive Load
1199177
1199178
17
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Application Information
1.0 BENEFITS OF THE LMC7101
TINY AMP
Size
The small footprint of the SOT 23-5 packaged Tiny amp,
(0.120 x 0.118 inches, 3.05 x 3.00 mm) saves space on print-
ed circuit boards, and enable the design of smaller electronic
products. Because they are easier to carry, many customers
prefer smaller and lighter products.
Height
1199108
The height (0.056 inches, 1.43 mm) of the Tiny amp makes it
possible to use it in PCMCIA type III cards.
FIGURE 1. An Input Voltage Signal Exceeds the
LMC7101 Power Supply Voltages with
No Output Phase Inversion
Signal Integrity
Signals can pick up noise between the signal source and the
amplifier. By using a physically smaller amplifier package, the
Tiny amp can be placed closer to the signal source, reducing
noise pickup and increasing signal integrity. The Tiny amp
can also be placed next to the signal destination, such as a
buffer for the reference of an analog to digital converter.
Simplified Board Layout
The Tiny amp can simplify board layout in several ways. First,
by placing an amp where amps are needed, instead of routing
signals to a dual or quad device, long pc traces may be avoid-
ed.
By using multiple Tiny amps instead of duals or quads, com-
plex signal routing and possibly crosstalk can be reduced.
Low THD
1199109
The high open loop gain of the LMC7101 amp allows it to
achieve very low audio distortion—typically 0.01% at 10 kHz
with a 10 kΩ load at 5V supplies. This makes the Tiny an
excellent for audio, modems, and low frequency signal pro-
cessing.
FIGURE 2. A ±7.5V Input Signal Greatly
Exceeds the 3V Supply in Figure 3 Causing
No Phase Inversion Due to RI
Applications that exceed this rating must externally limit the
maximum input current to ±5 mA with an input resistor as
shown in Figure 3.
Low Supply Current
The typical 0.5 mA supply current of the LMC7101 extends
battery life in portable applications, and may allow the reduc-
tion of the size of batteries in some applications.
Wide Voltage Range
The LMC7101 is characterized at 15V, 5V and 3V. Perfor-
mance data is provided at these popular voltages. This wide
voltage range makes the LMC7101 a good choice for devices
where the voltage may vary over the life of the batteries.
1199110
2.0 INPUT COMMON MODE
Voltage Range
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltage
The LMC7101 does not exhibit phase inversion when an input
voltage exceeds the negative supply voltage. Figure 1 shows
an input voltage exceeding both supplies with no resulting
phase inversion of the output.
3.0 RAIL-TO-RAIL OUTPUT
The approximate output resistance of the LMC7101 is 180Ω
sourcing and 130Ω sinking at VS = 3V and 110Ω sourcing and
80Ω sinking at VS = 5V. Using the calculated output resis-
tance, maximum output voltage swing can be estimated as a
function of load.
The absolute maximum input voltage is 300 mV beyond either
rail at room temperature. Voltages greatly exceeding this
maximum rating, as in Figure 2, can cause excessive current
to flow in or out of the input pins, adversely affecting reliability.
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4.0 CAPACITIVE LOAD TOLERANCE
The LMC7101 can typically directly drive a 100 pF load with
VS = 15V at unity gain without oscillating. The unity gain fol-
lower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op amps. The combina-
tion of the op amp's output impedance and the capacitive load
induces phase lag. This results in either an underdamped
pulse response or oscillation.
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple technique
is useful for isolating the capacitive input of multiplexers and
A/D converters.
Printed circuit board stray capacitance may be larger or small-
er than that of a breadboard, so the actual optimum value for
CF may be different. The values of CF should be checked on
the actual circuit. (Refer to the LMC660 quad CMOS amplifier
data sheet for a more detailed discussion.)
1199111
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
5.0 COMPENSATING FOR INPUT CAPACITANCE WHEN
USING LARGE VALUE FEEDBACK RESISTORS
1199112
When using very large value feedback resistors, (usually
> 500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and cir-
cuit board parasitics to reduce phase margins.
FIGURE 5. Cancelling the Effect of Input Capacitance
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), Cf is first estimated by:
19
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SOT23-5 Tape And Reel
Specification
TAPE FORMAT
Tape Section
Leader
# Cavities
0 (min)
75 (min)
3000
Cavity Status
Empty
Cover Tape Status
Sealed
(Start End)
Empty
Sealed
Filled
Sealed
Carrier
1000
Filled
Sealed
Trailer
125 (min)
0 (min)
Empty
Sealed
(Hub End)
Empty
Sealed
TAPE DIMENSIONS
1199113
0.130
(3.3)
0.124
(3.15)
0.130
0.126
(3.2)
0.138 ±0.002
(3.5 ±0.05)
DIM F
0.055 ±0.004
(1.4 ±0.11)
DIM Ko
0.157
(4)
0.315 ±0.012
(8 ±0.3)
8 mm
(3.3)
Tape Size
DIM A
DIM Ao
DIM B
DIM Bo
DIM P1
DIM W
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20
REEL DIMENSIONS
1199114
7.00 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567
W1+ 0.078/−0.039
W1 + 2.00/−1.00
W3
8 mm
330.00 1.50 13.00 20.20 55.00
8.40 + 1.50/−0.00
14.40
Tape Size
A
B
C
D
N
W1
W2
21
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Physical Dimensions inches (millimeters) unless otherwise noted
5-Pin SOT23 Package
NS Package Number MF05A
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22
Notes
23
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Notes
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