LMC568CMX/NOPB [NSC]
IC PHASE LOCKED LOOP, PDSO8, M08A, PLL or Frequency Synthesis Circuit;
| 型号： | LMC568CMX/NOPB |
| 厂家： | 
National Semiconductor |
| 描述： | IC PHASE LOCKED LOOP, PDSO8, M08A, PLL or Frequency Synthesis Circuit |
| 文件： | 总6页 (文件大小：164K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1999
LMC568
Low Power Phase-Locked Loop
General Description
The LMC568 is an amplitude-linear phase-locked loop con-
sisting of a linear VCO, fully balanced phase detectors, and
Features
±
n Demodulates 15% deviation FM/FSK signals
n Carrier Detect Output with hysteresis
n Operation to 500 kHz input frequency
™
a carrier detect output. LMCMOS technology is employed
for high performance with low power consumption.
±
n Low THD — 0.5% typ. for 10% deviation
±
The VCO has a linearized control range of 30% to allow de-
n 2V to 9V supply voltage range
n Low supply current drain
modulation of FM and FSK signals. Carrier detect is indi-
cated when the PLL is locked to an input signal greater than
26 mVrms. LMC568 applications include FM SCA and TV
second audio program decoders, FSK data demodulators,
and voice pagers.
Typical Application (100 kHz input frequency, refer to notes pg. 3)
DS009135-1
Order Number LMC568CM or LMC568CN
See NS Package Number M08A or N08E
™
LMCMOS is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS009135
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
Dual-In-Line Package
Soldering (10 seconds)
Small Outline Package
Vapor Phase (60 seconds)
Infrared (15 seconds)
260˚C
215˚C
220˚C
Input Voltage, Pin 3
2 Vp–p
10V
Supply Voltage, Pin 4
See AN-450 “Surface Mounting Methods and their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage
to the device may occur. Operating Ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits.
Output Voltage, Pin 8
13V
Voltage at All Other Pins
Output Current, Pin 8
Vs to Gnd
30 mA
Package Dissipation
500 mW
Operating Temperature Range (TA)
Storage Temperature Range
−25˚C to +125˚C
−55˚C to +150˚C
Electrical Characteristics
=
=
Test Circuit, TA 25˚C, VS 5V, RtCt #2, Sw. 1 Pos. 0; and no input unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
0.35
0.75
1.2
0
Max
Units
I4
Power Supply Current
RtCt # 1, Quiescent or Activated
VS = 2V
VS = 5V
VS = 9V
1.5
2.4
mAdc
V3
R3
I8
Input D.C. Bias
mVdc
kΩ
Input Resistance
Output Leakage
40
1
100
115
nAdc
f0
Center Frequency Fosc
RtCt #2, Measure Oscillator
Frequency and Divide by 2
VS = 2V
VS = 5V
VS = 9V
98
÷
2
90
103
105
kHz
%/V
∆f0
Center Frequency Shift
with Supply
1.0
2.0
Vin
Input Threshold
Set Input Frequency Equal to f0
Measured Above, Increase Input
Level until Pin 8 Goes Low.
VS = 2V
VS = 5V
VS = 9V
8
16
26
45
25
42
15
mVrms
∆Vin
Input Hysteresis
Starting at Input Threshold, Decrease Input Level
until Pin 8 Goes High
1.5
mVrms
Vdc
>
V8
Output ″Sat″ Voltage
Input Level Threshold Choose RL
I8 = 2 mA
I8 = 20 mA
VS = 2V
0.06
0.7
0.15
for Specified I8
L.D.B.W. Largest Detection
Bandwidth
Measure Fosc with Sw. 1 in Pos. 0, 1,
and 2;
30
55
60
VS = 5V
VS = 9V
40
%
∆BW
Bandwidth Skew
Recovered Audio
±
1
5
%
Vout
Typical Application Circuit
Input = 100 mVrms, F = 100 kHz
VS = 2V
VS = 5V
VS = 9V
170
270
400
mVrms
±
Fmod = 400 Hz, 10 kHz Dev.
THD
Total Harmonic
Distortion
Typical Application Circuit as Above, Measure Vout
Distortion.
0.5
%
dB
Signal to Noise Ratio
Typical Application Circuit
Remove Modulation, Measure Vn
(S + N)/N = 20 log (Vout/Vn).
65
fmax
Highest Center Freq.
RtCt #3, Measure Oscillator Frequency and Divide by
2
700
kHz
www.national.com
2
Test Circuit
DS009135-3
RtCt
#1
Rt
Ct
100k
10k
300 pF
300 pF
62 pF
#2
#3
5.1k
OUTPUT TAKEOFF
Notes to Typical Application
The output signal is taken off the loop filter at pin 2. Pin 2 is
the combined output of the phase detector and control input
of the VCO for the phase-locked loop (PLL). The nominal pin
2 source resistance is 80 kΩ, requiring the use of an external
buffer transistor to drive nominal loads.
SUPPLY DECOUPLING
The decoupling of supply pin 4 becomes more critical at high
supply voltages with high operating frequencies, requiring
C4 to be placed as close to possible to pin 4. Also, due to pin
voltages tracking supply, a large C4 is necessary for low fre-
quency PSRR.
For small values of C2, the PLL will have a fast acquisition
time and the pull-in range will be set by the built-in VCO fre-
quency stops, which also determine the largest detection
bandwidth (LDBW). Increasing C2 results in improved noise
immunity at the expense of acquisition time, and the pull-in
range will become narrower than the LDBW. However, the
maximum hold-in range will always equal the LDBW. The 2
kHz de-emphasis pole shown may be modified or omitted as
required by the application.
OSCILLATOR TIMING COMPONENTS
The voltage-controlled oscillator (VCO) on the LMC568 must
be set up to run at twice the frequency of the input signal.
The components shown in the typical application are for Fosc
=
200 kHz (100 kHz input frequency). For operation at lower
frequencies, increase the capacitor value; for higher fre-
quencies proportionally reduce the resistor values.
CARRIER DETECT
If low distortion is not a requirement, the series diode/resistor
between pins 6 and 5 may be omitted. This will reduce VCO
supply dependence and increase Vout by approximately 2 dB
Pin 1 is the output of a negative-going amplitude detector
which has a nominal 0 signal output of 7/9 Vs. The output at
pin 8 is an N-channel FET switch to ground which is acti-
vated when the PLL is locked and the input is of sufficient
amplitude to cause pin 1 to fall below 2/3 Vs. The carrier de-
tect threshold is internally set to 26 mVrms typical on a 5V
supply.
=
with THD 2% typical. The center frequency as a function of
Rt and Ct is given by:
Capacitor C1 in conjunction with the nominal 40 kΩ pin 1 in-
ternal resistance forms the output filter. The size of C1 is a
tradeoff between slew rate and carrier ripple at the output
comparator. Optional resistor RH increases the hysteresis in
the pin 8 output for applications such as audio mute control.
The minimum allowable value for RH is 330 kΩ.
To allow for I.C. and component value tolerences, the oscil-
lator timing components will require a trim. This is generally
accomplished by using a variable resistor as part of Rt, al-
though Ct could also be padded. The amount of initial fre-
quency variation due to the LMC568 itself is given in the
electrical specifications; the total trim range must also ac-
commodate the tolerances of Rt and Ct.
INPUT PIN
The input pin 3 is internally ground-referenced with a nomi-
nal 40 kΩ resistor. Signals that are centered on 0V may be
directly coupled to pin 3; however, any d.c. potential must be
isolated via C3.
3
www.national.com
LMC568 Typical Performance Characteristics
Frequency Drift
with Temperature
Peak Deviation vs
Input Signal Level
Pull-In Range as
a Function of C2
DS009135-7
DS009135-8
DS009135-9
www.national.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
SO Package (M)
Order Number LMC568CM
NS Package Number M08A
Molded Dual-In-Line Package (N)
Order Number LMC568CN
NS Package Number N08E
5
www.national.com
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
National Semiconductor
Europe
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
Email: sea.support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
LMC6001AIN/NOPB
IC OP-AMP, 700 uV OFFSET-MAX, 1.3 MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8, Operational Amplifier
NSC
©2020 ICPDF网 联系我们和版权申明