LMC555CTP [NSC]
CMOS Timer; CMOS计时器
| 型号： | LMC555CTP |
| 厂家： | 
National Semiconductor |
| 描述： | CMOS Timer |
| 文件： | 总12页 (文件大小：765K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2006
LMC555
CMOS Timer
General Description
Features
n Less than 1 mW typical power dissipation at 5V supply
n 3 MHz astable frequency capability
The LMC555 is a CMOS version of the industry standard
555 series general purpose timers. In addition to the stan-
dard package (SOIC, MSOP, and MDIP) the LMC555 is also
available in a chip sized package (8 Bump micro SMD) using
National’s micro SMD package technology. The LMC555
offers the same capability of generating accurate time delays
and frequencies as the LM555 but with much lower power
dissipation and supply current spikes. When operated as a
one-shot, the time delay is precisely controlled by a single
external resistor and capacitor. In the stable mode the oscil-
lation frequency and duty cycle are accurately set by two
external resistors and one capacitor. The use of National
n 1.5V supply operating voltage guaranteed
n Output fully compatible with TTL and CMOS logic at 5V
supply
n Tested to −10 mA, +50 mA output current levels
n Reduced supply current spikes during output transitions
n Extremely low reset, trigger, and threshold currents
n Excellent temperature stability
n Pin-for-pin compatible with 555 series of timers
n Available in 8-pin MSOP Package and 8-Bump micro
SMD package
™
Semiconductor’s LMCMOS process extends both the fre-
quency range and low supply capability.
Pulse Width Modulator
00866915
00866920
Ordering Information
Package
Temperature Range
Industrial
Package Marking
Transport Media
NSC Drawing
−40˚C to +85˚C
LMC555CM
8-Pin Small Outline (SO)
Rails
LMC555CM
M08A
LMC555CMX
LMC555CMM
LMC555CMMX
LMC555CN
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
Rails
8-Pin Mini Small Outline
(MSOP)
ZC5
LMC555CN
F1
MUA08A
N08E
8-Pin Molded Dip (MDIP)
8-Bump micro SMD
LMC555CBP
LMC555CBPX
LMC555CTP
LMC555CTPX
250 Units Tape and Reel
3k Units Tape and Reel
250 Units Tape and Reel
3k Units Tape and Reel
BPA08EFB
8-Bump micro SMD
NOPB
F02
TPA08EFA
Note: See Mil-datasheet MNLMC555-X for specifications on the military device LMC555J/883.
™
LMCMOS is a trademark of National Semiconductor Corp.
© 2006 National Semiconductor Corporation
DS008669
www.national.com
Connection Diagrams
8-Pin SOIC, MSOP, MDIP
00866901
Top View
8-Bump micro SMD
00866909
Top View
(Bump Side Down)
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2
Absolute Maximum Ratings (Notes 2, 3)
Thermal Resistance (θJA) (Note 2)
SO, 8-Pin Small
Outline
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
169˚C/W
MSOP, 8-Pin
Mini Small
Supply Voltage, V+
15V
Outline
225˚C/W
111˚C/W
220˚C/W
Input Voltages, VTRIG, VRES, VCTRL
VTHRESH
,
−0.3V to VS + 0.3V
15V
MDIP, 8-Pin
Molded Dip
Output Voltages, VO, VDIS
Output Current IO, IDIS
Storage Temperature Range
Soldering Information
8-Bump micro
SMD
100 mA
−65˚C to +150˚C
Maximum
Allowable Power
MDIP Soldering (10 seconds)
260˚C
215˚C
220˚C
@
Dissipation 25˚C
SOIC, MSOP Vapor Phase (60 sec)
SOIC, MSOP Infrared (15 sec)
MDIP-8
SO-8
1126 mW
740 mW
555 mW
Note: See AN-450 “Surface Mounting Methods and Their Effect on Product
MSOP-8
8 Bump micro
SMD
Reliability” for other methods of soldering surface mount devices.
568 mW
Operating Ratings(Notes 2, 3)
Termperature
Range
−40˚C to +85˚C
Electrical Characteristics (Notes 1, 2)
Test Circuit, T = 25˚C, all switches open, RESET to VS unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Limits)
IS
Supply Current
VS = 1.5V
VS = 5V
50
100
150
1.0
3.3
8.0
75
150
250
400
1.2
3.8
8.6
150
300
0.4
0.6
2.0
µA
VS = 12V
VS = 1.5V
VS = 5V
VCTRL
Control Voltage
0.8
2.9
7.4
V
mV
V
VS = 12V
VDIS
VOL
Discharge Saturation Voltage VS = 1.5V, IDIS = 1 mA
VS = 5V, IDIS = 10 mA
150
0.2
0.3
1.0
1.25
4.7
11.3
0.5
4.0
10
Output Voltage (Low)
VS = 1.5V, IO = 1 mA
VS = 5V, IO = 8 mA
VS = 12V, IO = 50 mA
VS = 1.5V, IO = −0.25 mA
VS = 5V, IO = −2 mA
VS = 12V, IO = −10 mA
VS = 1.5V
VOH
Output Voltage
(High)
1.0
4.4
V
10.5
0.4
VTRIG
Trigger Voltage
0.6
4.3
V
pA
V
VS = 12V
3.7
ITRIG
VRES
Trigger Current
Reset Voltage
VS = 5V
VS = 1.5V (Note 4)
VS = 12V
0.4
0.4
0.7
0.75
10
1.0
1.1
IRES
ITHRESH
IDIS
Reset Current
VS = 5V
pA
pA
nA
Threshold Current
Discharge Leakage
Timing Accuracy
VS = 5V
10
VS = 12V
1.0
100
t
SW 2, 4 Closed
VS = 1.5V
0.9
1.0
1.0
1.1
1.1
1.1
0.3
1.25
1.20
1.25
ms
VS = 5V
VS = 12V
∆t/∆VS
Timing Shift with Supply
VS = 5V 1V
%/V
3
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Electrical Characteristics (Notes 1, 2)
Test Circuit, T = 25˚C, all switches open, RESET to VS unless otherwise noted (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Limits)
ppm/˚C
∆t/∆T
Timing Shift with
Temperature
VS = 5V
75
−40˚C ≤ T ≤ +85˚C
fA
Astable Frequency
Maximum Frequency
Output Rise and
Fall Times
SW 1, 3 Closed, VS = 12V
Max. Freq. Test Circuit, VS = 5V
Max. Freq. Test Circuit
VS = 5V, CL = 10 pF
4.0
4.8
3.0
15
5.6
kHz
MHz
ns
fMAX
tR, tF
tPD
Trigger Propagation Delay
VS = 5V, Measure Delay
from Trigger to Output
100
ns
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: See AN-450 for other methods of soldering surface mount devices, and also AN-1112 for micro SMD considerations.
Note 4: If the RESET pin is to be used at temperatures of −20˚C and below V is required to be 2.0V or greater.
S
Note 5: For device pinout please refer to table 1
Test Circuit (Note 5)
Maximum Frequency Test Circuit (Note 5)
00866903
00866902
TABLE 1. Package Pinout Names vs. Pin Function
Pin Function Package Pin numbers
8-Pin SO, MSOP, and MDIP
8-Bump micro SMD
GND
1
2
3
4
5
6
7
8
A3
B3
C3
C2
C1
B1
A1
A2
Trigger
Output
Reset
Control Voltage
Threshold
Discharge
V+
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4
negative pulse to the reset terminal. The output will then
remain in the low state until a trigger pulse is again applied.
Application Information
When the reset function is not use, it is recommended that it
be connected to V+ to avoid any possibility of false triggering.
Figure 3 is a nomograph for easy determination of RC values
for various time delays.
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by internal circuitry. Upon application of a negative trigger
pulse of less than 1/3 VS to the Trigger terminal, the flip-flop
is set which both releases the short circuit across the capaci-
tor and drives the output high.
Note: In monstable operation, the trigger should be driven high before the
end of timing cycle.
00866911
00866904
FIGURE 3. Time Delay
FIGURE 1. Monostable (One-Shot)
The voltage across the capacitor then increases exponen-
tially for a period of tH = 1.1 RAC, which is also the time that
the output stays high, at the end of which time the voltage
equals 2/3 VS. The comparator then resets the flip-flop which
in turn discharges the capacitor and drives the output to its
low state. Figure 2 shows the waveforms generated in this
mode of operation. Since the charge and the threshold level
of the comparator are both directly proportional to supply
voltage, the timing internal is independent of supply.
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (Trigger and
Threshold terminals connected together) it will trigger itself
and free run as a multivibrator. The external capacitor
charges through RA + RB and discharges through RB. Thus
the duty cycle may be precisely set by the ratio of these two
resistors.
00866910
V
= 5V
Top Trace: Input 5 V/Div.
CC
00866905
TIME = 0.1 ms/Div. Middle Trace: Output 5 V/Div.
R
= 9.1 kΩ
Bottom Trace: Capacitor Voltage 2 V/Div.
A
FIGURE 4. Astable (Variable Duty Cycle Oscillator)
C = 0.01 µF
In this mode of operation, the capacitor charges and dis-
charges between 1/3 VS and 2/3 VS. As in the triggered
mode, the charge and discharge times, and therefore the
frequency are independent of the supply voltage.
FIGURE 2. Monostable Waveforms
Reset overrides Trigger, which can override threshold.
Therefore the trigger pulse must be shorter than the desired
tH. The minimum pulse width for the Trigger is 20ns, and it is
400ns for the Reset. During the timing cycle when the output
is high, the further application of a trigger pulse will not effect
the circuit so long as the trigger input is returned high at least
10µs before the end of the timing interval. However the
circuit can be reset during this time by the application of a
Figure 5 shows the waveform generated in this mode of
operation.
5
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FREQUENCY DIVIDER
Application Information (Continued)
The monostable circuit of Figure 1 can be used as a fre-
quency divider by adjusting the length of the timing cycle.
Figure 7 shows the waveforms generated in a divide by three
circuit.
00866912
V
= 5V
Top Trace: Output 5 V/Div.
CC
TIME = 20 µs/Div.
Bottom Trace: Capacitor Voltage 1 V/Div.
R
R
= 3.9 kΩ
= 9 kΩ
A
B
00866914
V
= 5V
Top Trace: Input 4 V/Div.
TIME = 20 µs/Div. Middle Trace: Output 2 V/Div.
= 9.1 kΩ Bottom Trace: Capacitor 2 V/Div.
CC
C = 0.01 µF
R
A
C = 0.01 µF
FIGURE 5. Astable Waveforms
The charge time (output high) is given by
t1 = 0.693 (RA + RB)C
FIGURE 7. Frequency Divider Waveforms
PULSE WIDTH MODULATOR
And the discharge time (output low) by:
t2 = 0.693 (RB)C
When the timer is connected in the monostable mode and
triggered with a continuous pulse train, the output pulse
width can be modulated by a signal applied to the Control
Voltage Terminal. Figure 8 shows the circuit, and in Figure 9
are some waveform examples.
Thus the total period is:
T = t1 + t2 = 0.693 (RA + RB)C
The frequency of oscillation is:
Figure 6 may be used for quick determination of these RC
Values. The duty cycle, as a fraction of total period that the
output is low, is:
00866920
FIGURE 8. Pulse Width Modulator
00866913
FIGURE 6. Free Running Frequency
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6
Application Information (Continued)
00866916
V
= 5V
Top Trace: Modulation Input 1 V/Div.
CC
TIME = 0.1 ms/Div.
Bottom Trace: Output Voltage 2 V/Div.
00866915
V
= 5V
Top Trace: Modulation 1 V/Div.
TIME = 0.2 ms/Div. Bottom Trace: Output Voltage 2 V/Div.
= 9.1 kΩ
R
R
= 3.9 kΩ
= 3 kΩ
CC
A
B
R
C = 0.01 µF
A
C = 0.01 µF
FIGURE 11. Pulse Position Modulator Waveforms
FIGURE 9. Pulse Width Modulator Waveforms
50% DUTY CYCLE OSCILLATOR
The frequency of oscillation is
f = 1/(1.4 RCC)
PULSE POSITION MODULATOR
This application uses the timer connected for astable opera-
tion, as in Figure 10, with a modulating signal again applied
to the control voltage terminal. The pulse position varies with
the modulating signal, since the threshold voltage and hence
the time delay is varied. Figure 11 shows the waveforms
generated for a triangle wave modulation signal.
00866906
FIGURE 12. 50% Duty Cycle Oscillator
00866921
FIGURE 10. Pulse Position Modulator
micro SMD Marking Orientation
Top View
00866923
Bumps are numbered counter-clockwise
7
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Physical Dimensions inches (millimeters) unless otherwise noted
Molded Small Outline (SO) Package (M)
NS Package Number M08A
8-Pin (0.118” Wide) Molded Mini Small Outline Package
NS Package Number MUA08A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Molded Dual-in-line Package (N)
NS Package Number N08E
9
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED
COUNTERCLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.
8-Bump micro SMD Package
NS Package Number BPA08EFB
X1 = 1.387 X2 = 1.412 X3 = 0.850
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10
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. FOR SOLDER BUMP COMPOSITION, SEE “SOLDER INFORMATION” IN THE PACKAGING SECTION OF THE NATIONAL SEMICONDUCTOR WEB
PAGE (www.national.com).
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.
8-Bump micro SMD Package
NS Package Number TPA08EFA
X1 = 1.387 X2 = 1.412 X3 = 0.500
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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