LMC555CMX [NSC]
CMOS Timer; CMOS计时器
| 型号： | LMC555CMX |
| 厂家： | 
National Semiconductor |
| 描述： | CMOS Timer |
| 文件： | 总12页 (文件大小：321K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2000
LMC555
CMOS Timer
General Description
Features
n Less than 1 mW typical power dissipation at 5V supply
n 3 MHz astable frequency capability
The LMC555 is a CMOS version of the industry standard
555 series general purpose timers. In addition to the stan-
dard package (SOIC, MSOP, and MDIP) the LMC555 is also
available in a chip sized package (8 Bump micro SMD) using
National’s micro SMD package technology. The LMC555 of-
fers the same capability of generating accurate time delays
and frequencies as the LM555 but with much lower power
dissipation and supply current spikes. When operated as a
one-shot, the time delay is precisely controlled by a single
external resistor and capacitor. In the stable mode the oscil-
lation frequency and duty cycle are accurately set by two ex-
ternal resistors and one capacitor. The use of National Semi-
n 1.5V supply operating voltage guaranteed
n Output fully compatible with TTL and CMOS logic at 5V
supply
n Tested to −10 mA, +50 mA output current levels
n Reduced supply current spikes during output transitions
n Extremely low reset, trigger, and threshold currents
n Excellent temperature stability
n Pin-for-pin compatible with 555 series of timers
n Available in 8 pin MSOP Package and 8-Bump micro
SMD package
™
conductor’s LMCMOS process extends both the frequency
range and low supply capability.
Block and Connection Diagrams
8-Pin SOIC, MSOP,
and MDIP Packages
8-Bump micro SMD
DS008669-1
Top View
DS008669-9
Top View
(bump side down)
™
LMCMOS is a trademark of National Semiconductor Corp.
© 2000 National Semiconductor Corporation
DS008669
www.national.com
Ordering Information
Package
Temperature Range
Package Marking
Transport Media
NSC
Drawing
Industrial
−40˚C to +85˚C
8-LeadSmall Outline
(SO)
LMC555CM
LMC555CMX
LMC555CMM
LMC555CMMX
LMC555CN
LMC555CM
LMC555CM
ZC5
Rails
M08A
MUA08A
N08E
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
Rails
8-Lead Mini Small
Outline (MSOP)
ZC5
8-Lead Molded Dip
(MDIP)
LMC555CN
8-Bump micro SMD
LMC555CBP
LMC555CBPX
F1
F1
250 Units Tape and Reel
3k Units Tape and Reel
N/A
BPA08EFB
N/A
Metronome Circuit
LMC555CBPEVAL
N/A
micro SMD Marking Orientation
Top View
DS008669-23
Bumps are numbered counter-clockwise
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2
Absolute Maximum Ratings (Notes 2, 3)
Operating Ratings(Notes 2, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Termperature Range
−40˚C to +85˚C
169˚C/W
Thermal Resistance (θJA) (Note 2)
SO, 8-lead Small Outline
Supply Voltage, V+
15V
MSOP, 8-lead Mini Small
Outline
225˚C/W
111˚C/W
220˚C/W
Input Voltages, VTRIG, VRES, VCTRL
VTHRESH
,
−0.3V to VS + 0.3V
15V
MDIP, 8-lead Molded Dip
8-Bump micro SMD
Output Voltages, VO, VDIS
Output Current IO, IDIS
100 mA
Maximum Allowable Power
@
Dissipation 25˚C
Storage Temperature Range
Soldering Information
−65˚C to +150˚C
MDIP-8
1126mW
740mW
555mW
568mW
SO-8
MDIP Soldering (10 seconds)
260˚C
MSOP-8
SOIC, MSOP Vapor Phase (60
sec)
215˚C
220˚C
8 Bump micro SMD
SOIC, MSOP Infrared (15 sec)
Note: See AN-450 “Surface Mounting Methods and Their Effect on Product
Reliability” for other methods of soldering surface mount devices.
Electrical Characteristics (Notes 1, 2)
=
Test Circuit, T 25˚C, all switches open, RESET to VS unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Limits)
=
IS
Supply Current
VS 1.5V
50
100
150
150
250
400
=
VS 5V
µA
=
VS 12V
=
VCTRL
Control Voltage
VS 1.5V
0.8
2.9
7.4
1.0
3.3
8.0
1.2
3.8
8.6
=
VS 5V
V
mV
V
=
VS 12V
=
=
VDIS
VOL
Discharge Saturation
Voltage
VS 1.5V, IDIS 1 mA
75
150
150
300
=
=
VS 5V, IDIS 10 mA
=
=
=
=
Output Voltage (Low)
VS 1.5V, IO 1 mA
0.2
0.3
1.0
0.4
0.6
2.0
=
VS 5V, IO 8 mA
=
VS 12V, IO 50 mA
=
=
VOH
Output Voltage
(High)
VS 1.5V, IO −0.25 mA
1.0
4.4
1.25
4.7
=
=
VS 5V, IO −2 mA
V
=
=
VS 12V, IO −10 mA
10.5
11.3
=
VTRIG
Trigger Voltage
VS 1.5V
0.4
3.7
0.5
4.0
0.6
4.3
V
pA
V
=
VS 12V
=
ITRIG
VRES
Trigger Current
Reset Voltage
VS 5V
10
=
VS 1.5V (Note 4)
0.4
0.4
0.7
0.75
1.0
1.1
=
VS 12V
=
IRES
ITHRESH
IDIS
Reset Current
VS 5V
10
10
pA
pA
nA
=
VS 5V
Threshold Current
Discharge Leakage
Timing Accuracy
=
VS 12V
1.0
100
t
SW 2, 4 Closed
=
VS 1.5V
0.9
1.0
1.0
1.1
1.1
1.1
1.25
1.20
1.25
ms
=
VS 5V
=
VS 12V
=
±
%
/V
∆t/∆VS
∆t/∆T
Timing Shift with Supply
VS 5V 1V
0.3
75
=
Timing Shift with
Temperature
VS 5V
ppm/˚C
−40˚C ≤ T ≤ +85˚C
=
fA
Astable Frequency
SW 1, 3 Closed, VS 12V
4.0
4.8
3.0
15
5.6
kHz
MHz
ns
=
fMAX
tR, tF
Maximum Frequency
Max. Freq. Test Circuit, VS 5V
Output Rise and
Fall Times
Max. Freq. Test Circuit
VS 5V, CL 10 pF
=
=
3
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Electrical Characteristics (Notes 1, 2)
=
Test Circuit, T 25˚C, all switches open, RESET to VS unless otherwise noted (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Limits)
=
tPD
Trigger Propagation Delay
VS 5V, Measure Delay
100
ns
from Trigger to Output
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-
antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is
given, however, the typical value is a good indication of device performance.
Note 3: See AN-450 for other methods of soldering surface mount devices, and also AN-1112 for micro SMD considerations.
Note 4: If the RESET pin is to be used at temperatures of −20˚C and below V is required to be 2.0V or greater.
S
Note 5: For device pinout please refer to table 1
Test Circuit (Note 5)
Maximum Frequency Test Circuit (Note 5)
DS008669-3
DS008669-2
TABLE 1. Package Pinout Names vs. Pin Function
Package Pin numbers
Pin Function
8-Pin SO,MSOP, and MDIP
8-Bump micro SMD
GND
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
8
Trigger
Output
Reset
Control Voltage
Threshold
Discharge
V+
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4
When the reset function is not use, it is recommended that it
be connected to V+ to avoid any possibility of false triggering.
Figure 3 is a nomograph for easy determination of RC values
for various time delays.
Application Info
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by internal circuitry. Upon application of a negative trigger
pulse of less than 1/3 VS to the Trigger terminal, the flip-flop
is set which both releases the short circuit across the capaci-
tor and drives the output high.
Note: In monstable operation, the trigger should be driven high before the
end of timing cycle.
DS008669-11
FIGURE 3. Time Delay
DS008669-4
ASTABLE OPERATION
FIGURE 1. Monostable (One-Shot)
If the circuit is connected as shown in Figure 4 (Trigger and
Threshold terminals connected together) it will trigger itself
and free run as a multivibrator. The external capacitor
charges through RA + RB and discharges through RB. Thus
the duty cycle may be precisely set by the ratio of these two
resistors.
The voltage across the capacitor then increases exponen-
=
tially for a period of tH 1.1 RAC, which is also the time that
the output stays high, at the end of which time the voltage
equals 2/3 VS. The comparator then resets the flip-flop which
in turn discharges the capacitor and drives the output to its
low state. Figure 2 shows the waveforms generated in this
mode of operation. Since the charge and the threshold level
of the comparator are both directly proportional to supply
voltage, the timing internal is independent of supply.
DS008669-5
DS008669-10
FIGURE 4. Astable (Variable Duty Cycle Oscillator)
=
V
5V
Top Trace: Input 5V/Div.
CC
=
TIME 0.1 ms/Div. Middle Trace: Output 5V/Div.
In this mode of operation, the capacitor charges and dis-
charges between 1/3 VS and 2/3 VS. As in the triggered
mode, the charge and discharge times, and therefore the fre-
quency are independent of the supply voltage.
=
=
R
C
9.1kΩ
0.01µF
Bottom Trace: Capacitor Voltage 2V/Div.
A
FIGURE 2. Monostable Waveforms
Figure 5 shows the waveform generated in this mode of
operation.
Reset overrides Trigger, which can override threshold.
Therefore the trigger pulse must be shorter than the desired
tH. The minimum pulse width for the Trigger is 20ns, and it is
400ns for the Reset. During the timing cycle when the output
is high, the further application of a trigger pulse will not effect
the circuit so long as the trigger input is returned high at least
10µs before the end of the timing interval. However the cir-
cuit can be reset during this time by the application of a
negative pulse to the reset terminal. The output will then re-
main in the low state until a trigger pulse is again applied.
5
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Application Info (Continued)
DS008669-14
=
V
5V
Top Trace: Input 4V/Div.
CC
=
DS008669-12
TIME 20 µs/Div. Middle Trace: Output 2V/Div.
=
A
R
9.1 kΩ
Bottom Trace: Capacitor 2V/Div.
=
V
5V
Top Trace: Output 5V/Div.
Bottom Trace: Capacitor Voltage 1V/Div.
CC
=
C
0.01µF
=
TIME 20 µs/Div.
=
=
R
R
C
3.9kΩ
9kΩ
A
FIGURE 7. Frequency Divider Waveforms
B
=
0.01µF
PULSE WIDTH MODULATOR
FIGURE 5. Astable Waveforms
When the timer is connected in the monostable mode and
triggered with a continuous pulse train, the output pulse
width can be modulated by a signal applied to the Control
Voltage Terminal. Figure 8 shows the circuit, and in Figure 9
are some waveform examples.
The charge time (output high) is given by
=
t1 Ln2 (RA + RB)C
And the discharge time (output low) by:
=
t2 Ln2 (RB)C
Thus the total period is:
=
=
t1 + t2 Ln2 (RA + RB)C
T
The frequency of oscillation is:
Figure 6 may be used for quick determination of these RC
Values. The duty cycle, as a fraction of total period that the
output is low, is:
DS008669-20
FIGURE 8. Pulse Width Modulator
DS008669-13
DS008669-15
FIGURE 6. Free Running Frequency
=
V
5V
Top Trace: Modulation 1V/Div.
CC
=
TIME 0.2 ms/Div. Bottom Trace: Output Voltage 2V/Div.
FREQUENCY DIVIDER
=
R
C
9.1 kΩ
A
=
0.01µF
The monostable circuit of Figure 1 can be used as a fre-
quency divider by adjusting the length of the timing cycle.
Figure 7 shows the waveforms generated in a divide by three
circuit.
FIGURE 9. Pulse Width Modulator Waveforms
PULSE POSITION MODULATOR
This application uses the timer connected for astable opera-
tion, as in Figure 10, with a modulating signal again applied
to the control voltage terminal. The pulse position varies with
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6
Application Info (Continued)
the modulating signal, since the threshold voltage and hence
the time delay is varied. Figure 11 shows the waveforms
generated for a triangle wave modulation signal.
DS008669-16
=
V
5V
Top Trace: Modulation Input 1V/Div.
Bottom Trace: Output Voltage 2V/Div.
CC
=
TIME 0.1 ms/Div.
=
=
R
R
C
3.9 kΩ
3 kΩ
A
B
=
0.01µF
DS008669-21
FIGURE 11. Pulse Position Modulator Waveforms
FIGURE 10. Pulse Position Modulator
%
50 DUTY CYCLE OSCILLATOR
The frequency of oscillation is
=
f
1/(1.4 RCC)
DS008669-6
%
FIGURE 12. 50 Duty Cycle Oscillator
7
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Physical Dimensions inches (millimeters) unless otherwise noted
Molded Small Outline (SO) Package (M)
NS Package Number M08A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead (0.118” Wide) Molded Mini Small Outline Package
NS Package Number MUA08A
9
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Molded Dual-in-line Package (N)
NS Package Number N08E
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10
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE
NUMBERED COUNTERCLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACK-
AGE LENGTH AND X3 IS PACKAGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.
micro SMD Package
NS Package Number BPA08EFB
=
=
=
X1 1.387 X2 1.412 X3 0.850
11
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Notes
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