LM6164W-SMD [NSC]
IC OP-AMP, 6000 uV OFFSET-MAX, 175 MHz BAND WIDTH, CDFP10, CERPACK-10, Operational Amplifier;
| 型号： | LM6164W-SMD |
| 厂家： | 
National Semiconductor |
| 描述： | IC OP-AMP, 6000 uV OFFSET-MAX, 175 MHz BAND WIDTH, CDFP10, CERPACK-10, Operational Amplifier 放大器 CD |
| 文件： | 总12页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1999
LM6164/LM6264/LM6364
High Speed Operational Amplifier
General Description
Features
n High slew rate: 300 V/µs
n High GBW product: 175 MHz
n Low supply current: 5 mA
n Fast settling: 100 ns to 0.1%
The LM6164 family of high-speed amplifiers exhibits an ex-
cellent speed-power product in delivering 300V per µs and
175 MHz GBW (stable down to gains as low as +5) with only
5 mA of supply current. Further power savings and applica-
tion convenience are possible by taking advantage of the
wide dynamic range in operating supply voltage which ex-
tends all the way down to +5V.
<
n Low differential gain:
n Low differential phase:
n Wide supply range: 4.75V to 32V
n Stable with unlimited capacitive load
0.1%
<
0.1˚
™
These amplifiers are built with National’s VIP (Vertically In-
tegrated PNP) process which produces fast PNP transistors
that are true complements to the already fast NPN devices.
This advanced junction-isolated process delivers high speed
performance without the need for complex and expensive di-
electric isolation.
Applications
n Video amplifier
n Wide-bandwidth signal conditioning
n Radar
n Sonar
Connection Diagrams
10-Lead Flatpak
DS009153-15
Top View
NS Package Number W10A
DS009153-8
NS Package Number
J08A, M08A or N08E
™
VIP is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS009153
www.national.com
Connection Diagrams (Continued)
Temperature Range
Package
NSC
Drawing
Military
Industrial
−25˚C ≤ TA ≤ +85˚C
LM6264N
Commercial
0˚C ≤ TA ≤ +70˚C
LM6364N
−55˚C ≤ TA ≤ +125˚C
8-Pin Molded DIP
8-Pin Ceramic DIP
N08E
LM6164J/883
J08A
5962-8962401PA
LM6364M
8-Pin Molded Surface Mt.
10-Lead Ceramic SOIC
M08A
LM6164WG/883
5962-8962401XA
LM6164W/883
WG10A
10-Pin
W10A
5962-8962401HA
Ceramic Flatpak
www.national.com
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Storage Temperature Range
Max Junction Temperature
(Note 3)
−65˚C to +150˚C
Supply Voltage (V+ − V−)
Differential Input Voltage
(Note 7)
36V
150˚C
±
ESD Tolerance (Notes 7, 8)
700V
±
8V
Common-Mode Input Voltage
(Note 11)
Operating Ratings
Temperature Range (Note 3)
LM6164
(V+ − 0.7V) to (V− + 0.7V)
Continuous
Output Short Circuit to Gnd
(Note 2)
−55˚C ≤ TJ ≤ +125˚C
−25˚C ≤ TJ ≤ +85˚C
0˚C ≤ TJ ≤ +70˚C
4.75V to 32V
LM6264
Soldering Information
Dual-In-Line Package (N, J)
Soldering (10 sec.)
Small Outline Package (M)
Vapor Phase (60 sec.)
Infrared (15 sec.)
LM6364
Supply Voltage Range
260˚C
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage
to the device may occur. Operating Ratings indicate conditions for which the
device is functional, but do not guarantee specific performance limits.
215˚C
220˚C
DC Electrical Characteristics
=
= =
15V, VCM 0, RL ≥ 100 kΩ and RS 50Ω unless otherwise noted.
±
The following specifications apply for Supply Voltage
=
=
=
=
Boldface limits apply for TA TJ TMIN to TMAX; all other limits TA TJ 25˚C.
LM6164
LM6264
Limit
(Note 4)
4
LM6364
Limit
(Note 4)
9
Symbol
Parameter
Conditions
Typ
2
Limit
Units
(Notes 4, 12)
VOS
Input Offset Voltage
4
mV
max
6
6
11
VOS
Drift
Ib
Input Offset Voltage
Average Drift
6
µV/˚C
Input Bias Current
2.5
150
0.3
3
3
5
µA
max
nA
6
5
6
IOS
Input Offset Current
350
800
350
600
1500
1900
max
nA/˚C
IOS
Input Offset Current
Average Drift
Drift
RIN
Input Resistance
Input Capacitance
Large Signal
Differential
100
3.0
2.5
kΩ
pF
CIN
=
=
±
AVOL
VOUT
10V, RL 2 kΩ
1.8
1.8
1.3
V/mV
min
Voltage Gain
(Note 10)
0.9
1.2
1.1
=
RL 10 kΩ
9
=
±
VCM
Input Common-Mode
Voltage Range
Supply
15V
+14.0
+13.9
+13.8
−13.3
−13.1
3.9
+13.9
+13.8
−13.3
−13.1
3.9
+13.8
+13.7
−13.2
−13.1
3.8
V
min
V
−13.5
4.0
min
V
=
Supply +5V
(Note 5)
3.8
3.8
3.7
min
V
1.5
1.7
1.7
1.8
1.9
1.9
1.9
max
dB
min
dB
min
CMRR
PSRR
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
−10V ≤ VCM ≤ +10V
105
96
86
86
80
80
82
78
±
±
±
≤ 16V
10V ≤ V
86
86
80
80
82
78
3
www.national.com
DC Electrical Characteristics (Continued)
=
= =
15V, VCM 0, RL ≥ 100 kΩ and RS 50Ω unless otherwise noted.
±
The following specifications apply for Supply Voltage
=
=
=
=
Boldface limits apply for TA TJ TMIN to TMAX; all other limits TA TJ 25˚C.
LM6164
Limit
(Notes 4, 12)
+13.5
+13.3
−13.0
−12.7
3.5
LM6264
Limit
(Note 4)
+13.5
+13.3
−13.0
−12.8
3.5
LM6364
Limit
(Note 4)
+13.4
+13.3
−12.9
−12.8
3.4
Symbol
Parameter
Conditions
Typ
+14.2
−13.4
4.2
Units
=
VO
Output Voltage
Swing
Supply +5V
V
min
V
=
and RL 2 kΩ
min
V
=
Supply +5V
=
and RL 2 kΩ
3.3
3.3
3.3
min
V
(Note 10)
Source
Sink
1.3
1.7
1.7
1.8
2.0
1.9
1.9
max
mA
min
mA
min
mA
min
Output Short
65
30
30
30
Circuit Current
20
25
25
65
30
30
30
20
25
25
IS
Supply Current
5.0
6.5
6.5
6.8
6.8
6.7
6.9
AC Electrical Characteristics
=
= =
15V, VCM 0, RL ≥ 100 kΩ and RS 50Ω unless otherwise noted.
±
The following specifications apply for Supply Voltage
=
=
=
=
Boldface limits apply for TA TJ TMIN to TMAX; all other limits TA TJ 25˚C.
LM6164
LM6264
Limit
(Note 4)
140
LM6364
Limit
(Note 4)
120
Symbol
Parameter
Conditions
Typ
Limit
(Notes 4, 12)
140
Units
=
GBW
Gain-Bandwidth
Product
F
20 MHz
175
MHz
min
100
120
100
=
±
Supply
5V
120
300
=
SR
Slew Rate
AV +5 (Note 9)
200
200
200
V/µs
min
180
180
180
=
±
Supply
5V
200
4.5
=
PBW
TS
Power Bandwidth
Settling Time
VOUT 20 VPP
MHz
ns
10V Step to 0.1%
100
=
=
AV −4, RL 2 kΩ
=
φm
Phase Margin
Differential Gain
Differential Phase
Input Noise
Voltage
AV +5
45
Deg
%
=
<
<
AD
NTSC, AV +10
0.1
0.1
8
=
φD
NTSC, AV +10
Deg
=
=
enp-p
F
F
10 kHz
inp-p
Input Noise
Current
10 kHz
1.5
Note 2: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C.
Note 3: The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105˚C/Watt, the molded plastic SO (M) package is 155˚C/Watt, and the
cerdip (J) package is 125˚C/Watt. All numbers apply for packages soldered directly into a printed circuit board.
Note 4: Limits are guaranteed by testing or correlation.
+
−
=
=
=
=
2.5V, V 2.5V. Pin 1 & Pin 8 (V Adjust) are each connected to
OUT OS
Note 5: For single supply operation, the following conditions apply: V
5V, V
0V, V
CM
−
Pin 4 (V ) to realize maximum output swing. This connection will degrade V
.
OS
Note 6:
C ≤ 5 pF.
L
Note 7: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage re-
sults in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially V , I , and
OS OS
Noise).
Note 8: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test circuit
used consists of the human body model of 100 pF in series with 1500Ω.
www.national.com
4
AC Electrical Characteristics (Continued)
=
=
=
5V, V 1V step.
IN
±
Note 9:
V
IN
4V step. For supply
Note 10: Voltage Gain is the total output swing (20V) divided by the input signal required to produce that swing.
+
Note 11: The voltage between V and either input pin must not exceed 36V.
Note 12: A military RETS electrical test specification is available on request. At the time of printing, the LM6164J/883 RETS spec complied with the Boldface limits
in this column. The LM6164J/883 may also be procured as Standard Military Drawing #5962-8962401PA.
=
=
Typical Performance Characteristics (RL 10 kΩ, TA 25˚C unless otherwise specified)
Supply Current vs
Supply Voltage
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
DS009153-16
DS009153-17
DS009153-18
Gain-Bandwidth
Product
Propagation Delay
Rise and Fall Time
Gain-Bandwidth Product
vs Load Capacitance
DS009153-19
DS009153-20
DS009153-21
Slew Rate vs
Load Capacitance
Overshoot vs
Load Capacitance
Slew Rate
DS009153-23
DS009153-24
DS009153-22
5
www.national.com
=
=
Typical Performance Characteristics (RL 10 kΩ, TA 25˚C unless otherwise
specified) (Continued)
Voltage Gain vs
Load Resistance
Gain vs Supply Voltage
DS009153-26
DS009153-25
Differential Gain
Differential Phase
(Note 13)
(Note 13)
DS009153-7
DS009153-6
Note 13: Differential gain and differential phase measured for four series LM6364 op amps in series with an LM6321 buffer. Error added by LM6321 is negligible.
Test performed using Tektronix Type 520 NTSC test system. Configured with a gain of +5 (each output attenuated by 80%)
=
Step Response; Av +5
TIME (50 ns /div)
DS009153-1
www.national.com
6
=
=
Typical Performance Characteristics (RL 10 kΩ, TA 25˚C unless otherwise
specified) (Continued)
Input Noise Voltage
Input Noise Current
Power Bandwidth
DS009153-27
DS009153-28
DS009153-29
Open-Loop
Frequency Response
Open-Loop
Frequency Response
Output Resistance
Open-Loop
DS009153-30
DS009153-31
DS009153-32
Common-Mode Input
Saturation Voltage
Bias Current vs
Common-Mode Voltage
Output Saturation Voltage
DS009153-34
DS009153-35
DS009153-33
7
www.national.com
Simplified Schematic
DS009153-3
Applications Tips
The LM6364 has been compensated for gains of 5 or greater
(over specified ranges of temperature, power supply voltage,
and load). Since this compensation involved adding
emitter-degeneration resistors in the op amp’s input stage,
the open-loop gain was reduced as the stability increased.
Gain error due to reduced AVOL is most apparent at high
gains; thus, the uncompensated LM6365 is appropriate for
gains of 25 or more. If unity-gain operation is desired, the
LM6361 should be used. The LM6361, LM6364, and
LM6365 have the same high slew rate (typically 300 V/µs),
regardless of their compensation.
Power supply bypassing will improve the stability and tran-
sient response of the LM6364, and is recommended for ev-
ery design. 0.01 µF to 0.1 µF ceramic capacitors should be
used (from each supply “rail” to ground); if the device is far
away from its power supply source, an additional 2.2 µF to
10 µF (tantalum) may be required for extra noise reduction.
Keep all leads short to reduce stray capacitance and lead in-
ductance, and make sure ground paths are low-impedance,
especially where heavier currents will be flowing. Stray ca-
pacitance in the circuit layout can cause signal coupling be-
tween adjacent nodes, so that circuit gain unintentionally
varies with frequency.
The LM6364 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (in low-gain circuits). However,
load capacitance on the LM6364 effectively increases its
compensation capacitance, thus slowing the op amp’s re-
sponse and reducing its bandwidth. The compensation is not
ideal, though, and ringing or oscillation may occur in
low-gain circuits with large capacitive loads. To overcompen-
sate the LM6364 for operation at gains less than 5, a series
resistor-capacitor network should be added between the in-
put pins (as shown in the Typical Applications, Noise Gain
Compensation) so that the high-frequency noise gain rises
to at least 5.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into the
circuit, the additional input capacitance may degrade circuit
performance.
www.national.com
8
Typical Applications
Offset Voltage Adjustment
Video-Bandwidth Amplifier
DS009153-10
DS009153-12
Noise-Gain Compensation for Gains ≤5
DS009153-11
−1
R
X
C ≥ (2π•25 MHz)
X
=
5 R
X
R + R (1 + R /R )
1 F 1 2
9
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted
Ceramic Dual-In-Line Package (J)
Order Number LM6164J/883
NS Package Number J08A
Molded Package SO (M)
Order Number LM6364M
NS Package Number M08A
www.national.com
10
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Molded Dual-In-Line Package (N)
Order Number LM6264N or LM6364N
NS Package Number N08E
10-Pin Ceramic Flatpak
Order Number LM6164W/883
NS Package Number W10A
11
www.national.com
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
National Semiconductor
Europe
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
Email: sea.support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
©2020 ICPDF网 联系我们和版权申明