LM4891M [NSC]
1 Watt Audio Power Amplifier; 1瓦音频功率放大器
| 型号： | LM4891M |
| 厂家： | 
National Semiconductor |
| 描述： | 1 Watt Audio Power Amplifier |
| 文件： | 总20页 (文件大小：729K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2002
LM4891
1 Watt Audio Power Amplifier
General Description
Key Specifications
The LM4891 is an audio power amplifier primarily designed
for demanding applications in mobile phones and other por-
table communication device applications. It is capable of
delivering 1 watt of continuous average power to an 8Ω BTL
load with less than 1% distortion (THD+N) from a 5VDC
power supply.
j
PSRR at 217Hz, VDD = 5V, 8Ω Load
62dB (typ)
1.0W (typ)
j
j
j
Power Output at 5.0V & 1% THD
Power Output at 3.3V & 1% THD
Shutdown Current
400mW (typ)
0.1µA (typ)
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4891 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage appli-
cations where minimal power consumption is a primary re-
quirement.
Features
n Available in space-saving packages: micro SMD, MSOP,
SOIC, and LLP
n Ultra low current shutdown mode
n BTL output can drive capacitive loads
n Improved pop & click circuitry eliminates noises during
turn-on and turn-off transitions
n 2.2 to 5.5V operation
n No output coupling capacitors, snubber networks or
bootstrap capacitors required
n Thermal shutdown protection
n Unity-gain stable
n External gain configuration capability
The LM4891 features a low-power consumption shutdown
mode, which is achieved by driving the shutdown pin with
logic high. Additionally, the LM4891 features an internal ther-
mal shutdown protection mechanism.
The LM4891 contains advanced pop & click circuitry which
eliminates noises which would otherwise occur during
turn-on and turn-off transitions.
The LM4891 is unity-gain stable and can be configured by
external gain-setting resistors.
Applications
n Mobile Phones
n PDAs
n Portable electronic devices
Typical Application
20007401
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2002 National Semiconductor Corporation
DS200074
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Connection Diagrams
8 Bump micro SMD
Small Outline (SO) Package
20007435
Top View
Order Number LM4891M
See NS Package Number M08A
20007423
Top View
Order Number LM4891IBP, LM4891IBPX
See NS Package Number BPA08DDB
8 Bump micro SMD Marking
SO Marking
20007470
Top View
20007472
Top View
X - Date Code
XY - Date Code
T - Die Traceability
G - Boomer Family
G - LM4891IBP
TT - Die Traceability
Bottom 2 lines - Part Number
Mini Small Outline (MSOP) Package
MSOP Marking
20007471
Top View
G - Boomer Family
91 - LM4891MM
20007436
Top View
Order Number LM4891MM
See NS Package Number MUA08A
LLP Package
10 Pin LLP Marking
20007479
Top View
Z - Assembly Plant Code (M for Malacca)
XY - 2 Digit Datecode
TT - 2 Letter Code for Traceability
L4891 - LM4891LD
20007480
Top View
Order Number LM4891LD
See NS Package Number LDA10B
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2
Absolute Maximum Ratings (Note 2)
θJC (MSOP)
56˚C/W
190˚C/W
220˚C/W
θJA (MSOP)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
θJA (LLP)
Soldering Information
See AN-1112 "microSMD Wafers Level Chip Scale
Package".
Supply Voltage (Note 11)
Storage Temperature
Input Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally Limited
2000V
See AN-1187 "Leadlesss
Leadframe Package (LLP)".
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
Thermal Resistance
θJC (SOP)
250V
Operating Ratings
Temperature Range
150˚C
TMIN ≤ TA ≤ TMAX
−40˚C ≤ TA ≤ 85˚C
2.2V ≤ VDD ≤ 5.5V
35˚C/W
150˚C/W
220˚C/W
Supply Voltage
θJA (SOP)
θJA (micro SMD)
Electrical Characteristics VDD = 5V (Notes 1, 2, 8)
The following specifications apply for VDD = 5V, AV = 2, and 8Ω load unless otherwise specified. Limits apply for TA = 25˚C.
LM4891
Units
Symbol
IDD
Parameter
Conditions
VIN = 0V, Io = 0A
Typical
Limit
(Note 7)
10
(Limits)
(Note 6)
Quiescent Power Supply Current
Shutdown Current
4
0.1
mA (max)
ISD
Vshutdown = VDD
µA (max)
Po
Output Power
THD = 2% (max); f = 1 kHz
Po = 0.4 Wrms; f = 1kHz
Vripple = 200mV sine p-p
1
W
%
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
0.1
62 (f =
217Hz)
66 (f = 1kHz)
dB
Electrical Characteristics VDD = 3.3V (Notes 1, 2, 8)
The following specifications apply for VDD = 3.3V, AV = 2, and 8Ω load unless otherwise specified. Limits apply for TA = 25˚C.
LM4891
Units
Symbol
IDD
Parameter
Conditions
VIN = 0V, Io = 0A
Typical
(Note 6)
3.5
Limit
(Limits)
(Note 7)
Quiescent Power Supply Current
Shutdown Current
mA (max)
ISD
Vshutdown = VDD
0.1
µA (max)
Po
Output Power
THD = 1% (max); f = 1kHz
Po = 0.15Wrms; f = 1kHz
Vripple = 200mV sine p-p
0.4
W
%
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
0.1
60 (f =
217Hz)
62 (f = 1kHz)
dB
Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for VDD = 2.6V, AV = 2, and 8Ω Load unless otherwise specified. Limits apply for TA
=
25˚C.
LM4891
Units
(Limits)
Symbol
Parameter
Conditions
Typical
(Note 6)
2.6
Limit
(Note 7)
IDD
ISD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, Io = 0A
Vshutdown = VDD
mA (max)
µA (max)
0.1
3
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Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for VDD = 2.6V, AV = 2, and 8Ω Load unless otherwise specified. Limits apply for TA
=
25˚C. (Continued)
LM4891
Units
(Limits)
Symbol
P0
Parameter
Output Power ( 8Ω )
Conditions
Typical
(Note 6)
0.25
Limit
(Note 7)
THD = 1% (max); f = 1 kHz THD =
1% (max); f = 1 kHz
W
W
%
Output Power ( 4Ω )
0.28
THD+N
PSRR
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
Po = 0.1Wrms; f = 1kHz
Vripple = 200mV sine p-p
0.08
44 (f =
dB
217Hz)
44 (f = 1kHz)
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
A
JMAX JA
allowable power dissipation is P
= (T
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4891, see power derating
DMAX
JMAX A JA
curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.
SD
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: ROUT is measured from each of the output pins to ground. This value represents the parallel combination of the 10k ohm output resistors and the two 20k
ohm resistors.
Note 11: If the product is in shutdown mode and V exceeds 6V (to a max of 8V V ), then most of the excess current will flow through the ESD protection circuits.
DD
DD
If the source impedance limits the current to a max of 10 ma, then the part will be protected. If the part is enabled when V is greater than 5.5V and less than 6.5V,
DD
no damage will occur, although operational life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.
Note 12: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. All bumps must be connected to achieve
specified thermal resistance.
Note 13: Maximum power dissipation (P
) in the device occurs at an output power level significantly below full output power. P
can be calculated using
DMAX
DMAX
Equation 1 shown in the Application section. It may also be obtained from the power dissipation graphs.
Note 14: PSRR is a function of system gain. Specifications apply to the circuit in Figure 1 where A = 2. Higher system gains will reduce PSRR value by the amount
V
of gain increase. A system gain of 10 represents a gain increase of 14dB. PSRR will be reduced by 14dB and applies to all operating voltages.
External Components Description
(Figure 1)
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with Ci at fC= 1/(2π RiCi).
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External
Components, for information concerning proper placement and selection of CB.
5.
CB
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Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
at VDD = 5V, 8Ω RL, and PWR = 250mW
at VDD = 3.3V, 8Ω RL, and PWR = 150mW
20007437
20007438
THD+N vs Frequency
THD+N vs Frequency
at VDD = 2.6V, 8Ω RL, and PWR = 100mW
at VDD = 2.6V, 4Ω RL, and PWR = 100mW
20007439
20007440
THD+N vs Power Out
VDD = 5V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 3.3V, 8Ω RL, 1kHz
@
@
20007441
20007442
5
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Typical Performance Characteristics (Continued)
THD+N vs Power Out
VDD = 2.6V, 8Ω RL, 1kHz
THD+N vs Power Out
VDD = 2.6V, 4Ω RL, 1kHz
@
@
20007443
20007444
@
@
Power Supply Rejection Ratio (PSRR) VDD = 5V
Power Supply Rejection Ratio (PSRR) VDD = 5V
20007445
20007473
Input terminated with 10Ω R
Input Floating
@
@
Power Supply Rejection Ratio (PSRR) VDD = 2.6V
Power Supply Rejection Ratio (PSRR) VDD = 3.3V
20007447
20007446
Input terminated with 10Ω R
Input terminated with 10Ω R
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Typical Performance Characteristics (Continued)
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
VDD = 5V, 1kHz, 8Ω, THD ≤ 1.0%
@
VDD = 3.3V
20007449
20007484
Power Dissipation vs
Output Power
Output Power vs
Load Resistance
VDD = 2.6V
20007451
20007450
Supply Current vs
Shutdown Voltage
Clipping (Dropout) Voltage vs
Supply Voltage
20007452
20007474
7
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Typical Performance Characteristics (Continued)
Open Loop Frequency Response
VDD = 5V No Load
Open Loop Frequency Response
VDD = 3V No Load
20007475
20007476
Power Derating Curves
(PDMAX = 670mW)
Power Derating Curves
for 8 Bump microSMD (PDMAX = 670mW)
20007481
20007482
Power Derating - 10 Pin LD Pkg
Frequency Response vs
Input Capacitor Size
PDMAX = 670mW, 5V, 8Ω
20007483
20007454
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EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATIONS FOR THE LM4891LD
Typical Performance
Characteristics (Continued)
The LM4891LD’s exposed-DAP (die attach paddle) package
(LD) provides a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. The
LM4891LD package should have its DAP soldered to the
grounded copper pad (heatsink) under the LM4891LD (the
NC pins, no connect, and ground pins should also be directly
connected to this copper pad-heatsink area). The area of the
copper pad (heatsink) can be determined from the LD Power
Derating graph. If the multiple layer copper heatsink areas
are used, then these inner layer or backside copper heatsink
areas should be connected to each other with 4 (2 x 2) vias.
The diameter for these vias should be between 0.013 inches
and 0.02 inches with a 0.050inch pitch-spacing. Ensure
efficient thermal conductivity by plating through and solder-
filling the vias. Further detailed information concerning PCB
layout, fabrication, and mounting an LLP package is avail-
able from National Semiconductor’s Package Engineering
Group under application note AN1187.
Noise Floor
POWER DISSIPATION
20007456
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the LM4891 has two opera-
tional amplifiers in one package, the maximum internal
power dissipation is 4 times that of a single-ended amplifier.
The maximum power dissipation for a given application can
be derived from the power dissipation graphs or from Equa-
tion 1.
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4891 has two operational
amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier’s gain is externally config-
urable, while the second amplifier is internally fixed in a
unity-gain, inverting configuration. The closed-loop gain of
the first amplifier is set by selecting the ratio of Rf to Ri while
the second amplifier’s gain is fixed by the two internal 20 kΩ
resistors. Figure 1 shows that the output of amplifier one
serves as the input to amplifier two which results in both
amplifiers producing signals identical in magnitude, but out
of phase by 180˚. Consequently, the differential gain for the
IC is
PDMAX = 4*(VDD)2/(2π2RL)
(1)
It is critical that the maximum junction temperature (TJMAX
)
of 150˚C is not exceeded. TJMAX can be determined from the
power derating curves by using PDMAX and the PC board foil
area. By adding additional copper foil, the thermal resistance
of the application can be reduced from a free air value of
150˚C/W, resulting in higher PDMAX. Additional copper foil
can be added to any of the leads connected to the LM4891.
It is especially effective when connected to VDD, GND, and
the output pins. Refer to the application information on the
LM4891 reference design board for an example of good heat
sinking. If TJMAX still exceeds 150˚C, then additional
changes must be made. These changes can include re-
duced supply voltage, higher load impedance, or reduced
ambient temperature. Internal power dissipation is a function
of output power. Refer to the Typical Performance Charac-
teristics curves for power dissipation information for differ-
ent output powers and output loading.
AVD= 2 *(Rf/Ri)
By driving the load differentially through outputs Vo1 and
Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both the bypass and power supply pins
should be as close to the device as possible. Typical appli-
cations employ a 5V regulator with 10 µF tantalum or elec-
trolytic capacitor and a ceramic bypass capacitor which aid
in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4891. The selection of
a bypass capacitor, especially CB, is dependent upon PSRR
requirements, click and pop performance (as explained in
the section, Proper Selection of External Components),
system cost, and size constraints.
A bridge configuration, such as the one used in LM4891,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, Vo1 and Vo2, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion. Without an output coupling capacitor, the half-supply
bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
9
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Besides minimizing the input capacitor size, careful consid-
eration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize
turn-on pops since it determines how fast the LM4891 turns
on. The slower the LM4891’s outputs ramp to their quiescent
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.
Choosing CB equal to 1.0 µF along with a small value of Ci
(in the range of 0.1 µF to 0.39 µF), should produce a virtually
clickless and popless shutdown function. While the device
will function properly, (no oscillations or motorboating), with
CB equal to 0.1 µF, the device will be much more susceptible
to turn-on clicks and pops. Thus, a value of CB equal to
1.0 µF is recommended in all but the most cost sensitive
designs.
Application Information (Continued)
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the
LM4891 contains a shutdown pin to externally turn off the
amplifier’s bias circuitry. This shutdown feature turns the
amplifier off when a logic high is placed on the shutdown pin.
By switching the shutdown pin to VDD, the LM4891 supply
current draw will be minimized in idle mode. While the device
will be disabled with shutdown pin voltages more than
1.0VDC, the idle current may be greater than the typical
value of 0.1µA. (Idle current is measured with the shutdown
pin tied to VDD).
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry to provide a
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch in conjunction with an
external pull-up resistor. When the switch is closed, the
shutdown pin is connected to ground which enables the
amplifier. If the switch is open, then the external pull-up
resistor to VDD will disable the LM4891. This scheme guar-
antees that the shutdown pin will not float thus preventing
unwanted state changes.
AUDIO POWER AMPLIFIER DESIGN
A 1W/8Ω AUDIO AMPLIFIER
Given:
Power Output
Load Impedance
Input Level
1 Wrms
8Ω
1 Vrms
Input Impedance
Bandwidth
20 kΩ
PROPER SELECTION OF EXTERNAL COMPONENTS
100 Hz–20 kHz 0.25 dB
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4891 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity.
A designer must first determine the minimum supply rail to
obtain the specified output power. By extrapolating from the
Output Power vs Supply Voltage graphs in the Typical Per-
formance Characteristics section, the supply rail can be
easily found. A second way to determine the minimum sup-
ply rail is to calculate the required Vopeak using Equation 2
and add the output voltage. Using this method, the minimum
The LM4891 is unity-gain stable which gives the designer
maximum system flexibility. The LM4891 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1 Vrms are available
from sources such as audio codecs. Please refer to the
section, Audio Power Amplifier Design, for a more com-
plete explanation of proper gain selection.
supply voltage would be (Vopeak + (VOD
+ VODBOT)), where
VOD
and VOD
are extrapolated frToOmP the Dropout Volt-
TOP
age BvOsT Supply Voltage curve in the Typical Performance
Characteristics section.
(2)
Besides gain, one of the major considerations is the closed-
loop bandwidth of the amplifier. To a large extent, the band-
width is dictated by the choice of external components
shown in Figure 1. The input coupling capacitor, Ci, forms a
first order high pass filter which limits low frequency re-
sponse. This value should be chosen based on needed
frequency response for a few distinct reasons.
5V is a standard voltage, in most applications, chosen for the
supply rail. Extra supply voltage creates headroom that al-
lows the LM4891 to reproduce peaks in excess of 1W with-
out producing audible distortion. At this time, the designer
must make sure that the power supply choice along with the
output impedance does not violate the conditions explained
in the Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 3.
Selection Of Input Capacitor Size
Large input capacitors are both expensive and space hungry
for portable designs. Clearly, a certain sized capacitor is
needed to couple in low frequencies without severe attenu-
ation. But in many cases the speakers used in portable
systems, whether internal or external, have little ability to
reproduce signals below 100 Hz to 150 Hz. Thus, using a
large input capacitor may not increase actual system perfor-
mance.
(3)
AVD = (Rf/Ri) 2
From Equation 3, the minimum AVD is 2.83; use AVD = 3.
Since the desired input impedance was 20 kΩ, and with a
AVD of 3, a ratio of 1.5:1 of Rf to Ri results in an allocation of
Ri = 20 kΩ and Rf = 30 kΩ. The final design step is to
address the bandwidth requirements which must be stated
as a pair of −3 dB frequency points. Five times away from a
−3 dB point is 0.17 dB down from passband response which
is better than the required 0.25 dB specified.
In addition to system cost and size, click and pop perfor-
mance is effected by the size of the input coupling capacitor,
Ci. A larger input coupling capacitor requires more charge to
reach its quiescent DC voltage (nominally 1/2 VDD). This
charge comes from the output via the feedback and is apt to
create pops upon device enable. Thus, by minimizing the
capacitor size based on necessary low frequency response,
turn-on pops can be minimized.
fL = 100 Hz/5 = 20 Hz
fH = 20 kHz * 5 = 100 kHz
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With a AVD = 3 and fH = 100 kHz, the resulting GBWP =
300 kHz which is much smaller than the LM4891 GBWP of
2.5 MHz. This figure displays that if a designer has a need to
design an amplifier with a higher differential gain, the
LM4891 can still be used without running into bandwidth
limitations.
Application Information (Continued)
As stated in the External Components section, Ri in con-
junction with Ci create a highpass filter.
Ci ≥ 1/(2π*20 kΩ*20 Hz) = 0.397 µF; use 0.39 µF
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AVD
.
20007424
FIGURE 2. Higher Gain Audio Amplifier
nates possible high frequency oscillations. Care should be
taken when calculating the -3dB frequency in that an incor-
rect combination of R3 and C4 will cause rolloff before
20kHz. A typical combination of feedback resistor and ca-
pacitor that will not produce audio band high frequency rolloff
is R3 = 20kΩ and C4 = 25pf. These components result in a
-3dB point of approximately 320 kHz.
The LM4891 is unity-gain stable and requires no external
components besides gain-setting resistors, an input coupling
capacitor, and proper supply bypassing in the typical appli-
cation. However, if a closed-loop differential gain of greater
than 10 is required, a feedback capacitor (C4) may be
needed as shown in Figure 2 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that elimi-
11
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Application Information (Continued)
20007429
FIGURE 3. Differential Amplifier Configuration for LM4891
20007425
FIGURE 4. Reference Design Board and Layout - micro SMD
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Application Information (Continued)
LM4891 micro SMD BOARD ARTWORK
Silk Screen
Top Layer
20007457
20007458
Bottom Layer
Inner Layer Ground
20007459
20007460
Inner Layer VDD
20007461
13
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Application Information (Continued)
20007468
FIGURE 5. Reference Design Board and PCB Layout Guidelines - MSOP & SO Boards
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LM4891 MSOP DEMO BOARD ARTWORK
Silk Screen
Application Information (Continued)
LM4891 SO DEMO BOARD ARTWORK
Silk Screen
20007465
20007462
Top Layer
Top Layer
20007466
20007463
Bottom Layer
Bottom Layer
20007467
20007464
15
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Application Information (Continued)
Mono LM4891 Reference Design Boards
Bill of Material for all 3 Demo Boards
Item
1
Part Number
Part Description
Qty
1
Ref Designator
551011208-001 LM4891 Mono Reference Design Board
482911183-001 LM4891 Audio AMP
10
20
21
25
30
35
1
U1
151911207-001 Tant Cap 1uF 16V 10
1
C1
151911207-002 Cer Cap 0.39uF 50V Z5U 20% 1210
152911207-001 Tant Cap 1uF 16V 10
1
C2
1
C3
472911207-001 Res 20K Ohm 1/10W 5
3
R1, R2, R3
J1, J2
210007039-002 Jumper Header Vertical Mount 2X1 0.100
2
PCB LAYOUT GUIDELINES
Single-Point Power / Ground Connections
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. It is further recommended to put
digital and analog power traces over the corresponding digi-
tal and analog ground traces to minimize noise coupling.
General Mixed Signal Layout Recommendation
Power and Ground Circuits
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required may be some jumpers.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and cross talk.
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Physical Dimensions inches (millimeters) unless otherwise noted
Note: Unless otherwise specified.
1. Epoxy coating.
2. 63Sn/37Pb eutectic bump.
3. Recommend non-solder mask defined landing pad.
4. Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.
5. Reference JEDEC registration MO-211, variation BC.
8-Bump micro SMD
Order Number LM4891IBP, LM4891IBPX
NS Package Number BPA08DDB
X1 = 1.361 0.03 X2 = 1.361 0.03 X3 = 0.850 0.10
17
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
MSOP
Order Number LM4891MM
NS Package Number MUA08A
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18
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
SO
Order Number LM4891M
NS Package Number M08A
19
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LLP
Order Number LM4891LD
NS Package Number LDA10B
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