LM4892IBP [TI]

1W, 1 CHANNEL, AUDIO AMPLIFIER, PBGA8, MICRO, SMD-8;
LM4892IBP
型号: LM4892IBP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

1W, 1 CHANNEL, AUDIO AMPLIFIER, PBGA8, MICRO, SMD-8

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OBSOLETE  
LM4892  
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SNAS130E MAY 2001REVISED APRIL 2013  
LM4892 Boomer® Audio Power Amplifier Series 1 Watt Audio Power Amplifier with  
Headphone Sense  
Check for Samples: LM4892  
1
FEATURES  
DESCRIPTION  
The LM4892 is an audio power amplifier primarily  
designed for demanding applications in mobile  
phones and other portable communication device  
applications. It is capable of delivering 1 watt of  
continuous average power to an 8BTL load with  
less than 1% distortion (THD+N) from a 5VDC power  
supply. Switching between bridged speaker mode  
and headphone (single-ended) mode is accomplished  
using the headphone sense pin.  
2
Available in Space-Saving Packages: WSON,  
DSBGA, VSSOP, and SOIC  
Ultra Low Current Shutdown Mode  
BTL Output Can Drive Capacitive Loads up to  
500pF  
Improved Pop & Click Circuitry Eliminates  
Noise During Turn-On and Turn-Off  
Transitions  
Boomer audio power amplifiers are designed  
specifically to provide high quality output power with a  
minimal amount of external components. The  
LM4892 does not require output coupling capacitors  
or bootstrap capacitors, and therefore is ideally suited  
for mobile phone and other low voltage applications  
where minimal power consumption is a primary  
requirement.  
2.2 - 5.5V Operation  
No Output Coupling Capacitors, Snubber  
Networks or Bootstrap Capacitors Required  
Thermal Shutdown Protection  
Unity-Gain Stable  
External Gain Configuration Capability  
Headphone Amplifier Mode  
The LM4892 features a low-power consumption  
shutdown mode, which is achieved by driving the  
shutdown pin with logic low. Additionally, the LM4892  
features an internal thermal shutdown protection  
mechanism.  
KEY SPECIFICATIONS  
PSRR at 217Hz, VDD = 5V, 8Load: 62dB (typ)  
Power Output at 5.0V & 1% THD: 1.0W (typ)  
Power Output at 3.3V & 1% THD: 400mW (typ)  
Shutdown Current: 0.1µA (typ)  
The LM4892 contains advanced pop & click circuitry  
which eliminates noise which would otherwise occur  
during turn-on and turn-off transitions.  
The LM4892 is unity-gain stable and can be  
configured by external gain-setting resistors.  
APPLICATIONS  
Mobile Phones  
PDAs  
Portable Electronic Devices  
TYPICAL APPLICATION  
Figure 1. Typical Audio Amplifier Application Circuit (Pin #'s apply to M & MM packages)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2013, Texas Instruments Incorporated  
 
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
CONNECTION DIAGRAM  
8 Bump micro SMD  
Small Outline (SOIC) Package  
Figure 2. (Top View)  
See Package Number YPB0008  
Figure 3. Top View  
See Package Number D0008A  
X - Date Code  
T - Die Traceability  
G - Boomer Family  
H - LM4892IBP  
Mini Small Outline (VSSOP) Package  
Figure 4. Top View  
Figure 5. micro SMD Marking (Top View)  
See Package Number DGK0008A  
XY - Date Code  
TT - Die Traceability  
Bottom 2 lines - Part Number  
G - Boomer Family  
92 - LM4892MM  
Figure 6. SOIC Marking (Top View)  
Figure 7. VSSOP Marking (Top View)  
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Figure 8. WSON Package (Top View)  
Package Number NGZ0010B  
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ABSOLUTE MAXIMUM RATINGS(1)(2)  
Supply Voltage  
6.0V  
65°C to +150°C  
0.3V to VDD +0.3V  
Internally Limited  
2500V  
Storage Temperature  
Input Voltage  
Power Dissipation(3)  
ESD Susceptibility(4)  
ESD Susceptibility(5)  
250V  
Junction Temperature  
Thermal Resistance  
150°C  
θJC (VSSOP)  
35°C/W  
150°C/W  
220°C/W  
56°C/W  
θJA (VSSOP)  
θJA (micro SMD)  
θJC (VSSOP)  
θJA (VSSOP)  
190°C/W  
220°C/W(6)  
θJA (WSON)  
Soldering Information  
See AN-1112 "microSMD Wafers Level Chip Scale Package".  
See AN-1187 "Leadless Leadframe Package (WSON)".  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature  
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever  
is lower. For the LM4892, see Figure 28 for additional information.  
(4) Human body model, 100pF discharged through a 1.5kresistor.  
(5) Machine Model, 220pF–240pF discharged through all pins.  
(6) The Exposed-DAP of the LDA10B package should be electrically connected to GND or an electrically isolated copper area. The  
LM4892LD demo board (views featured in the APPLICATION INFORMATION section) has the Exposed-DAP connected to GND with a  
PCB area of 353mils x 86.7mils (8.97mm x 2.20mm) on the copper top layer and 714.7mils x 368mils (18.15mm x 9.35mm) on the  
copper bottom layer.  
OPERATING RATINGS  
Temperature Range  
T
MIN TA TMAX  
40°C TA 85°C  
2.2V VDD 5.5V  
Supply Voltage  
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ELECTRICAL CHARACTERISTICS VDD = 5V(1)(2)  
The following specifications apply for VDD = 5V, AV = 2, and 8load unless otherwise specified. Limits apply for TA = 25°C.  
LM4892  
Units  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Limits)  
(3)  
(4)  
VIN = 0V, Io = 0A, HP sense = 0V  
VIN = 0V, Io = 0A, HP sense = 5V  
4
10  
mA (max)  
mA (max)  
µA (max)  
W
IDD  
ISD  
Quiescent Power Supply Current  
Shutdown Current  
2.5  
(5)  
Vshutdown = GND  
0.1  
THD = 2% (max), f = 1kHz,  
RL = 8, HP Sense < 0.8V  
1
Po  
Output Power  
THD = 1% (max), f = 1kHz,  
RL = 32, HP Sense > 4V  
mW  
90  
VIH  
HP Sense high input voltage  
HP Sense low input voltage  
Total Harmonic Distortion+Noise  
4
V (min)  
V (max)  
VIL  
0.8  
THD+N  
Po = 0.4 Wrms; f = 1kHz 10Hz BW ≤  
80kHz  
0.1  
%
PSSR  
Power Supply Rejection Ratio  
Vripple = 200mV sine p-p  
62 (f = 217Hz)  
66 (f = 1kHz)  
dB  
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
(5) For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a  
maximum of 2µA.  
ELECTRICAL CHARACTERISTICS VDD = 3.3V(1)(2)  
The following specifications apply for VDD = 3.3V, AV = 2, and 8load unless otherwise specified. Limits apply for TA = 25°C.  
LM4892  
Units  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Limits)  
(3)  
(4)  
VIN = 0V, Io = 0A, HP sense = 0V  
VIN = 0V, Io = 0A, HP sense = 3.3V  
Vshutdown = GND(5)  
3.5  
2.0  
0.1  
mA (max)  
mA (max)  
µA (max)  
IDD  
ISD  
Quiescent Power Supply Current  
Shutdown Current  
THD = 1% (max), f = 1kHz,  
RL = 8, HP Sense < 0.8V  
0.4  
35  
W
Po  
Output Power  
THD = 1% (max), f = 1kHz,  
RL = 32, HP Sense > 3V  
mW  
VIH  
HP Sense high input voltage  
HP Sense low input voltage  
Total Harmonic Distortion+Noise  
2.6  
0.8  
V (min)  
V (max)  
VIL  
THD+N  
Po = 0.15 Wrms; f = 1kHz 10Hz BW  
80kHz  
0.1  
%
PSSR  
Power Supply Rejection Ratio  
Vripple = 200mV sine p-p  
60(f = 217Hz)  
62 (f = 1kHz)  
dB  
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
(5) For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a  
maximum of 2µA.  
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ELECTRICAL CHARACTERISTICS VDD = 2.6V(1)(2)  
The following specifications apply for VDD = 2.6V, AV = 2, and 8load unless otherwise specified. Limits apply for TA = 25°C.  
LM4892  
Units  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Limits)  
(3)  
(4)  
VIN = 0V, Io = 0A, HP sense = 0V  
VIN = 0V, Io = 0A, HP sense = 2.6V  
Vshutdown = GND(5)  
2.6  
1.5  
0.1  
mA (max)  
mA (max)  
µA (max)  
IDD  
ISD  
Quiescent Power Supply Current  
Shutdown Current  
THD = 1% (max), f = 1kHz,  
RL = 8, HP Sense < 0.8V  
0.25  
0.28  
20  
W
W
THD = 1% (max), f = 1kHz,  
RL = 4, HP Sense < 0.8V  
Po  
Output Power  
THD = 1% (max), f = 1kHz, RL  
32, HP Sense > 2.5V  
=
mW  
VIH  
HP Sense high input voltage  
HP Sense low input voltage  
Total Harmonic Distortion+Noise  
2.0  
0.8  
V (min)  
V (max)  
%
VIL  
THD+N  
Po = 0.1 Wrms; f = 1kHz 10Hz BW ≤  
0.1  
80kHz  
PSSR  
Power Supply Rejection Ratio  
Vripple = 200mV sine p-p  
44(f = 217Hz)  
44 (f = 1kHz)  
dB  
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.  
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical  
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the  
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication  
of device performance.  
(3) Typicals are measured at 25°C and represent the parametric norm.  
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.  
(5) For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a  
maximum of 2µA.  
EXTERNAL COMPONENTS DESCRIPTION  
(Figure 1)  
Components  
Functional Description  
1.  
Ri  
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high pass  
filter with Ci at fC= 1/(2π RiCi).  
2.  
Ci  
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with  
Ri at fc = 1/(2π RiCi). Refer to the section, PROPER SELECTION OF EXTERNAL COMPONENTS, for an explanation  
of how to determine the value of Ci.  
3.  
4.  
Rf  
Feedback resistance which sets the closed-loop gain in conjunction with Ri.  
CS  
Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for  
information concerning proper placement and selection of the supply bypass capacitor.  
5.  
6.  
CB  
Bypass pin capacitor which provides half-supply filtering. Refer to the section, PROPER SELECTION OF EXTERNAL  
COMPONENTS, for information concerning proper placement and selection of CB.  
COUT This output coupling capacitor blocks DC voltage while coupling the AC audio signal to the headphone speaker.  
Combined with RL, the headphone impedance, it creates a high pass filter at fc = 1/(2πRLCOUT). Refer to the section,  
PROPER SELECTION OF EXTERNAL COMPONENTS for an explanation of how to determine the value of COUT  
.
7.  
8.  
9.  
RPU  
RS  
This is the pull up resistor to activate headphone operation when a headphone plug is plugged into the headphone jack.  
This is the current limiting resistor for the headphone input pin.  
RPD  
This is the pull down resistor to de-activate headphone operation when no headphone is plugged into the headphone  
jack.  
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TYPICAL PERFORMANCE CHARACTERISTICS  
THD+N vs Frequency  
at VDD = 5V, 8RL, and PWR = 250mW  
THD+N vs Frequency  
at VDD = 3.3V, 8RL, and PWR = 150mW  
Figure 9.  
Figure 10.  
THD+N vs Frequency  
at VDD = 2.6V, 8RL, and PWR = 100mW  
THD+N vs Frequency  
at VDD = 2.6V, 4RL, and PWR = 100mW  
Figure 11.  
Figure 12.  
THD+N vs Power Out  
at VDD = 5V, 8RL, 1kHz  
THD+N vs Power Out  
at VDD = 3.3V, 8RL, 1kHz  
Figure 13.  
Figure 14.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
THD+N vs Power Out  
at VDD = 2.6V, 8RL, 1kHz  
THD+N vs Power Out  
at VDD = 2.6V, 4RL, 1kHz  
Figure 15.  
Figure 16.  
Power Supply Rejection Ratio (PSRR)  
Power Supply Rejection Ratio (PSRR)  
vs  
vs  
Frequency  
at VDD = 5V, 8RL  
Frequency  
at VDD = 5V, 8RL  
Figure 17. Input terminated with 10R  
Figure 18. Input Floating  
Power Supply Rejection Ratio (PSRR)  
Power Supply Rejection Ratio (PSRR)  
vs  
vs  
Frequency  
at VDD = 2.6V, 8RL  
Frequency  
at VDD = 3.3V, 8RL  
Figure 19. Input terminated with 10R  
Figure 20. Input terminated with 10R  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Power Dissipation vs  
Output Power  
VDD = 5V  
Power Dissipation vs Output Power  
VDD = 3.3V  
Figure 21.  
Figure .  
Output Power vs  
Load Resistance  
Power Dissipation vs Output Power  
VDD = 2.6V  
Figure 22.  
Figure 23.  
Supply Current vs  
Shutdown Voltage  
Clipping (Dropout) Voltage vs  
Supply Voltage  
Figure 24.  
Figure 25.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
Open Loop Frequency Response  
VDD = 5V No Load  
Open Loop Frequency Response  
VDD = 3V No Load  
Figure 26.  
Figure 27.  
Power Derating Curves vs  
for 8 Bump microSMD  
Power Derating Curves  
Figure 28.  
Figure 29.  
Frequency Response vs  
Input Capacitor Size  
Noise Floor  
Figure 30.  
Figure 31.  
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
THD+N vs Frequency  
at VDD = 5V, RL = 32, PWR = 70mW, Headphone mode  
THD+N vs Power Out  
at VDD = 5V, RL = 32, 1kHz, Headphone mode  
Figure 32.  
Figure 33.  
Output Power vs Supply Voltage  
Output Power vs Supply Voltage  
RL = 8Ω  
RL = 16Ω  
Figure 34.  
Figure 35.  
Output Power vs Supply Voltage  
Output Power vs Supply Voltage  
Headphone Output, RL = 32Ω  
RL = 32Ω  
Figure 36.  
Figure 37.  
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APPLICATION INFORMATION  
BRIDGE CONFIGURATION EXPLANATION  
As shown in Figure 1, the LM4892 has two operational amplifiers internally, allowing for a few different amplifier  
configurations. The first amplifier's gain is externally configurable, while the second amplifier is internally fixed in  
a unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to  
Ri while the second amplifier's gain is fixed by the two internal 20kresistors. Figure 1 shows that the output of  
amplifier one serves as the input to amplifier two which results in both amplifiers producing signals identical in  
magnitude, but out of phase by 180°. Consequently, the differential gain for the IC is  
AVD= 2 *(Rf/Ri)  
(1)  
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as  
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier  
configuration where one side of the load is connected to ground.  
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides  
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output  
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable  
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-  
loop gain without causing excessive clipping, please refer to the AUDIO POWER AMPLIFIER DESIGN section.  
A bridge configuration, such as the one used in LM4892, also creates a second advantage over single-ended  
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across  
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-  
ended amplifier configuration. Without an output coupling capacitor, the half-supply bias across the load would  
result in both increased internal IC power dissipation and also possible loudspeaker damage.  
POWER DISSIPATION  
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or  
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an  
increase in internal power dissipation. Since the LM4892 has two operational amplifiers in one package, the  
maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation  
for a given application can be derived from the power dissipation graphs or from Equation 2.  
PDMAX = 4*(VDD)2/(2π2RL)  
(2)  
It is critical that the maximum junction temperature TJMAX of 150°C is not exceeded. TJMAX can be determined  
from the power derating curves by using PDMAX and the PC board foil area. By adding additional copper foil, the  
thermal resistance of the application can be reduced from a free air value of 150°C/W, resulting in higher PDMAX  
.
Additional copper foil can be added to any of the leads connected to the LM4892. It is especially effective when  
connected to VDD, GND, and the output pins. Refer to the application information on the LM4892 reference  
design board for an example of good heat sinking. If TJMAX still exceeds 150°C, then additional changes must be  
made. These changes can include reduced supply voltage, higher load impedance, or reduced ambient  
temperature. Internal power dissipation is a function of output power. Refer to the TYPICAL PERFORMANCE  
CHARACTERISTICS curves for power dissipation information for different output powers and output loading.  
POWER SUPPLY BYPASSING  
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply  
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as  
possible. Typical applications employ a 5V regulator with 10µF tantalum or electrolytic capacitor and a ceramic  
bypass capacitor which aid in supply stability. This does not eliminate the need for bypassing the supply nodes of  
the LM4892. The selection of a bypass capacitor, especially CB, is dependent upon PSRR requirements, click  
and pop performance (as explained in the section, PROPER SELECTION OF EXTERNAL COMPONENTS),  
system cost, and size constraints.  
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SHUTDOWN FUNCTION  
In order to reduce power consumption while not in use, the LM4892 contains a shutdown pin to externally turn off  
the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic low is placed on the  
shutdown pin. By switching the shutdown pin to ground, the LM4892 supply current draw will be minimized in idle  
mode. While the device will be disabled with shutdown pin voltages less than 0.5VDC, the idle current may be  
greater than the typical value of 0.1µA. (Idle current is measured with the shutdown pin grounded).  
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry to  
provide a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in  
conjunction with an external pull-up resistor. When the switch is closed, the shutdown pin is connected to ground  
and disables the amplifier. If the switch is open, then the external pull-up resistor will enable the LM4892. This  
scheme ensures that the shutdown pin will not float thus preventing unwanted state changes.  
Table 1. Table 1. Logic Level Truth Table for Shutdown and HP Sense Operation  
Shutdown  
Logic High  
Logic High  
Logic Low  
Logic Low  
HP Sense Pin  
Logic Low  
Operational Mode  
Bridged Amplifier  
Logic High  
Logic Low  
Single-Ended Amplifier  
Micro-Power Shutdown  
Micro-Power Shutdown  
Logic High  
HP SENSE FUNCTION  
Applying a voltage between 4V and VCC to the LM4892's HP-Sense headphone control pin turns off Amp2 and  
mutes a bridged-connected load. Quiescent current consumption is reduced when the IC is in the single-ended  
mode.  
Figure 38 shows the implementation of the LM4892's headphone control function. With no headphones  
connected to the headphone jack, the R4-R6 voltage divider sets the voltage applied to the HP-Sense pin (pin3)  
at approximately 50mV. This 50mV enables the LM4892 and places it in bridged mode operation.  
While the LM4892 operates in bridged mode, the DC potential across the load is essentially 0V. Since the HP-  
Sense threshold is set at 4V, even in an ideal situation, the output swing can not cause a false single-ended  
trigger. Connecting headphones to the headphone jack disconnects the headphone jack contact pin from V01  
and allows R4 to pull the HP Sense pin up to VCC. This enables the headphone function, turns off Amp2, and  
mutes the bridged speaker. The amplifier then drives the headphone whose impedance is in parallel with R6.  
Resistor R6 has negligible effect on output drive capability since the typical impedance of headphones is 32.  
The output coupling capacitor blocks the amplifier's half supply DC voltage, protecting the headphones.  
A microprocessor or a switch can replace the headphone jack contact pin. When a microprocessor or switch  
applies a voltage greater than 4V to the HP Sense pin, a bridged-connected speaker is muted and Amp1 drives  
the headphones.  
Figure 38. Headphone Circuit (Pin #'s apply to M & MM packages)  
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PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components in applications using integrated power amplifiers is critical to optimize  
device and system performance. While the LM4892 is tolerant of external component combinations,  
consideration to component values must be used to maximize overall system quality.  
The LM4892 is unity-gain stable which gives the designer maximum system flexibility. The LM4892 should be  
used in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain  
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1  
Vrms are available from sources such as audio codecs. Please refer to the section, AUDIO POWER AMPLIFIER  
DESIGN, for a more complete explanation of proper gain selection.  
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the  
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,  
forms a first order high pass filter which limits low frequency response. This value should be chosen based on  
needed frequency response for a few distinct reasons.  
SELECTION OF INPUT CAPACITOR SIZE  
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized  
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers  
used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to  
150Hz. Thus, using a large input capacitor may not increase actual system performance.  
In addition to system cost and size, click and pop performance is effected by the size of the input coupling  
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally  
1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable.  
Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be  
minimized.  
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.  
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the  
LM4892 turns on. The slower the LM4892's outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the  
smaller the turn-on pop. Choosing CB equal to 1.0µF along with a small value of Ci (in the range of 0.1µF to  
0.39µF), should produce a virtually clickless and popless shutdown function. While the device will function  
properly, (no oscillations or motorboating), with CB equal to 0.1µF, the device will be much more susceptible to  
turn-on clicks and pops. Thus, a value of CB equal to 1.0µF is recommended in all but the most cost sensitive  
designs.  
AUDIO POWER AMPLIFIER DESIGN  
A 1W/8AUDIO AMPLIFIER  
Given:  
Power Output  
Load Impedance  
Input Level  
1 Wrms  
8Ω  
1 Vrms  
Input Impedance  
Bandwidth  
20 kΩ  
100 Hz–20 kHz ± 0.25 dB  
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating  
from the Output Power vs Supply Voltage graphs in the TYPICAL PERFORMANCE CHARACTERISTICS  
section, the supply rail can be easily found. A second way to determine the minimum supply rail is to calculate  
the required Vopeak using Equation 3 and add the output voltage. Using this method, the minimum supply voltage  
would be (Vopeak + (VOD + VODBOT)), where V  
and VOD are extrapolated from the Dropout Voltage vs  
TOP  
BOT  
OD  
TOP  
Supply Voltage curve in the TYPICAL PERFORMANCE CHARACTERISTICS section.  
(3)  
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5V is a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates  
headroom that allows the LM4892 to reproduce peaks in excess of 1W without producing audible distortion. At  
this time, the designer must make sure that the power supply choice along with the output impedance does not  
violate the conditions explained in the POWER DISSIPATION section.  
Once the power dissipation equations have been addressed, the required differential gain can be determined  
from Equation 4.  
(4)  
Rf/Ri = AVD/2  
From Equation 4, the minimum AVD is 2.83; use AVD = 3.  
Since the desired input impedance was 20k, and with a AVD of 3, a ratio of 1.5:1 of Rf to Ri results in an  
allocation of Ri = 20kand Rf = 30k. The final design step is to address the bandwidth requirements which  
must be stated as a pair of 3dB frequency points. Five times away from a 3dB point is 0.17dB down from  
passband response which is better than the required ±0.25dB specified.  
fL = 100Hz/5 = 20Hz  
(5)  
(6)  
fH = 20kHz * 5 = 100kHz  
As stated in the EXTERNAL COMPONENTS DESCRIPTION section, Ri in conjunction with Ci create a highpass  
filter.  
Ci 1/(2π*20 k*20 Hz) = 0.397 µF; use 0.39 µF  
(7)  
The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,  
AVD. With a AVD = 3 and fH = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4892  
GBWP of 4 MHz. The following figure displays that if a designer has a need to design an amplifier with a higher  
differential gain, the LM4892 can still be used without running into bandwidth limitations.  
Figure 39. Higher Gain Audio Amplifier  
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The LM4892 is unity-gain stable and requires no external components besides gain-setting resistors, an input  
coupling capacitor, and proper supply bypassing in the typical application. However, if a closed-loop differential  
gain of greater than 10 is required, a feedback capacitor (Cf) may be needed as shown in Figure 3 to bandwidth  
limit the amplifier. This feedback capacitor creates a low pass filter that eliminates possible high frequency  
oscillations. Care should be taken when calculating the -3dB frequency in that an incorrect combination of Rf and  
Cf will cause rolloff before 20kHz. A typical combination of feedback resistor and capacitor that will not produce  
audio band high frequency rolloff is Rf = 20kand Cf = 25pF. These components result in a -3dB point of  
approximately 320 kHz.  
Figure 40. Reference Design Schematic For Demo Boards  
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LM4892 micro SMD BOARD ARTWORK  
Figure 41. Silk Screen  
Figure 42. Top Layer  
Figure 43. Bottom Layer  
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LM4892 SO DEMO BOARD ARTWORK  
LM4892 MSOP DEMO BOARD ARTWORK  
Figure 44. Silk Screen  
Figure 45. Top Layer  
Figure 46. Bottom Layer  
Figure 47. Silk Screen  
Figure 48. Top Layer  
Figure 49. Bottom Layer  
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LM4892 WSON DEMO BOARD ARTWORK  
Figure 50. Composite View  
Figure 51. Silk Screen  
Figure 52. Top Layer  
Figure 53. Bottom Layer  
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Table 2. Mono LM4892 Reference Design Boards Bill of Material for all Demo Boards  
Part Description  
Qty  
1
Ref Designator  
LM4892 Audio Amplifier  
Tantalum Capacitor, 1µF  
Ceramic Capacitor, 0.39µF  
Capacitor, 100µF  
U1  
2
Cs, Cb  
Ci  
1
1
Cout  
Resistor, 1k, 1/10W  
1
Rpd  
Resistor, 20k, 1/10W  
3
Ri, Rf, Rpu2  
Rpu1, Rs  
J1  
Resistor, 100k, 1/10W  
Jumper Header Vertical Mount 2X1, 0.100" spacing  
2
1
3.5mm Audio Jack (PC mount, w/o nut), PN# SJS-0357-B Shogyo  
International Corp. (www.shogyo.com)  
1
J2  
PCB LAYOUT GUIDELINES  
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power  
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual  
results will depend heavily on the final layout.  
GENERAL MIXED SIGNAL LAYOUT RECOMMENDATION  
POWER AND GROUND CIRCUITS  
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the  
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central  
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal  
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even  
device. This technique will require a greater amount of design time but will not increase the final price of the  
board. The only extra parts required will be some jumpers.  
SINGLE-POINT POWER / GROUND CONNECTIONS  
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can  
be helpful in minimizing High Frequency noise coupling between the analog and digital sections. It is further  
recommended to put digital and analog power traces over the corresponding digital and analog ground traces to  
minimize noise coupling.  
PLACEMENT OF DIGITAL AND ANALOG COMPONENTS  
All digital components and high-speed digital signal traces should be located as far away as possible from analog  
components and circuit traces.  
AVOIDING TYPICAL DESIGN / LAYOUT PROBLEMS  
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB  
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90  
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise  
coupling and cross talk.  
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REVISION HISTORY  
Changes from Revision D (April 2013) to Revision E  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 20  
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