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PSMN3R2-40YLD [NEXPERIA]

N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technologyProduction;
PSMN3R2-40YLD
型号： PSMN3R2-40YLD
厂家： Nexperia    Nexperia
描述：

N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus technologyProduction
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PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in  
LFPAK56 using NextPower-S3 Schottky-Plus technology  
26 August 2019  
Product data sheet  
1. General description  
120 A, logic level gate drive N-channel enhancement mode MOSFET in 175 °C LFPAK56 package  
using advanced TrenchMOS Superjunction technology. This product has been designed and  
qualified for high performance power switching applications.  
2. Features and benefits  
•
120 A continuous ID(max) rating  
•
•
•
•
•
•
•
Avalanche rated, 100% tested at IAS = 120 A  
Strong SOA (linear-mode) rating  
NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery'  
Low QRR, QG and QGD for high system efficiency and low EMI designs  
Schottky-Plus body-diode with low VSD, low QRR, soft recovery and low IDSS leakage  
Optimised for 4.5 V gate drive utilising NextPower-S3 Superjunction technology  
High reliability LFPAK (Power SO8) package, with copper-clip and solder die attach, qualified to  
175 °C  
•
•
Exposed leads can be wave soldered, visual solder joint inspection and high quality solder  
joints  
Low parasitic inductance and resistance  
3. Applications  
•
•
•
•
•
High-performance synchronous rectification  
DC-to-DC converters  
Brushless DC motor control  
Battery protection  
Load-switch and eFuse  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
VDS  
ID  
Parameter  
Conditions  
Min  
Typ  
Max  
40  
Unit  
V
drain-source voltage  
drain current  
25 °C ≤ Tj ≤ 175 °C  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
-
-
-
-
-
[1]  
-
120  
115  
175  
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 1  
junction temperature  
-
W
Tj  
-55  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
-
-
3.6  
2.9  
4.2  
3.3  
mΩ  
mΩ  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
 
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Dynamic characteristics  
QG(tot)  
QGD  
total gate charge  
gate-drain charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
12  
18  
26  
nC  
nC  
1.3  
4.3  
8.6  
[1] 120A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,  
thermal design and operating temperature.  
5. Pinning information  
Table 2. Pinning information  
Pin  
1
Symbol  
Description  
source  
source  
source  
gate  
Simplified outline  
Graphic symbol  
S
S
S
G
D
mb  
D
S
2
G
3
4
mbb076  
1
2 3 4  
mb  
mounting base; connected  
to drain  
LFPAK56; Power-  
SO8 (SOT669)  
6. Ordering information  
Table 3. Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN3R2-40YLD  
LFPAK56;  
plastic, single-ended surface-mounted package; 4 terminals  
SOT669  
Power-SO8  
7. Marking  
Table 4. Marking codes  
Type number  
Marking code  
PSMN3R2-40YLD  
3D2L40Y  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
Unit  
V
drain-source voltage  
25 °C ≤ Tj ≤ 175 °C  
-
-
40  
45  
VDSM  
peak drain-source  
voltage  
tp ≤ 20 ns; f ≤ 500 kHz; EDS(AL) ≤ 200 nJ;  
pulsed  
V
VDGR  
VGS  
Ptot  
ID  
drain-gate voltage  
gate-source voltage  
total power dissipation  
drain current  
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ  
-
40  
V
V
W
A
A
A
-20  
20  
Tmb = 25 °C; Fig. 1  
-
-
-
-
115  
120  
95  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
VGS = 10 V; Tmb = 100 °C; Fig. 2  
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3  
[1]  
IDM  
peak drain current  
537  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
2 / 13  
 
 
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
Symbol  
Parameter  
Conditions  
Min  
-55  
-55  
-
Max  
175  
175  
260  
Unit  
Tstg  
storage temperature  
junction temperature  
°C  
Tj  
°C  
Tsld(M)  
peak soldering  
temperature  
°C  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
115  
537  
A
A
ISM  
pulsed; tp ≤ 10 µs; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-  
ID = 39 A; Vsup ≤ 40 V; RGS = 50 Ω;  
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;  
tp = 146 µs  
[2]  
[2]  
[2]  
-
-
-
148  
243  
120  
mJ  
mJ  
A
ID = 25 A; Vsup ≤ 40 V; RGS = 50 Ω;  
VGS = 10 V; Tj(init) = 25 °C; unclamped;  
tp = 374 µs  
IAS  
non-repetitive avalanche Vsup = 40 V; VGS = 10 V; Tj(init) = 25 °C;  
current  
RGS = 50 Ω  
[1] 120A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,  
thermal design and operating temperature.  
[2] Protected by 100% test  
03aa16  
aaa-030140  
120  
150  
125  
100  
75  
I
D
(A)  
P
der  
(%)  
(1)  
80  
40  
50  
25  
0
0
0
50  
100  
150  
200  
0
25  
50  
75 100 125 150 175 200  
T
(°C)  
T
(°C)  
mb  
mb  
VGS ≥ 10 V  
(1) 120A continuous current has been successfully  
demonstrated during application tests. Practically  
the current will be limited by PCB, thermal design  
and operating temperature.  
Fig. 1. Normalized total power dissipation as a  
function of mounting base temperature  
Fig. 2. Continuous drain current as a function of  
mounting base temperature  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
3 / 13  
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
aaa-030141  
3
10  
I
D
Limit R  
= V / I  
DS  
(A)  
DSon  
D
2
10  
t
p
= 10 µs  
DC  
100 µs  
10  
1 ms  
1
10 ms  
100 ms  
-1  
10  
-1  
2
10  
1
10  
10  
V
DS  
(V)  
Tmb = 25 °C; IDM is a single pulse  
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
9. Thermal characteristics  
Table 6. Thermal characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-mb)  
thermal resistance from Fig. 4  
junction to mounting  
base  
-
1.18  
1.3  
K/W  
Rth(j-a)  
thermal resistance from Fig. 5  
-
-
42  
85  
-
-
K/W  
K/W  
junction to ambient  
Fig. 6  
aaa-026231  
10  
Z
th(j-mb)  
(K/W)  
1
δ = 0.5  
0.2  
0.1  
-1  
10  
10  
10  
0.05  
0.02  
t
p
single shot  
P
δ =  
T
-2  
-3  
t
t
p
T
-6  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
10  
1
t
p
(s)  
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
4 / 13  
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
aaa-027935  
aaa-027933  
70 µm thick copper on FR4 board  
Copper area 25.4 mm square; 70 µm thick on FR4  
board  
Fig. 6. PCB layout with minimum footprint for thermal  
resistance from junction to ambient  
Fig. 5. PCB layout for thermal resistance from junction  
to ambient  
10. Characteristics  
Table 7. Characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
40  
-
-
V
V
V
36  
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C  
voltage  
1.35  
1.8  
2.05  
ΔVGS(th)/ΔT  
gate-source threshold 25 °C ≤ Tj ≤ 150 °C  
voltage variation with  
-
-4.3  
-
mV/K  
temperature  
IDSS  
drain leakage current  
gate leakage current  
VDS = 32 V; VGS = 0 V; Tj = 25 °C  
VDS = 32 V; VGS = 0 V; Tj = 125 °C  
VGS = 16 V; VDS = 0 V; Tj = 25 °C  
VGS = -16 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
0.005  
1.2  
2
1
µA  
µA  
nA  
nA  
mΩ  
-
IGSS  
100  
100  
3.3  
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
2.9  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
Fig. 11  
-
-
6.4  
4.2  
8.1  
2
mΩ  
mΩ  
mΩ  
Ω
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
-
3.6  
-
VGS = 4.5 V; ID = 25 A; Tj = 175 °C;  
Fig. 11  
-
RG  
gate resistance  
f = 1 MHz; Tj = 25 °C  
0.3  
0.8  
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
12  
26  
-
18  
41  
23  
26  
57  
-
nC  
nC  
nC  
ID = 25 A; VDS = 20 V; VGS = 10 V;  
Fig. 12; Fig. 13  
ID = 0 A; VDS = 0 V; VGS = 10 V  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
5 / 13  
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
Symbol  
Parameter  
Conditions  
Min  
4.4  
2.6  
Typ  
7.4  
4.3  
Max  
11.1  
6.5  
Unit  
QGS  
gate-source charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
nC  
QGS(th)  
pre-threshold gate-  
source charge  
nC  
QGS(th-pl)  
post-threshold gate-  
source charge  
1.8  
3.1  
4.7  
nC  
QGD  
gate-drain charge  
1.3  
-
4.3  
2.9  
8.6  
-
nC  
V
VGS(pl)  
gate-source plateau  
voltage  
ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 20 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; Fig. 14  
1905 2931 4103 pF  
458  
32  
704  
108  
986  
238  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 20 V; RL = 0.8 Ω; VGS = 4.5 V;  
RG(ext) = 5 Ω  
-
-
-
-
-
18  
20  
18  
11  
22  
-
-
-
-
-
ns  
ns  
ns  
ns  
nC  
turn-off delay time  
fall time  
Qoss  
output charge  
VGS = 0 V; VDS = 20 V; f = 1 MHz;  
Tj = 25 °C  
Source-drain diode  
VSD  
trr  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15  
-
-
-
-
0.8  
25  
16  
14  
1
-
V
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;  
ns  
nC  
ns  
VDS = 20 V; Fig. 16  
Qr  
ta  
recovered charge  
[1]  
-
reverse recovery rise  
time  
-
tb  
reverse recovery fall  
time  
-
11  
-
ns  
[1] includes capacitive recovery  
aaa-030142  
aaa-030143  
200  
15  
I
R
D
DSon  
10 V  
4.5 V  
(A)  
(mΩ)  
12.5  
3.5 V  
150  
100  
50  
10  
7.5  
5
V
GS  
= 3 V  
2.5  
0
2.8 V  
2.6 V  
0
0
1
2
3
DS  
4
0
2
4
6
8
10  
12  
V
GS  
14  
(V)  
16  
V
(V)  
Tj = 25 °C  
Tj = 25 °C; ID = 25 A  
Fig. 7. Output characteristics; drain current as a  
function of drain-source voltage; typical values  
Fig. 8. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
6 / 13  
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
aaa-030144  
aaa-030145  
200  
150  
100  
50  
15  
I
D
R
(mΩ)  
DSon  
2.8 V 3 V  
3.5 V  
(A)  
12  
9
6
4.5 V  
3
175°C  
2
T = 25°C  
j
V
GS  
= 10 V  
0
0
0
1
3
4
5
0
25  
50  
75 100 125 150 175 200  
(A)  
V
(V)  
I
D
GS  
VDS = 8 V  
Tj = 25 °C  
Fig. 9. Transfer characteristics; drain current as a  
function of gate-source voltage; typical values  
Fig. 10. Drain-source on-state resistance as a function  
of drain current; typical values  
aaa-018451  
aaa-030146  
2
10  
a
V
GS  
(V)  
1.6  
8
6
4
2
0
1.2  
0.8  
0.4  
0
32 V  
20 V  
V
DS  
= 8 V  
-60 -30  
0
30  
60  
90 120 150 180  
T (°C)  
0
10  
20  
30  
40  
(nC)  
G
50  
Q
j
Tj = 25 °C; ID = 25 A  
Fig. 12. Gate-source voltage as a function of gate  
charge; typical values  
Fig. 11. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
7 / 13  
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
aaa-030147  
4
10  
V
C
DS  
(pF)  
I
D
C
iss  
V
V
GS(pl)  
3
10  
GS(th)  
C
oss  
V
GS  
Q
GS2  
Q
GS1  
Q
GS  
Q
GD  
G(tot)  
Q
003aaa508  
C
2
rss  
10  
Fig. 13. Gate charge waveform definitions  
-1  
2
10  
1
10  
10  
V
(V)  
DS  
VGS = 0 V; f = 1 MHz  
Fig. 14. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
003aal160  
aaa-030148  
3
2
10  
I
S
I
D
(A)  
(A)  
t
rr  
10  
t
t
b
a
0
10  
0.25 I  
RM  
175°C  
0.4  
T = 25°C  
j
I
RM  
1
t (s)  
0
0.2  
0.6  
0.8  
1
1.2  
V
SD  
(V)  
Fig. 16. Reverse recovery timing definition  
VGS = 0 V  
Fig. 15. Source-drain (diode forward) current as a  
function of source-drain (diode forward)  
voltage; typical values  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
8 / 13  
 
 
 
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
11. Package outline  
Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads  
SOT669  
A
2
E
A
C
c
E
b
2
1
2
b
3
L
1
mounting  
base  
b
4
D
1
D
H
L
2
1
2
3
4
X
e
w
A
c
b
1/2 e  
A
(A )  
3
C
A
1
q
L
detail X  
y
C
θ
8
0
0
5 mm  
°
°
scale  
Dimensions (mm are the original dimensions)  
(1)  
(1)  
(1)  
(1)  
(1)  
Unit  
A
A
A
A
b
b
b
b
4
c
c
2
D
D
1
E
E
e
H
L
L
L
2
w
y
1
2
3
2
3
1
1
max 1.20 0.15 1.10  
nom  
min 1.01 0.00 0.95  
0.50 4.41 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3  
6.2 0.85 1.3 1.3  
5.8 0.40 0.8 0.8  
0.1  
0.25  
1.27  
0.25  
mm  
0.35 3.62 2.0 0.7 0.19 0.24 3.80  
4.8 3.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
sot669_po  
Issue date  
11-03-25  
References  
Outline  
version  
European  
projection  
IEC  
JEDEC  
JEITA  
SOT669  
MO-235  
13-02-27  
Fig. 17. Package outline LFPAK56; Power-SO8 (SOT669)  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
9 / 13  
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
12. Soldering  
Footprint information for reflow soldering  
SOT669  
4.7  
4.2  
0.9  
0.6  
(3×)  
(4×)  
0.25  
(2×)  
0.25  
(2×)  
3.5  
3.45  
0.6  
2.55  
(3×)  
2
0.25  
(2×)  
SR opening =  
Cu + 0.075  
1.1  
2.15  
3.3  
SP opening =  
Cu - 0.050  
0.7  
(4×)  
1.27  
3.81  
solder paste  
solder lands  
125 µm stencil  
occupied area  
Dimensions in mm  
solder resist  
sot669_fr  
Fig. 18. Reflow soldering footprint for LFPAK56; Power-SO8 (SOT669)  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
10 / 13  
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
Wave soldering footprint information for LFPAK56 package  
SOT669  
4.826  
1.78  
1.72  
2.1  
1.4  
0.6 (x4)  
1.27  
0.635  
solder lands  
Dimensions in mm  
15-04-13  
Issue date  
15-04-16  
sot669_fw  
Fig. 19. Wave soldering footprint for LFPAK56; Power-SO8 (SOT669)  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
11 / 13  
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
13. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
Data sheet status  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
12 / 13  
 
Nexperia  
PSMN3R2-40YLD  
N-channel 40 V, 3.3 mΩ, 120 A logic level MOSFET in LFPAK56 using NextPower-S3 Schottky-Plus  
technology  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Quick reference data....................................................1  
5. Pinning information......................................................2  
6. Ordering information....................................................2  
7. Marking..........................................................................2  
8. Limiting values............................................................. 2  
9. Thermal characteristics............................................... 4  
10. Characteristics............................................................5  
11. Package outline.......................................................... 9  
12. Soldering................................................................... 10  
13. Legal information......................................................12  
© Nexperia B.V. 2019. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 26 August 2019  
©
PSMN3R2-40YLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
26 August 2019  
13 / 13  

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