PSMN057-200B [NEXPERIA]

N-channel TrenchMOS SiliconMAX standard level FETProduction;
PSMN057-200B
型号: PSMN057-200B
厂家: Nexperia    Nexperia
描述:

N-channel TrenchMOS SiliconMAX standard level FETProduction

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PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
27 March 2023  
Product data sheet  
1. General description  
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in a  
plastic package using TrenchMOS technology. This product is designed and qualified for use in  
computing, communications, consumer and industrial applications only.  
2. Features and benefits  
Higher operating power due to low thermal resistance  
Low conduction losses due to low on-state resistance  
Suitable for high frequency applications due to fast switching characteristics  
3. Applications  
DC-to-DC converters  
Switched-mode power supplies  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Typ  
Max  
200  
27.5  
250  
Unit  
V
drain-source voltage  
drain current  
25 °C ≤ Tj ≤ 175 °C  
Tmb = 100 °C  
-
-
-
-
-
-
ID  
A
Ptot  
total power dissipation Tmb = 25 °C  
W
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
VGS = 10 V; ID = 17 A; Tj = 175 °C  
-
-
-
165  
50  
mΩ  
nC  
QGD  
gate-drain charge  
ID = 39 A; VDS = 160 V; VGS = 10 V;  
Tj = 25 °C  
37  
5. Pinning information  
Table 2. Pinning information  
Pin  
1
Symbol  
Description  
gate  
Simplified outline  
Graphic symbol  
mb  
G
D
S
D
2
drain  
D
S
3
source  
G
mb  
mounting base; connected  
to drain  
2
mbb076  
1
3
D2PAK (SOT404)  
 
 
 
 
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
6. Ordering information  
Table 3. Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN057-200B  
D2PAK  
plastic, single-ended surface-mounted package (D2PAK); SOT404  
3 terminals (one lead cropped); 2.54 mm pitch; 11 mm x 10  
mm x 4.3 mm body  
7. Marking  
Table 4. Marking codes  
Type number  
Marking code  
PSMN057  
200B  
PSMN057-200B  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
200  
200  
20  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
total power dissipation  
drain current  
25 °C ≤ Tj ≤ 175 °C  
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ  
-
VDGR  
VGS  
-
V
-20  
V
Ptot  
Tmb = 25 °C  
-
250  
27.5  
39  
W
A
ID  
Tmb = 100 °C  
Tmb = 25 °C  
-
-
A
IDM  
Tstg  
Tj  
peak drain current  
storage temperature  
junction temperature  
pulsed; Tmb = 25 °C  
-
156  
175  
175  
A
-55  
-55  
°C  
°C  
Source-drain diode  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
39  
A
A
ISM  
pulsed; Tmb = 25 °C  
156  
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-  
ID = 23 A; Vsup ≤ 50 V; RGS = 50 Ω;  
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;  
tp = 240 µs  
-
-
925  
23  
mJ  
A
IAS  
non-repetitive avalanche Vsup ≤ 50 V; VGS = 10 V; Tj(init) = 25 °C;  
current  
RGS = 50 Ω; unclamped  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
2 / 10  
 
 
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
003aae646  
003aae647  
100  
100  
P
I
der  
D
(%)  
80  
(%)  
80  
60  
40  
20  
0
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
(°C)  
T
(°C)  
mb  
mb  
Fig. 1. Normalized total power dissipation as a  
function of mounting base temperature  
Fig. 2. Normalized continuous drain current as a  
function of mounting base temperature  
003aae648  
003aae628  
3
2
10  
10  
I
DM  
(A)  
l
AS  
(A)  
R
DS(on)  
= V / I  
DS D  
2
10  
tp = 10 µs  
100 µs  
1 ms  
25°C  
10  
10  
1
D.C.  
T prior to avalanche = 150 °C  
j
10 ms  
100 ms  
1
2
3
-3  
10  
-2  
10  
-1  
10  
1
10  
10  
10  
1
10  
V
(V)  
t
(ms)  
DS  
AV  
Tmb = 25 °C; IDM is single pulse  
unclamped inductive load  
Fig. 3. Safe operating area; continuous and peak drain  
currents as a function of drain-source voltage  
Fig. 4. Single-shot avalanche rating; avalanche current  
as a function of avalanche period  
9. Thermal characteristics  
Table 6. Thermal characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-mb)  
thermal resistance from  
junction to mounting  
base  
-
-
0.6  
K/W  
Rth(j-a)  
thermal resistance from minimum footprint; FR4 board  
junction to ambient  
-
50  
-
K/W  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
3 / 10  
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
003aae649  
1
Z
th(j-mb)  
δ = 0.5  
0.2  
(K/W)  
- 1  
10  
10  
10  
0.1  
0.05  
t
p
P
δ =  
0.02  
T
- 2  
- 3  
single pulse  
t
t
p
T
- 6  
- 5  
- 4  
- 3  
- 2  
- 1  
10  
10  
10  
10  
10  
10  
1
t
(s)  
p
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration  
10. Characteristics  
Table 7. Characteristics  
Symbol  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C  
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C  
200  
-
-
V
178  
-
-
V
VGS(th)  
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 175 °C  
1
2
-
-
-
V
voltage  
ID = 1 mA; VDS=VGS; Tj = 25 °C  
3
4
V
ID = 1 mA; VDS=VGS; Tj = -55 °C  
-
4.4  
500  
10  
100  
100  
165  
57  
4.1  
V
IDSS  
IGSS  
RDSon  
RG  
drain leakage current  
gate leakage current  
VDS = 200 V; VGS = 0 V; Tj = 175 °C  
VDS = 200 V; VGS = 0 V; Tj = 25 °C  
VGS = 10 V; VDS = 0 V; Tj = 25 °C  
VGS = -10 V; VDS = 0 V; Tj = 25 °C  
VGS = 10 V; ID = 17 A; Tj = 175 °C  
VGS = 10 V; ID = 17 A; Tj = 25 °C  
f = 1 MHz  
-
-
µA  
µA  
nA  
nA  
mΩ  
mΩ  
Ω
-
0.03  
2
-
-
2
drain-source on-state  
resistance  
-
-
-
41  
2
gate resistance  
-
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
ID = 39 A; VDS = 160 V; VGS = 10 V;  
Tj = 25 °C  
-
-
-
-
-
-
96  
13  
37  
135  
-
nC  
nC  
nC  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
50  
VDS = 25 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C  
3750 5036 pF  
Coss  
Crss  
385  
180  
520  
252  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 100 V; RL = 2.7 Ω; VGS = 10 V;  
RG(ext) = 5.6 Ω; Tj = 25 °C  
-
-
-
-
-
18  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
58  
turn-off delay time  
fall time  
105  
78  
LD  
internal drain  
inductance  
measured from tab to centre of die;  
Tj = 25 °C  
3.5  
LS  
internal source  
inductance  
measured from source lead to source  
bond pad; Tj = 25 °C  
-
7.5  
-
nH  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
4 / 10  
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Source-drain diode  
VSD  
trr  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C  
-
-
-
0.85  
133  
895  
1.2  
173  
-
V
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
ns  
nC  
VDS = 30 V; Tj = 25 °C  
Qr  
recovered charge  
003aae650  
003aae651  
50  
40  
30  
20  
10  
0
0.14  
l
D
V
(V) = 10  
GS  
4.2 4.4 4.6  
R
(A)  
DS(on)  
(Ω)  
8
6
0.1  
0.06  
0.02  
5.2  
5
4.8  
4.8  
4.6  
5
5.2  
6
4.4  
4.2  
V
(V) = 10  
GS  
0
0.4  
0.8  
1.2  
1.6  
V
2
0
10  
20  
30  
40  
50  
(V)  
I (A)  
D
DS  
Tj = 25 °C  
Tj = 25 °C  
Fig. 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig. 7. Drain-source on-state resistance as a function  
of drain current; typical values  
003aae652  
003aae653  
40  
50  
g
(S)  
fs  
I
D
(A)  
40  
30  
20  
10  
0
T = 25 °C  
j
30  
20  
10  
0
T = 175 °C  
j
T = 175 °C  
j
T = 25 °C  
j
0
2
4
6
0
10  
20  
30  
40  
V
(V)  
I (A)  
D
GS  
VDS > ID x RDSon  
VDS > ID x RDSon  
Fig. 8. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig. 9. Forward transconductance as a function of  
drain current; typical values  
003aae654  
003aae655  
2.9  
5
V
GS(th)  
(V)  
a
maximum  
4
2.1  
typical  
3
2
1
0
minimum  
1.3  
0.5  
- 60  
20  
100  
180  
- 60  
20  
100  
180  
T (°C)  
j
T (°C)  
j
ID = 1 mA; VDS = VGS  
Fig. 11. Gate-source threshold voltage as a function of  
junction temperature  
Fig. 10. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
5 / 10  
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
003aae656  
003aae657  
- 1  
4
10  
10  
l
D
(A)  
10  
C
iss  
- 2  
- 3  
- 4  
- 5  
- 6  
C
(pF)  
10  
10  
10  
10  
3
10  
minimum  
typical  
maximum  
C
oss  
C
rss  
2
10  
- 1  
2
0
1
2
3
4
5
10  
1
10  
10  
V
(V)  
V
(V)  
DS  
GS  
Tj = 25 °C; VDS = VGS  
VGS = 0 V; f = 1 MHz  
Fig. 12. Sub-threshold drain current as a function of  
gate-source voltage  
Fig. 13. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
003aae658  
003aae659  
16  
40  
V
I
F
GS  
(V)  
(A)  
12  
8
30  
20  
10  
0
V
= 40 V  
V
= 160 V  
DD  
DD  
T = 25 °C  
T = 175 °C  
j
j
4
0
0
40  
80  
120  
160  
0
0.4  
0.8  
1.2  
Q
(nC)  
V
(V)  
SDS  
G
VGS = 0 V  
Tj = 25 °C; ID = 39 A  
Fig. 15. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values  
Fig. 14. Gate-source voltage as a function of gate  
charge; typical values  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
6 / 10  
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
11. Package outline  
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
b
2
e
e
Q
0
5 mm  
scale  
Dimensions (mm are the original dimensions)  
Unit  
A
A
b
b
c
D
D
1
E
e
H
D
L
p
Q
1
2
max 4.5 1.40 0.85 1.45 0.64 11  
nom  
min 4.1 1.27 0.60 1.05 0.46  
1.6 10.3  
1.2 9.7  
15.8 2.9 2.6  
14.8 2.1 2.2  
2.54  
mm  
sot404_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
06-03-16  
13-02-25  
SOT404  
Fig. 16. Package outline D2PAK (SOT404)  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
7 / 10  
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
12. Soldering  
Footprint information for reflow soldering of D2PAK package  
SOT404  
10.85  
10.60  
10.50  
0.30  
1.50  
2.25 2.15  
8.275  
8.15  
8.35  
1.50  
4.60  
16.35  
0.30  
0.20  
1.70  
7.40  
7.50  
4.85  
5.40  
7.95  
8.075  
3.10 3.00  
0.20  
1.55  
2.54  
1.30  
1.20  
occupied area  
solder resist (0.05 mm gap from solder land on all directions)  
solder paste  
solder lands  
Dimensions in mm  
19-09-10  
Issue date  
sot404_fr  
19-09-11  
Fig. 17. Reflow soldering footprint for D2PAK (SOT404)  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
8 / 10  
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
13. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
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or problem which is based on any weakness or default in the customer’s  
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Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
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©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
9 / 10  
 
Nexperia  
PSMN057-200B  
N-channel TrenchMOS SiliconMAX standard level FET  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Quick reference data....................................................1  
5. Pinning information......................................................1  
6. Ordering information....................................................2  
7. Marking..........................................................................2  
8. Limiting values............................................................. 2  
9. Thermal characteristics............................................... 3  
10. Characteristics............................................................4  
11. Package outline.......................................................... 7  
12. Soldering..................................................................... 8  
13. Legal information........................................................9  
© Nexperia B.V. 2023. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 27 March 2023  
©
PSMN057-200B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
27 March 2023  
10 / 10  

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