74AHC377PW-Q100 [NEXPERIA]
Octal D-type flip-flop with data enable; positive-edge trigger;型号: | 74AHC377PW-Q100 |
厂家: | Nexperia |
描述: | Octal D-type flip-flop with data enable; positive-edge trigger 光电二极管 逻辑集成电路 触发器 |
文件: | 总17页 (文件大小:744K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AHC377-Q100;
74AHCT377-Q100
Octal D-type flip-flop with data enable; positive-edge trigger
Rev. 1 — 3 December 2013
Product data sheet
1. General description
The 74AHC377-Q100; 74AHCT377-Q100 is a high-speed Si-gate CMOS device and is
pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7-A. The 74AHC377-Q100; 74AHCT377-Q100 has eight
edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock
input (CP) loads all flip-flops simultaneously when the data enable input (E) is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH clock transition, is
transferred to the corresponding output (Qn) of the flip-flop. The E input is only required to
be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than VCC
Ideal for addressable register applications
Data enable for address and data synchronization
Eight positive-edge triggered D-type flip-flops
Input levels:
For 74AHC377-Q100: CMOS level
For 74AHCT377-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC377-Q100
74AHC377D-Q100
40 C to +125 C
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
SOT360-1
74AHC377PW-Q100
TSSOP20
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
74AHCT377-Q100
74AHCT377D-Q100
40 C to +125 C
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
SOT360-1
74AHCT377PW-Q100
TSSOP20
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
4. Functional diagram
ꢅ
ꢆ
ꢉ
ꢂ
'ꢃ
'ꢀ
'ꢄ
'ꢅ
4ꢃ
4ꢀ
4ꢄ
4ꢅ
ꢄ
ꢇ
ꢈ
ꢊ
))ꢀꢁ
WRꢁ
))ꢂ
2873876
ꢀꢅ 'ꢆ
ꢀꢆ 'ꢇ
ꢀꢉ 'ꢈ
ꢀꢂ 'ꢉ
4ꢆ ꢀꢄ
4ꢇ
ꢀꢇ
4ꢈ ꢀꢈ
ꢀꢊ
4ꢉ
ꢀ
(
ꢀꢀ &3
PQDꢀꢁꢀ
Fig 1. Functional diagram
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
2 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
ꢀꢀ
ꢀ&ꢄ
ꢀ
*ꢀ
ꢀꢀ
&3
ꢅ
ꢄ
ꢄ'
ꢅ
ꢆ
ꢄ
ꢇ
'ꢃ
'ꢀ
'ꢄ
'ꢅ
'ꢆ
'ꢇ
'ꢈ
'ꢉ
4ꢃ
4ꢀ
4ꢄ
4ꢅ
4ꢆ
4ꢇ
4ꢈ
4ꢉ
ꢆ
ꢉ
ꢂ
ꢇ
ꢈ
ꢊ
ꢉ
ꢈ
ꢂ
ꢊ
ꢀꢅ
ꢀꢆ
ꢀꢉ
ꢀꢂ
ꢀꢄ
ꢀꢇ
ꢀꢈ
ꢀꢊ
ꢀꢅ
ꢀꢆ
ꢀꢉ
ꢀꢂ
ꢀꢄ
ꢀꢇ
ꢀꢈ
ꢀꢊ
(
ꢀ
PQDꢂꢃꢄ
PQDꢂꢃꢂ
Fig 2. Logic symbol
Fig 3. IEC logic symbol
'ꢃ
'ꢀ
'ꢄ
'ꢅ
'ꢆ
'ꢇ
'ꢈ
'ꢉ
(
'
4
'
4
'
4
'
4
'
4
'
4
'
4
'
4
&3
))ꢀ
&3
))ꢄ
&3
&3
&3
&3
&3
&3
))ꢅ
))ꢆ
))ꢇ
))ꢈ
))ꢉ
))ꢂ
&3
4ꢃ
4ꢀ
4ꢄ
4ꢅ
4ꢆ
4ꢇ
4ꢈ
4ꢉ
PQDꢀꢃꢁ
Fig 4. Logic diagram
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
3 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
5. Pinning information
5.1 Pinning
ꢀꢁ$+&ꢂꢀꢀꢃ4ꢄꢅꢅ
ꢀꢁ$+&7ꢂꢀꢀꢃ4ꢄꢅꢅ
(
4ꢃ
'ꢃ
'ꢀ
4ꢀ
4ꢄ
'ꢄ
'ꢅ
4ꢅ
ꢀ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢂ
ꢊ
ꢄꢃ 9
&&
ꢀꢊ 4ꢉ
ꢀꢂ 'ꢉ
ꢀꢉ 'ꢈ
ꢀꢈ 4ꢈ
ꢀꢇ 4ꢇ
ꢀꢆ 'ꢇ
ꢀꢅ 'ꢆ
ꢀꢄ 4ꢆ
ꢀꢀ &3
*1' ꢀꢃ
DDDꢅꢁꢁꢂꢂꢁꢆ
Fig 5. Pin configuration SO20 and TSSOP20
5.2 Pin description
Table 2.
Symbol
E
Pin description
Pin
1
Description
data enable input (active LOW)
flip-flop output
data input
Q0
2
D0
3
D1
4
data input
Q1
5
flip-flop output
flip-flop output
data input
Q2
6
D2
7
D3
8
data input
Q3
9
flip-flop output
ground (0 V)
GND
CP
10
11
12
13
14
15
16
17
18
19
20
clock input (LOW-to-HIGH, edge triggered)
flip-flop output
data input
Q4
D4
D5
data input
Q5
flip-flop output
flip-flop output
data input
Q6
D6
D7
data input
Q7
flip-flop output
supply voltage
VCC
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
4 of 17
Product data sheet
Rev. 1 — 3 December 2013
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
6. Functional description
Table 3.
Function table[1]
Operating mode
Control
Input
Output
E
l
CP
Dn
h
Qn
Load 1
H
Load 0
l
l
L
Hold (do nothing)
h
H
X
X
no change
no change
X
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
= LOW-to-HIGH CP transition;
X = don’t care.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
0.5
0.5
20
20
25
-
Max
+7.0
+7.0
-
Unit
V
VCC
VI
supply voltage
input voltage
V
[1]
[1]
IIK
input clamping current
output clamping current
output current
VI < 0.5 V
mA
mA
mA
mA
mA
C
IOK
IO
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
+20
+25
+75
-
ICC
IGND
Tstg
Ptot
supply current
ground current
75
65
-
storage temperature
total power dissipation
+150
500
[2]
Tamb = 40 C to +125 C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For TSSOP20 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
5 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
8. Recommended operating conditions
Table 5.
Operating conditions
Symbol Parameter
74AHC377-Q100
Conditions
Min
Typ
Max
Unit
VCC
VI
supply voltage
2.0
5.0
5.5
V
input voltage
0
-
5.5
V
VO
output voltage
0
-
VCC
+125
100
20
V
Tamb
t/V
ambient temperature
input transition rise and fall rate
40
+25
C
ns/V
ns/V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
-
-
-
-
74AHCT377-Q100
VCC
VI
supply voltage
4.5
0
5.0
5.5
V
input voltage
-
5.5
V
VO
output voltage
0
-
VCC
+125
20
V
Tamb
t/V
ambient temperature
input transition rise and fall rate
40
-
+25
-
C
ns/V
VCC = 4.5 V to 5.5 V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
Min Typ
40 C to +85 C 40 C to +125 C Unit
Max
Min
Max
Min
Max
74AHC377-Q100
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 3.0 V
2.1
2.1
2.1
VCC = 5.5 V
3.85
-
3.85
-
3.85
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
VCC = 3.0 V
VCC = 5.5 V
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = 50 A; VCC = 2.0 V
IO = 50 A; VCC = 3.0 V
IO = 50 A; VCC = 4.5 V
1.9
2.9
4.4
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
4.4
4.4
IO = 4.0 mA; VCC = 3.0 V 2.58
IO = 8.0 mA; VCC = 4.5 V 3.94
VI = VIH or VIL
2.48
3.80
2.40
3.70
-
VOL
LOW-level
output voltage
IO = 50 A; VCC = 2.0 V
IO = 50 A; VCC = 3.0 V
IO = 50 A; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
0.1
0.1
-
-
-
-
-
0.1
0.1
V
V
V
V
V
0.1
0.1
0.1
0.36
0.36
0.44
0.44
0.55
0.55
-
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
6 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
Max
Min
Max
Min
Max
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
-
-
-
0.1
-
1.0
-
2.0
A
A
pF
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
4.0
10
-
-
40
10
-
-
80
10
input
VI = VCC or GND
3
capacitance
74AHCT377-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 50 A
4.4
4.5
-
-
-
4.4
-
-
4.4
-
-
V
V
IO = 8.0 mA
3.94
3.80
3.70
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 50 A
-
-
-
0
-
0.1
0.36
0.1
-
-
-
0.1
0.44
1.0
-
-
-
0.1
0.55
2.0
V
IO = 8.0 mA
V
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
A
ICC
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
-
4.0
-
-
40
-
-
80
A
additional
per input pin;
1.35
1.5
1.5
mA
supply current VI = VCC 2.1 V; other pins
at VCC or GND; IO = 0 A;
VCC = 4.5 V to 5.5 V
CI
input
VI = VCC or GND
-
3
10
-
10
-
10
pF
capacitance
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
7 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions
74AHC377-Q100
25 C
Min Typ[1] Max
40 C to +85 C 40 C to +125 C Unit
Min
Max
Min
Max
[2]
tpd
propagation CP to Qn; see Figure 6
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
-
5.6 12.8
8.0 16.0
1.0
1.0
15.0
18.0
1.0
1.0
16.0
20.0
ns
ns
CL = 50 pF
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
3.9
9.0
1.0
1.0
10.5
12.0
1.0
1.0
11.5
13.5
ns
ns
CL = 50 pF
5.6 10.5
fmax
maximum
frequency
see Figure 6
VCC = 3.0 V to 3.6 V
CL = 15 pF
80
50
125
75
-
-
70
45
-
-
70
45
-
-
MHz
MHz
CL = 50 pF
VCC = 4.5 V to 5.5 V
CL = 15 pF
125
85
175
120
-
-
110
75
-
-
110
75
-
-
MHz
MHz
CL = 50 pF
tW
pulse width CP HIGH or LOW;
see Figure 6
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
5.0
5.0
-
-
-
-
5.0
5.0
-
-
5.0
5.0
-
-
ns
ns
tsu
set-up time Dn, E to CP; see Figure 7
VCC = 3.0 V to 3.6 V
5.0
4.5
-
-
-
-
5.0
4.5
-
-
5.0
4.5
-
-
ns
ns
VCC = 4.5 V to 5.5 V
th
hold time
Dn, E to CP; see Figure 7
VCC = 3.0 V to 3.6 V
1.5
2.0
-
-
-
-
-
-
1.5
2.0
-
-
-
-
1.5
2.0
-
-
-
-
ns
ns
pF
VCC = 4.5 V to 5.5 V
[3]
CPD
power
fi = 1 MHz; VI = GND to VCC
20
dissipation
capacitance
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
8 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max
Min
Max
Min
Max
74AHCT377-Q100; VCC = 4.5 V to 5.5 V
[2]
tpd
propagation CP to Qn; see Figure 6
delay
CL = 15 pF
-
-
4.0
9.0
1.0
1.0
10.5
12.0
1.0
1.0
11.5
13.5
ns
ns
CL = 50 pF
5.7 10.5
fmax
maximum
frequency
see Figure 6
CL = 15 pF
CL = 50 pF
90
85
140
130
-
-
-
-
80
75
-
-
-
80
75
-
-
-
MHz
MHz
ns
tW
pulse width CP HIGH or LOW;
see Figure 6
5.0
5.0
5.0
tsu
th
set-up time Dn, E to CP; see Figure 7
4.5
2.0
-
-
-
-
-
-
4.5
2.0
-
-
-
-
4.5
2.0
-
-
-
-
ns
ns
pF
hold time
Dn, E to CP; see Figure 7
fi = 1 MHz; VI = GND to VCC
[3]
CPD
power
23
dissipation
capacitance
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL
.
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
9 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
11. Waveforms
ꢀꢋI
PD[
9
,
&3ꢁLQSXWꢁ
ꢁ
9
W
0
*1'
W
:
W
3+/
3/+
9
2+
9
4Q RXWSXW
ꢁ
0
ꢁꢁꢃDDFꢇꢈꢀ
9
2/
Measurement points are given in Table 8.
OL and VOH are typical voltage output levels that occur with the output load.
V
Fig 6. Clock pulse width, maximum frequency and input to output propagation delays
9
&&
(ꢁLQSXW
9
0
*1'
W
W
K
K
W
W
VX
VX
9
&&
'QꢁLQSXW
&3ꢁLQSXW
9
0
*1'
W
VX
W
W
K
:
9
&&
9
0
*1'
PQDꢀꢁꢂ
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 7. Data set-up and hold times
Table 8.
Type
Measurement points
Input
VM
Output
VM
74AHC377-Q100
74AHCT377-Q100
0.5 VCC
1.5 V
0.5 VCC
0.5 VCC
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
10 of 17
Product data sheet
Rev. 1 — 3 December 2013
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
W
:
9
,
ꢊꢃꢁꢌ
QHJDWLYHꢁ
SXOVH
9
9
9
9
0
0
0
ꢀꢃꢁꢌ
ꢊꢃꢁꢌ
*1'
W
W
U
I
W
W
I
U
9
,
SRVLWLYHꢁ
SXOVH
0
ꢀꢃꢁꢌ
*
*1'
W
:
9
&&
9
,
9
2
'87
5
7
&
/
ꢁꢁꢃDDKꢆꢀꢄꢉ
ꢉ
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Fig 8. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
VI
Load
Test
tr, tf
CL
74AHC377-Q100
74AHCT377-Q100
VCC
3.0 V
3.0 ns
3.0 ns
15 pF, 50 pF
15 pF, 50 pF
tPLH, tPHL
tPLH, tPHL
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
11 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
12. Package outline
62ꢈꢅꢋꢆSODVWLFꢆVPDOOꢆRXWOLQHꢆSDFNDJHꢌꢆꢈꢅꢆOHDGVꢌꢆERG\ꢆZLGWKꢆꢀꢇꢍꢆPPꢆ
627ꢄꢎꢂꢃꢄꢆ
'ꢁ
(ꢁ
$ꢁ
;ꢁ
Fꢁ
\ꢁ
+ꢁ
(ꢁ
Yꢁ 0ꢁ
$ꢁ
=ꢁ
ꢄꢃꢁ
ꢀꢀꢁ
4ꢁ
$ꢁ
ꢄꢁ
$ꢁ
ꢎ$ꢁꢁꢏꢁ
ꢅꢁ
$ꢁ
ꢀꢁ
SLQꢁꢀꢁLQGH[ꢁ
șꢁ
/ꢁ
Sꢁ
/ꢁ
ꢀꢁ
ꢀꢃꢁ
Zꢁ 0ꢁ
GHWDLOꢁ;ꢁ
Hꢁ
Eꢁ
Sꢁ
ꢃꢁ
ꢇꢁ
ꢀꢃꢁPPꢁ
VFDOHꢁ
',0(16,216ꢆꢉLQFKꢆGLPHQVLRQVꢆDUHꢆGHULYHGꢆIURPꢆWKHꢆRULJLQDOꢆPPꢆGLPHQVLRQVꢊꢆ
$ꢆ
ꢉꢄꢊꢆ
ꢉꢄꢊꢆ
ꢉꢄꢊꢆ
81,7ꢆ
$ꢆ
$ꢆ
$ꢆ
Eꢆ
Sꢆ
Fꢆ
'ꢆ
(ꢆ
Hꢆ
+ꢆ
/ꢆ
/ꢆ
4ꢆ
Yꢆ
Zꢆ
\ꢆ
ꢃꢍꢀꢁ
șꢁ
ꢄꢆ
ꢈꢆ
ꢂꢆ
(ꢆ
Sꢆ
=ꢆ
PD[ꢇꢆ
ꢃꢍꢅꢁ
ꢃꢍꢀꢁ
ꢄꢍꢆꢇꢁ
ꢄꢍꢄꢇꢁ
ꢃꢍꢆꢊꢁ ꢃꢍꢅꢄꢁ ꢀꢅꢍꢃꢁ
ꢃꢍꢅꢈꢁ ꢃꢍꢄꢅꢁ ꢀꢄꢍꢈꢁ
ꢉꢍꢈꢁ
ꢉꢍꢆꢁ
ꢀꢃꢍꢈꢇꢁ
ꢀꢃꢍꢃꢃꢁ
ꢀꢍꢀꢁ
ꢃꢍꢆꢁ
ꢀꢍꢀꢁ
ꢀꢍꢃꢁ
ꢃꢍꢊꢁ
ꢃꢍꢆꢁ
PPꢁ
ꢄꢍꢈꢇꢁ
ꢃꢍꢄꢇꢁ
ꢃꢍꢃꢀꢁ
ꢀꢍꢄꢉꢁ
ꢃꢍꢃꢇꢁ
ꢀꢍꢆꢁ
ꢃꢍꢄꢇꢁ ꢃꢍꢄꢇꢁ
Rꢁ
ꢂꢁ
Rꢁ
ꢃꢁ
ꢃꢍꢃꢀꢄꢁ ꢃꢍꢃꢊꢈꢁ
ꢃꢍꢃꢃꢆꢁ ꢃꢍꢃꢂꢊꢁ
ꢃꢍꢃꢀꢊꢁ ꢃꢍꢃꢀꢅꢁ ꢃꢍꢇꢀꢁ ꢃꢍꢅꢃꢁ
ꢃꢍꢃꢀꢆꢁ ꢃꢍꢃꢃꢊꢁ ꢃꢍꢆꢊꢁ ꢃꢍꢄꢊꢁ
ꢃꢍꢆꢀꢊꢁ
ꢃꢍꢅꢊꢆꢁ
ꢃꢍꢃꢆꢅꢁ ꢃꢍꢃꢆꢅꢁ
ꢃꢍꢃꢀꢈꢁ ꢃꢍꢃꢅꢊꢁ
ꢃꢍꢃꢅꢇꢁ
ꢃꢍꢃꢀꢈꢁ
LQFKHVꢁ ꢃꢍꢀꢁ
ꢃꢍꢃꢇꢇꢁ
ꢃꢍꢃꢀꢁ ꢃꢍꢃꢀꢁ ꢃꢍꢃꢃꢆꢁ
1RWHꢆ
ꢀꢍꢁ3ODVWLFꢁRUꢁPHWDOꢁSURWUXVLRQVꢁRIꢁꢃꢍꢀꢇꢁPPꢁꢎꢃꢍꢃꢃꢈꢁLQFKꢏꢁPD[LPXPꢁSHUꢁVLGHꢁDUHꢁQRWꢁLQFOXGHGꢍꢁꢁꢁ
ꢆ5()(5(1&(6ꢆ
ꢆ-('(&ꢆ ꢆ-(,7$ꢆ
ꢁ06ꢐꢃꢀꢅꢁ
287/,1(ꢆ
9(56,21ꢆ
(8523($1ꢆ
352-(&7,21ꢆ
,668(ꢆ'$7(ꢆ
ꢆ,(&ꢆ
ꢊꢊꢐꢀꢄꢐꢄꢉꢁ
ꢃꢅꢐꢃꢄꢐꢀꢊꢁ
ꢁ627ꢀꢈꢅꢐꢀꢁ
ꢁꢃꢉꢇ(ꢃꢆꢁ
Fig 9. Package outline SOT163-1 (SO20)
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
12 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
76623ꢈꢅꢋꢆSODVWLFꢆWKLQꢆVKULQNꢆVPDOOꢆRXWOLQHꢆSDFNDJHꢌꢆꢈꢅꢆOHDGVꢌꢆERG\ꢆZLGWKꢆꢁꢇꢁꢆPPꢆ
627ꢂꢎꢅꢃꢄꢆ
'ꢁ
(ꢁ
$ꢁ
;ꢁ
Fꢁ
+ꢁ
(ꢁ
Yꢁ 0ꢁ
$ꢁ
\ꢁ
=ꢁ
ꢄꢃꢁ
ꢀꢀꢁ
4ꢁ
$ꢁ
ꢄꢁ
ꢎ$ꢁꢁꢏꢁ
ꢅꢁ
$ꢁ
$ꢁ
ꢀꢁ
SLQꢁꢀꢁLQGH[ꢁ
șꢁ
/ꢁ
Sꢁ
/ꢁ
ꢀꢁ
ꢀꢃꢁ
GHWDLOꢁ;ꢁ
Zꢁ 0ꢁ
Eꢁ
Sꢁ
Hꢁ
ꢃꢁ
ꢄꢍꢇꢁ
ꢇꢁPPꢁ
VFDOHꢁ
',0(16,216ꢆꢉPPꢆDUHꢆWKHꢆRULJLQDOꢆGLPHQVLRQVꢊꢆ
$ꢆ
ꢉꢄꢊꢆ
ꢉꢈꢊꢆ
ꢉꢄꢊꢆ
81,7ꢆ
PPꢁ
$ꢆ
ꢄꢆ
$ꢆ
ꢈꢆ
$ꢆ
ꢂꢆ
Eꢆ
Sꢆ
Fꢆ
'ꢆ
(ꢆ
Hꢆ
+ꢆ
/ꢆ
/ꢆ
Sꢆ
4ꢆ
Yꢆ
Zꢆ
\ꢆ
ꢃꢍꢀꢁ
=ꢆ
șꢁ
(ꢆ
PD[ꢇꢆ
Rꢁ
ꢃꢍꢀꢇꢁ ꢃꢍꢊꢇꢁ
ꢃꢍꢃꢇꢁ ꢃꢍꢂꢃꢁ
ꢃꢍꢅꢃꢁ
ꢃꢍꢀꢊꢁ
ꢃꢍꢄꢁ
ꢃꢍꢀꢁ
ꢈꢍꢈꢁ
ꢈꢍꢆꢁ
ꢆꢍꢇꢁ
ꢆꢍꢅꢁ
ꢈꢍꢈꢁ
ꢈꢍꢄꢁ
ꢃꢍꢉꢇꢁ
ꢃꢍꢇꢃꢁ
ꢃꢍꢆꢁ
ꢃꢍꢅꢁ
ꢃꢍꢇꢁ
ꢃꢍꢄꢁ
ꢂꢁ
ꢀꢍꢀꢁ
ꢃꢍꢈꢇꢁ
ꢀꢁ
ꢃꢍꢄꢁ ꢃꢍꢀꢅꢁ
ꢃꢍꢄꢇꢁ
Rꢁ
ꢃꢁ
1RWHVꢆ
ꢀꢍꢁ3ODVWLFꢁRUꢁPHWDOꢁSURWUXVLRQVꢁRIꢁꢃꢍꢀꢇꢁPPꢁPD[LPXPꢁSHUꢁVLGHꢁDUHꢁQRWꢁLQFOXGHGꢍꢁ
ꢄꢍꢁ3ODVWLFꢁLQWHUOHDGꢁSURWUXVLRQVꢁRIꢁꢃꢍꢄꢇꢁPPꢁPD[LPXPꢁSHUꢁVLGHꢁDUHꢁQRWꢁLQFOXGHGꢍꢁ
ꢆ5()(5(1&(6ꢆ
ꢆ-('(&ꢆ ꢆ-(,7$ꢆ
ꢁ02ꢐꢀꢇꢅꢁ
287/,1(ꢆ
9(56,21ꢆ
(8523($1ꢆ
352-(&7,21ꢆ
,668(ꢆ'$7(ꢆ
ꢆ,(&ꢆ
ꢊꢊꢐꢀꢄꢐꢄꢉꢁ
ꢃꢅꢐꢃꢄꢐꢀꢊꢁ
ꢁ627ꢅꢈꢃꢐꢀꢁ
Fig 10. Package outline SOT360-1 (TSSOP20)
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
13 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
LSTTL
MIL
Low-power Schottky Transistor-Transistor Logic
Military
MM
Machine Model
14. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AHC_AHCT377_Q100 v.1 20131203
Product data sheet
-
-
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
14 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
Suitability for use in automotive applications — This Nexperia
product has been qualified for use in automotive
15.2 Definitions
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
15.3 Disclaimers
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
Product data sheet
Rev. 1 — 3 December 2013
15 of 17
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
74AHC_AHCT377_Q100
All information provided in this document is subject to legal disclaimers.
.
16 of 17
Product data sheet
Rev. 1 — 3 December 2013
©
Nexperia B.V. 2017. All rights reserved
74AHC377-Q100; 74AHCT377-Q100
Nexperia
Octal D-type flip-flop with data enable; positive-edge trigger
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of releas0e3: December 2013
相关型号:
74AHC377PW-Q100J
74AHC(T)377-Q100 - Octal D-type flip-flop with data enable; positive-edge trigger TSSOP2 20-Pin
NXP
74AHC377PW-T
IC AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, TSSOP-20, FF/Latch
NXP
74AHC3G04-Q100
The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices. They provide three inverting buffers
NEXPERIA
74AHC3G04DC-Q100
AHC/VHC/H/U/V SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8
NXP
74AHC3G04DC-Q100
The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices. They provide three inverting buffers
NEXPERIA
©2020 ICPDF网 联系我们和版权申明