2SK3480-Z [NEC]

SWITCHING N-CHANNEL POWER MOSFET; 切换N沟道功率MOSFET
2SK3480-Z
型号: 2SK3480-Z
厂家: NEC    NEC
描述:

SWITCHING N-CHANNEL POWER MOSFET
切换N沟道功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲
文件: 总8页 (文件大小:79K)
中文:  中文翻译
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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
2SK3480  
SWITCHING  
N-CHANNEL POWER MOS FET  
DESCRIPTION  
ORDERING INFORMATION  
PART NUMBER  
2SK3480  
The 2SK3480 is N-channel MOS Field Effect Transistor  
designed for high current switching applications.  
PACKAGE  
TO-220AB  
TO-262  
2SK3480-S  
FEATURES  
2SK3480-ZJ  
TO-263  
Super low on-state resistance:  
RDS(on)1 = 31 mMAX. (VGS = 10 V, ID = 25 A)  
RDS(on)2 = 36 mMAX. (VGS = 4.5 V, ID = 25 A)  
Low Ciss: Ciss = 3600 pF TYP.  
Built-in gate protection diode  
2SK3480-Z  
TO-220SMDNote  
Note TO-220SMD package is produced only  
in Japan.  
(TO-220AB)  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
Drain to Source Voltage (VGS = 0 V)  
Gate to Source Voltage (VDS = 0 V)  
Drain Current (DC) (TC = 25°C)  
Drain Current (pulse) Note1  
VDSS  
VGSS  
ID(DC)  
ID(pulse)  
PT1  
100  
±20  
V
V
A
A
±50  
±100  
84  
Total Power Dissipation (TC = 25°C)  
Total Power Dissipation (TA = 25°C)  
Channel Temperature  
W
W
(TO-262)  
PT2  
1.5  
Tch  
150  
°C  
°C  
A
Storage Temperature  
Tstg  
–55 to +150  
34  
Single Avalanche Current Note2  
Single Avalanche Energy Note2  
IAS  
EAS  
116  
mJ  
Notes 1. PW 10 µs, Duty cycle 1%  
(TO-263, TO-220SMD)  
2. Starting Tch = 25°C, RG = 25 Ω, VGS = 20 0 V  
THERMAL RESISTANCE  
Channel to Case  
Rth(ch-C)  
Rth(ch-A)  
1.48  
83.3  
°C/W  
°C/W  
Channel to Ambient  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
2001  
Document No.  
Date Published December 2001 NS CP(K)  
Printed in Japan  
D15078EJ1V0DS00 (1st edition)  
©
2SK3480  
ELECTRICAL CHARACTERISTICS (TA = 25°C)  
CHARACTERISTICS  
Zero Gate Voltage Drain Current  
Gate Leakage Current  
SYMBOL  
IDSS  
TEST CONDITIONS  
VDS = 100 V, VGS = 0 V  
MIN. TYP. MAX. UNIT  
10  
±10  
2.5  
µA  
µA  
V
IGSS  
VGS = ±20 V, VDS = 0 V  
VDS = 10 V, ID = 1 mA  
VDS = 10 V, ID = 25 A  
VGS = 10 V, ID = 25 A  
VGS = 4.5 V, ID = 25 A  
VDS = 10 V  
Gate Cut-off Voltage  
VGS(off)  
| yfs |  
RDS(on)1  
RDS(on)2  
Ciss  
1.5  
17  
2.0  
34  
Forward Transfer Admittance  
Drain to Source On-state Resistance  
S
25  
31  
36  
mΩ  
mΩ  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
nC  
nC  
nC  
V
27  
Input Capacitance  
3600  
360  
190  
15  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-on Delay Time  
Rise Time  
Coss  
Crss  
VGS = 0 V  
f = 1 MHz  
td(on)  
tr  
td(off)  
tf  
VDD = 50 V, ID = 25 A  
VGS = 10 V  
11  
Turn-off Delay Time  
Fall Time  
RG = 0 Ω  
68  
6.0  
74  
Total Gate Charge  
QG  
VDD = 80 V  
Gate to Source Charge  
Gate to Drain Charge  
Body Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
QGS  
QGD  
VF(S-D)  
trr  
VGS = 10 V  
10  
ID = 50 A  
20  
IF = 50 A, VGS = 0 V  
IF = 50 A, VGS = 0 V  
di/dt = 100 A/µs  
1.0  
70  
ns  
nC  
Qrr  
180  
TEST CIRCUIT 1 AVALANCHE CAPABILITY  
TEST CIRCUIT 2 SWITCHING TIME  
D.U.T.  
L
D.U.T.  
V
GS  
R
L
RG  
= 25  
90%  
V
GS  
Wave Form  
V
GS  
10%  
0
R
G
PG.  
GS = 20 0 V  
PG.  
50 Ω  
V
DD  
V
DD  
V
VDS  
90%  
90%  
V
DS  
V
0
GS  
BVDSS  
10% 10%  
V
DS  
Wave Form  
0
I
AS  
V
DS  
τ
I
D
t
d(on)  
t
r
t
d(off)  
tf  
V
DD  
t
on  
toff  
τ = 1 µs  
Duty Cycle 1%  
Starting Tch  
TEST CIRCUIT 3 GATE CHARGE  
D.U.T.  
= 2 mA  
I
G
RL  
PG.  
50 Ω  
V
DD  
2
Data Sheet D15078EJ1V0DS  
2SK3480  
TYPICAL CHARACTERISTICS (TA = 25°C)  
DERATING FACTOR OF FORWARD BIAS  
SAFE OPERATING AREA  
TOTAL POWER DISSIPATION vs.  
CASE TEMPERATURE  
140  
120  
100  
80  
120  
100  
80  
60  
60  
40  
40  
20  
20  
0
20  
40 60  
80 100 120 140 160  
0
20 40  
60  
80 100 120 140 160  
T
C
- Case Temperature - ˚C  
T
C
- Case Temperature - ˚C  
FORWARD BIAS SAFE OPERATING AREA  
1000  
100  
10  
I
D(pulse)  
I
D(DC)  
1
T
C
= 25˚C  
Single Pulse  
0.1  
0.1  
1
10  
100  
1000  
V
DS - Drain to Source Voltage - V  
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH  
1000  
100  
Rth(ch-A) = 83.3˚C/W  
10  
1
Rth(ch-C) = 1.48˚C/W  
0.1  
0.01  
T
C
= 25˚C  
Single Pulse  
µ
10  
1 m  
10 m  
100 m  
1
10  
100 1000  
100  
µ
PW - Pulse Width - s  
3
Data Sheet D15078EJ1V0DS  
2SK3480  
DRAIN CURRENT vs.  
DRAIN TO SOURCE VOLTAGE  
FORWARD TRANSFER CHARACTERISTICS  
Pulsed  
1000  
100  
100  
80  
V
GS =10 V  
4.5 V  
60  
40  
T
A
= 40˚C  
25˚C  
10  
1
75˚C  
150˚C  
20  
0
V
DS = 10 V  
Pulsed  
0.1  
1
2
3
4
5
0
1
2
3
4
5
V
GS - Gate to Source Voltage - V  
VDS - Drain to Source Voltage - V  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
GATE TO SOURCE VOLTAGE  
FORWARD TRANSFER ADMITTANCE vs.  
DRAIN CURRENT  
50  
100  
10  
V
DS = 10 V  
Pulsed  
Pulsed  
40  
30  
20  
10  
0
T
A
= 150˚C  
75˚C  
I
D
= 50 A  
25 A  
25˚C  
40˚C  
1
0.1  
0.01  
5
10  
15  
20  
0.01  
0.1  
1
10  
100  
VGS - Gate to Source Voltage - V  
ID - Drain Current - A  
DRAIN TO SOURCE ON-STATE  
RESISTANCE vs. DRAIN CURRENT  
GATE CUT-OFF VOLTAGE vs.  
CHANNEL TEMPERATURE  
4.0  
3.0  
2.0  
1.0  
0
100  
80  
60  
40  
20  
0
V
DS = 10 V  
Pulsed  
I
D = 1 mA  
V
GS = 4.5 V  
10 V  
0.1  
1
10  
100  
50  
0
50  
100  
150  
I
D
- Drain Current - A  
Tch - Channel Temperature - ˚C  
4
Data Sheet D15078EJ1V0DS  
2SK3480  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
CHANNEL TEMPERATURE  
SOURCE TO DRAIN DIODE  
FORWARD VOLTAGE  
70  
60  
1000  
100  
10  
Pulsed  
Pulsed  
50  
40  
30  
20  
V
GS = 10 V  
V
GS = 4.5 V  
0 V  
10 V  
1
10  
0
I
D
= 25 A  
150  
0.1  
0
1.5  
1.0  
- Source to Drain Voltage - V  
100  
ch - Channel Temperature - ˚C  
0.5  
0
50  
50  
V
SD  
T
CAPACITANCE vs.  
DRAIN TO SOURCE VOLTAGE  
SWITCHING CHARACTERISTICS  
1000  
10000  
1000  
C
iss  
t
d(off)  
100  
10  
1
C
oss  
t
d(on)  
C
rss  
100  
10  
t
r
t
f
V
DD = 50 V  
GS = 10 V  
V
GS = 0 V  
V
f = 1 MHz  
R
G
= 0 Ω  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
I
D
- Drain Current - A  
V
DS - Drain to Source Voltage - V  
REVERSE RECOVERY TIME vs.  
DRAIN CURRENT  
DYNAMIC INPUT/OUTPUT CHARACTERISTICS  
100  
10  
1000  
100  
di/dt = 100 A/ns  
GS = 0 V  
V
80  
60  
40  
20  
0
8
V
DD = 80 V  
50 V  
V
GS  
20 V  
6
4
10  
1
2
V
DS  
I
60  
- Gate Charge - nC  
D
= 83 A  
0
0
20  
40  
80  
0.1  
1
10  
100  
Q
G
I
F
- Drain Current - A  
5
Data Sheet D15078EJ1V0DS  
2SK3480  
SINGLE AVALANCHE ENERGY  
DERATING FACTOR  
SINGLE AVALANCHE CURRENT vs.  
INDUCTIVE LOAD  
160  
140  
120  
100  
80  
1000  
100  
V
R
V
I
DD = 50 V  
= 25  
GS = 20 0 V  
AS 34 A  
G
I
AS = 34A  
60  
10  
1
40  
V
= 50V  
VDD = 200 V  
RGS  
= 25 Ω  
Starting Tch = 25˚C  
20  
G
0
25  
50  
75  
100  
125  
150  
0.01 0.1  
1
10  
Starting Tch - Starting Channel Temperature - ˚C  
L - Inductive Load - mH  
6
Data Sheet D15078EJ1V0DS  
2SK3480  
PACKAGE DRAWINGS (Unit: mm)  
1) TO-220AB(MP-25)  
2) TO-262(MP-25 Fin Cut)  
4.8 MAX.  
1.3±0.2  
10.6 MAX.  
10.0 TYP.  
4.8 MAX.  
1.3±0.2  
φ
10 TYP.  
3.6±0.2  
4
1
2
3
4
1
2 3  
1.3±0.2  
1.3±0.2  
2.8±0.2  
0.5±0.2  
0.75±0.3  
2.54 TYP.  
2.54 TYP.  
0.75±0.1  
2.54 TYP.  
0.5±0.2  
1.Gate  
2.Drain  
3.Source  
4.Fin (Drain)  
2.8±0.2  
1.Gate  
2.Drain  
3.Source  
2.54 TYP.  
4.Fin (Drain)  
3) TO-263 (MP-25ZJ)  
4) TO-220SMD(MP-25Z)Note  
4.8 MAX.  
4.8 MAX.  
10 TYP.  
10 TYP.  
4
1.3±0.2  
1.3±0.2  
4
1
2
3
1
2
3
1.4±0.2  
1.4±0.2  
0.7±0.2  
0.75±0.3  
2.54 TYP.  
0.5±0.2  
0.5±0.2  
2.54 TYP.  
2.54 TYP.  
2.54 TYP.  
1.Gate  
1.Gate  
2.Drain  
3.Source  
2.Drain  
3.Source  
4.Fin (Drain)  
4.Fin (Drain)  
Note This package is produced only in Japan.  
EQUIVALENT CIRCUIT  
Remark The diode connected between the gate and source of the transistor  
serves as a protector against ESD. When this device actually used,  
an additional protection circuit is externally required if a voltage  
exceeding the rated voltage may be applied to this device.  
Drain  
Body  
Diode  
Gate  
Gate  
Protection  
Diode  
Source  
7
Data Sheet D15078EJ1V0DS  
2SK3480  
The information in this document is current as of December, 2001. The information is subject to  
change without notice. For actual design-in, refer to the latest p ublications of NEC's data sheets or  
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all  
products and/or types are available in every country. Please check with an NEC sales representative  
for availability and additional information.  
No part of this document may be copied or reproduced in any form or by any means without prior  
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.  
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of  
third parties by or arising from the use of NEC semiconductor products listed in this document or any other  
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any  
patents, copyrights or other intellectual property rights of NEC or others.  
Descriptions of circuits, software and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these  
circuits, software and information in the design of customer's equipment shall be done under the full  
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third  
parties arising from the use of these circuits, software and information.  
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize  
risks of damage to property or injury (including death) to persons arising from defects in NEC  
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redundancy, fire-containment, and anti-failure features.  
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M8E 00. 4  

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