MX23L3216 [Macronix]
32M-BIT MASK ROM; 32M位掩膜ROM型号: | MX23L3216 |
厂家: | MACRONIX INTERNATIONAL |
描述: | 32M-BIT MASK ROM |
文件: | 总5页 (文件大小:39K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY
MX23L3216
32M-BIT MASK ROM
FEATURES
PIN DESCRIPTION
• Bit organization
Symbol
Pin Function
A0~A21
Address Inputs, A0 not used in word
- 4Mb x 8 (byte mode)
- 2Mb x 16 (word mode)
• Fast access time
- Random access:80/25ns(max.)
• Page Size
mode
D0~D15
Data Outputs
CE0#, CE1# Chip Enable Input
CE2#
OE#
Output Enable Input
Word/Byte mode Selection
Power Supply Pin
Output VCC Pin
- 8 words per page
• Current
BYTE#
VCC
VCCQ
GND
NC
- Operating:40mA
- Standby:15uA(max.)
• Supply voltage
Ground Pin
No Connection
- VCC : 2.7 ~ 3.6V
- VCCQ : 2.7 ~ 3.6V
• Package
CHIP ENABLETRUTHTABLE
CE2#
CE1#
CE0#
Device
Enabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Disabled
- 64 ball mini BGA (10.0mm X 13.0mm, ball pitch
1.0mm)
L
L
L
L
L
H
L
- 56 pin TSOP (14mm x 20mm)
• Temperature
L
H
H
L
L
H
L
--25~85°C
H
H
H
H
L
H
L
H
H
H
Note: for single-chip applications, CE2#, CE1# can be
strapped to GND.
PIN CONFIGURATION
56TSOP (NormalType)
1
2
3
4
5
6
7
8
NC
CE1#
A21
A20
A19
A18
A17
A16
VCC
A15
A14
A13
A12
CE0#
NC
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
NC
OE#
NC
D15
D7
D14
D6
GND
D13
D5
D12
D4
VCCQ
GND
D11
D3
D10
D2
VCC
D9
D1
D8
D0
A0
BYTE#
NC
CE2#
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
MX23L3216
NC
A11
A10
A9
A8
GND
A7
A6
A5
A4
A3
A2
A1
P/N:PM0860
REV. 1.0, OCT. 03, 2001
1
MX23L3216
64 Mini BGA (Top View, Balls Facing Down)
A1
A1
A2
A6
A3
A8
A4
A5
A6
A7
A8
NC
A13
VCC
A18
NC
B1
A2
C1
A3
D1
A4
E1
D8
B2
GND
C2
A7
B3
A9
B4
B5
A14
C5
B6
NC
C6
NC
D6
NC
E6
B7
B8
CE0#
C4
A19
C7
CE1#
C8
C3
A10
D3
A11
E3
A12
D4
A15
D5
A20
D7
A21
D8
D2
A5
NC
E4
NC
E5
A16
E7
A17
13.0 mm
E2
E8
D1
D9
D3
D4
NC
D15
NC
F1
BYTE#
G1
F2
D0
G2
A0
H2
NC
F3
F4
D11
G4
F5
D12
G5
F6
F7
F8
D10
G3
NC
G6
NC
G7
D14
H7
OE#
G8
NC
H8
NC
D2
VCCQ
H4
D5
D6
H1
H3
H5
H6
CE2#
VCC
GND
D13
GND
D7
NC
10.0 mm
MODE SELECTION
CE#
OE#
Byte#
D0~D7
High Z
High Z
D0~D7
D0~D7
D8~D15
High Z
Power
Stand-by
Active
Disabled
X
H
L
X
X
L
Enabled
High Z
Enabled
High Z
Active
Enabled
L
H
D8~D15
Active
ORDER INFORMATION
Part No.
Speed
Package
Grade
MX23L3216TI-80
MX23L3216TI-10
MX23L3216TI-12
MX23L3216XI-80
MX23L3216XI-10
MX23L3216XI-12
80ns
100ns
120ns
80ns
56 pin TSOP
56 pin TSOP
56 pin TSOP
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
64 ball mini BGA
64 ball mini BGA
64 ball mini BGA
100ns
120ns
Note: Industrial grade temperature: -25 ~ 85° C
Commercial grade temperature: 0 ~ 70° C
P/N:PM0860
REV. 1.0, OCT. 03, 2001
2
MX23L3216
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
VIN
Ratings
Voltage on any Pin Relative to VSS
Ambient OperatingTemperature
Storage Temperature
-0.3V to 3.9V
-25°C to 85°C
-65°C to 125°C
Topr
Tstg
DC CHARACTERISTICS (Ta = -25°C ~ 85° C, VCC = 2.7V~3.6V)
Item
Symbol
VOH
VOL
VIH
MIN.
2.4V
-
MAX.
-
Conditions
IOH = -400uA
IOL = 1.6mA
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
0.4V
2.2V
-0.5V
-
VCCQ+0.5V
0.8V
VIL
ILI
10uA
0V, VCC
ILO
-10
-
10uA
0V, VCC
ICC
40mA
f=5MHz, CE#=VIL, OE#=VIH
all output open
Standby Current (CMOS)
Input Capacitance
ISTB
CIN
-
-
-
15uA
10pF
10pF
CE#>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
Output Capacitance
COUT
AC CHARACTERISTICS (Ta = -25° C ~ 85° C, VCC = 2.7V~3.6V)
Item
Symbol
23L3216-80
23L3216-10
23L3216-12
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
-
Read Cycle Time
tRC
tAA
tACE
tPA
80ns
-
100ns
-
120ns
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
-
80ns
80ns
25ns
25ns
-
-
100ns
100ns
25ns
25ns
-
-
120ns
120ns
25ns
25ns
-
-
-
-
-
-
-
tOE
tOH
tHZ
-
-
-
Output Hold After Address
Output High Z Delay
0ns
-
0ns
-
0ns
-
20ns
20ns
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE# or CE# going high, and this parameter guar-
anteed by design over the full voltage and temperature
operating range - not tested.
P/N:PM0860
REV. 1.0, OCT. 03, 2001
3
MX23L3216
AC Test Conditions
Input Pulse Levels
0.4V~2.4V
Input Rise and Fall Times 5ns
IOH (load)=-400uA
Input Timing Level
Output Timing Level
Output Load
1.5V
DOUT
1.5V
See Figure
100pF output load
capacitance
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
tACE
ADD
ADD
tRC
CE#
OE#
tOE
tHZ
tOH
tAA
VALID
VALID
VALID
DATA
PAGE READ
A4-A21
VALID ADD
2'nd ADD
tPA
3'rd ADD
A0,A1,A2,A3
DATA
1'st ADD
tAA
VALID
VALID
VALID
Note: CE#, OE# are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0860
REV. 1.0, OCT. 03, 2001
4
MX23L3216
MACRONIX INTERNATIONALCO., LTD .
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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