MX23L3222 [Macronix]
32M-BIT MASK ROM (16/32 BIT OUTPUT); 32M - BIT MASK ROM （ 16/32位输出）
| 型号： | MX23L3222 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 32M-BIT MASK ROM (16/32 BIT OUTPUT) |
| 文件： | 总6页 (文件大小：40K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX23L3222
32M-BIT MASK ROM (16/32 BIT OUTPUT)
FEATURES
• Bit organization
• Current
- 2M x 16 (word mode)
- 1M x 32 (double word mode)
• Fast access time
- Operating:60mA
- Standby:50uA
• Supply voltage
- 3.3V±10%
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page
• Package
- 70 pin SSOP (500mil)
- 8 double words per page
PIN DESCRIPTION
PIN CONFIGURATION
Symbol
A0~A19
D0~D30
D31/A-1
Pin Function
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
NC
NC
NC
WORD
OE
A0
A1
A2
A3
A4
A5
VCC
D0
D16
D1
D17
VSS
VCC
D2
D18
D3
D19
D4
D20
D5
D21
VSS
VCC
D6
D22
D7
D23
VSS
A6
2
3
4
5
6
7
8
9
Address Inputs
Data Outputs
D15 (Word Mode)/ LSB Address
(Byte Mode)
CE
VSS
D31/A-1
D15
D30
D14
VSS
VCC
D29
D13
D28
D12
D27
D11
D26
D10
VSS
VCC
D25
D9
CE
Chip Enable Input
Output Enable Input
Double Word/ Word Mode Selection
Power Supply Pin
Ground Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
OE
WORD
VCC
VSS
NC
No Connection
D24
D8
ORDER INFORMATION
VCC
A19
A18
A17
A16
A15
A14
A13
Part No.
Access Page Access Package
A7
A8
A9
A10
A11
A12
Time
Time
30ns
45ns
MX23L3222MC-10 100ns
MX23L3222MC-12 120ns
70 pin SSOP
70 pin SSOP
P/N:PM0396
REV. 2.0, OCT. 19, 2001
1
MX23L3222
MODE SELECTION
CE
H
L
OE
X
WORD
D31/A-1
X
D0~D15
High Z
D16~D31
High Z
Mode
Power
Stand-by
Active
X
X
H
L
-
H
L
X
High Z
High Z
-
L
Output
Input
D0~D15
D0~D15
D16~D31
High Z
Double Word
Word
Active
L
L
Active
BLOCK DIAGRAM
A0/(A-1)
A2
A3
D0
Address
Buffer
Memory
Array
Page
Page
Decoder
Word/
Byte
Output
Buffer
Buffer
D31/(D15)
A19
CE
BYTE
OE
P/N:PM0396
REV. 2.0, OCT. 19, 2001
2
MX23L3222
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
VIN
Ratings
Voltage on any Pin Relative to VSS
Ambient OperatingTemperature
StorageTemperature
-1.3V to VCC+2.0V (Note)
0°C to 70°C
Topr
Tstg
-65°C to 125°C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to
-1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage
transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item
Symbol
VOH
VOL
MIN.
MAX.
-
Conditions
IOH = -0.4mA
IOL = 1.6mA
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
2.4V
-
0.4V
VCC+0.3V
0.8V
5uA
VIH
2.2V
VIL
-0.3V
ILI
-
-
-
-
-
-
-
0V, VCC
ILO
5uA
0V, VCC
ICC1
ISTB1
ISTB2
CIN
60mA
1mA
50uA
10pF
10pF
tRC = 100ns, all output open
CE = VIH
CE>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
COUT
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)
Item
Symbol
23L3222-10
23L3222-12
MIN.
MAX.
-
MIN.
MAX.
-
Read Cycle Time
tRC
tAA
tACE
tPA
100ns
120ns
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
-
100ns
30ns
30ns
30ns
-
-
120ns
45ns
45ns
45ns
-
-
-
-
-
tOE
tOH
tHZ
-
-
Output Hold After Address
Output High Z Delay
0ns
-
0ns
-
20ns
20ns
Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed
by design over the full voltage and temperature operating range - not tested.
P/N:PM0396
REV. 2.0, OCT. 19, 2001
3
MX23L3222
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.4V
10ns
IOH (load)=-04.mA
1.5V
DOUT
0.8V and 2.0V
See Figure
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
tACE
ADD
ADD
tRC
CE
OE
tOE
tHZ
tOH
tAA
VALID
VALID
VALID
DATA
PAGE READ
A3-A19
VALID ADD
2'nd ADD
tPA
3'rd ADD
(A-1),A0,A1,A2
1'st ADD
tAA
VALID
VALID
VALID
DATA
Note: CE, OE are enable.
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.
P/N:PM0396
REV. 2.0, OCT. 19, 2001
4
MX23L3222
REVISION HISTORY
Revision
Description
Page
Date
1.8
AC Characteristics:The page mode access time (tPA) and output
enable time (tOE) are changed as 45ns instead of 50ns.
Added 100ns speed grade.
MAR/25/1998
Package: Added 100 pin TQFP package, dimension is
14mm x 14mm x 1mm.
1.9
2.0
AC CHARACTERISTICS tOH 10ns-->0ns
Delete package:100-pin TQFP
P3
P1,2
JAN/29/1999
OCT/19/2001
P/N:PM0396
REV. 2.0, OCT. 19, 2001
5
MX23L3222
MACRONIX INTERNATIONAL CO., LTD.
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MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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