MX23L3210YC-12 [Macronix]
32M-BIT (4M x 8 / 2M x 16) Mask ROM; 32M位（ 4M ×8 / 2M ×16 ）掩膜ROM
| 型号： | MX23L3210YC-12 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 32M-BIT (4M x 8 / 2M x 16) Mask ROM |
| 文件： | 总9页 (文件大小：766K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX23L3210
32M-BIT (4M x 8 / 2M x 16) Mask ROM
FEATURES
ORDER INFORMATION
• Bit organization
Part No.
AccessTime Package
- 4M x 8 (byte mode)
- 2M x 16 (word mode)
• Fast access time
- Random access:100ns (max.) for 3.0V~3.6V
150ns (max.) for 2.7V~3.6V
• Current
- Operating:40mA
- Standby:15uA
• Supply voltage
- 2.7V~3.6V
MX23L3210MC-10
MX23L3210MC-12
MX23L3210MC-15
MX23L3210TC-10
MX23L3210TC-12
MX23L3210TC-15
MX23L3210RC-10
100ns
120ns
150ns
100ns
120ns
150ns
100ns
44 pin SOP
44 pin SOP
44 pin SOP
48 pin TSOP
48 pin TSOP
48 pin TSOP
48 pin TSOP
(Reverse type)
48 pin TSOP
(Reverse type)
48 pin TSOP
(Reverse type)
44 pin TSOP
44 pin TSOP
• Package
MX23L3210RC-12
MX23L3210RC-15
120ns
150ns
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
- 44 pin TSOP (Type II)
MX23L3210YC-10
MX23L3210YC-12
100ns
120ns
PIN CONFIGURATION
44 SOP/ 44TSOP
PIN DESCRIPTION
Symbol
A0~A20
D0~D14
D15/A-1
Pin Function
Address Inputs
Data Outputs
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
NC
A18
A17
A7
2
3
4
A9
5
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
D15 (Word Mode)/ LSB Address
(Byte Mode)
A6
6
A5
7
A4
8
A3
CE
Chip Enable Input
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
9
A2
10
11
12
13
14
15
16
17
18
19
20
21
22
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
OE
Byte
VCC
VSS
NC
No Connection
D10
D3
D11
MODE SELECTION
CE
H
L
OE
X
Byte
D15/A-1
X
D0~D7
D8~D15
High Z
Mode
Power
Stand-by
Active
X
X
H
L
High Z
High Z
D0~D7
D0~D7
-
H
L
X
High Z
-
L
Output
Input
D8~D15
High Z
Word
Byte
Active
L
L
Active
P/N:PM0370
REV. 2.8, JUL. 17, 2001
1
MX23L3210
48TSOP (NormalType)
1
2
3
4
5
6
7
8
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
MX23L3210
(Normal Type)
D1
D8
D0
OE
VSS
VSS
A2
A1
A0
CE
48TSOP (ReverseType)
48
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
VSS
VSS
D15/A-1
D7
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
MX23L3210
(Reverse Tpye)
D8
D0
OE
VSS
VSS
A2
A1
A0
CE
P/N:PM0370
REV. 2.8, JUL. 17, 2001
2
MX23L3210
BLOCK DIAGRAM
D0
A0/(A-1)
Address
Buffer
Memory
Array
Sense
Word/
Byte
Output
Amplifier
Buffer
D15/(D7)
A20
CE
BYTE
OE
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
Ambient OperatingTemperature
StorageTemperature
VIN
-0.3V to 3.9V
0°C to 70°C
Topr
Tstg
-65°C to 125°C
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item
Symbol
VOH
VOL
MIN.
MAX.
Conditions
IOH = -0.4mA
IOL = 1.6mA
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
2.3V
-
-
0.4V
VIH
2.1V
VCC+0.3V
0.2xVCC
5uA
VIL
-0.3V
ILI
-
-
-
-
-
-
-
0V, VCC
ILO
5uA
0V, VCC
ICC1
ISTB1
ISTB2
CIN
40mA
1mA
tRC = 120ns, all output open
CE = VIH
15uA
10pF
10pF
CE>VCC-0.2V
Ta = 25°C, f = 1MHZ
Ta = 25°C, f = 1MHZ
COUT
P/N:PM0370
REV. 2.8, JUL. 17, 2001
3
MX23L3210
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item
Symbol
23L3210-10*
23L3210-12*
23L3210-15
MIN.
MAX.
-
MIN.
MAX.
-
MIN.
MAX.
Read Cycle Time
tRC
tAA
100ns
120ns
150ns
-
Address Access Time
Chip Enable Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
-
100ns
100ns
50ns
-
-
120ns
120ns
60ns
-
-
150ns
150ns
70ns
-
tACE
tOE
tOH
tHZ
-
-
-
-
-
-
0ns
-
0ns
-
0ns
-
20ns
20ns
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE going high, and this parameter guaranteed by
design over the full voltage and temperature operating
range - not tested.
* 100/120ns for 3.0V~3.6V
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~2.4V
10ns
IOH (load)=-0.4mA
1.4V
DOUT
1.4
See Figure
IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
TIMING DIAGRAM
RANDOM READ
ADD
ADD
ADD
ADD
tRC
tACE
CE#
OE#
tOE
tHZ
tOH
tAA
VALID
VALID
VALID
DATA
P/N:PM0370
REV. 2.8, JUL. 17, 2001
4
MX23L3210
PACKAGE INFORMATION
44-PIN PLASTIC SOP
P/N:PM0370
REV. 2.8, JUL. 17, 2001
5
MX23L3210
48-PIN PLASTICTSOP
P/N:PM0370
REV. 2.8, JUL. 17, 2001
6
MX23L3210
44-PINTSOP (Type II)
P/N:PM0370
REV. 2.8, JUL. 17, 2001
7
MX23L3210
REVISION HISTORY
REVISION
2.5
2.6
DESCRIPTION
PAGE
P4
P1
P1,3
P4
P1,4
P5,6
P1,7
DATE
JAN/29/1999
Dec/24/1999
AC CHARACTERISTICS tOH 10ns-->0ns
Add 120ns (max.) for 3.0V~3.6V ; 150ns(max.) for 2.7V~3.6V
DC characteristics Standby current (ISTB2):5uA-->15uA
AC characteristics 120ns for 3.0V~3.6V
1.Added access time:100ns
2.7
2.8
JUN/28/2001
JUL/17/2001
2.Modify Package Information
1.Added 44-pin TSOP(II)
P/N:PM0370
REV. 2.8, JUL. 17, 2001
8
MX23L3210
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
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TEL:+65-348-8385
FAX:+65-348-8096
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MACRONIX AMERICA, INC.
TEL:+1-408-453-8088
FAX:+1-408-453-8488
CHICAGO OFFICE:
TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
9
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