MX23L3211MC-10G [Macronix]
32M-BIT MASK ROM (8/16-BIT OUTPUT); 32M - BIT MASK ROM （8/ 16位输出）
| 型号： | MX23L3211MC-10G |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 32M-BIT MASK ROM (8/16-BIT OUTPUT) |
| 文件： | 总10页 (文件大小：488K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX23L3211
32M-BIT MASK ROM (8/16-BIT OUTPUT)
• Current
FEATURES
-Operating:40mA
- Standby:5uA
• Supply voltage
- 3.0V ~ 3.6V for 90ns and 70ns speed grades
- 2.7V ~ 3.6V for 100ns and 120ns speed grades
• Package
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
• Bit organization
- 4M x 8 (byte mode)
- 2M x 16 (word mode)
• Fast access time
- Random access: 70ns (max.)
- Page access: 25ns (max.)
• Page Size
- 8 words per page
PIN CONFIGURATION
44 SOP
PIN DESCRIPTION
Symbol
A0~A20
D0~D14
D15/A-1
Pin Function
A20
A19
A8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
A18
A17
A7
2
3
4
Address Inputs
A9
Data Outputs
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A1
D7
D14
D6
D13
D5
D12
D4
VCC
5
A6
6
A5
D15 (Word Mode)/ LSB Address
(Byte Mode)
7
A4
8
A3
9
A2
CE
Chip Enable Input
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
A1
A0
CE/CE
VSS
OE/OE
D0
D8
D1
D9
D2
D10
D3
D11
OE
Byte
VCC
VSS
NC
No Connection
ORDER INFORMATION
Part No.
Access Time
70ns
Page Access Time
Package
Remark
MX23L3211MC-70
MX23L3211MC-90
MX23L3211MC-10
MX23L3211MC-12
MX23L3211MC-10G
MX23L3211MC-12G
MX23L3211TC-90
MX23L3211TC-10
MX23L3211TC-12
MX23L3211TC-10G
MX23L3211TC-12G
MX23L3211RC-90
MX23L3211RC-10
MX23L3211RC-12
25ns
25ns
30ns
50ns
30ns
50ns
25ns
30ns
50ns
30ns
50ns
25ns
30ns
50ns
44 pin SOP
90ns
44 pin SOP
100ns
120ns
100ns
120ns
90ns
44 pin SOP
44 pin SOP
44 pin SOP
Pb-free
Pb-free
44 pin SOP
48 pin TSOP
100ns
120ns
100ns
120ns
90ns
48 pin TSOP
48 pin TSOP
48 pin TSOP
Pb-free
Pb-free
48 pin TSOP
48 pin TSOP(Reverse type)
48 pin TSOP(Reverse type)
48 pin TSOP(Reverse type)
100ns
120ns
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REV. 2.9, MAY 11, 2004
1
MX23L3211
48 TSOP (Normal Type)
1
2
3
4
5
6
7
8
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
MX23L3211
(Normal Type)
D1
D8
D0
OE
VSS
VSS
A2
A1
A0
CE
48 TSOP (Reverse Type)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
MX23L3211
(Reverse Tpye)
D8
D0
OE
VSS
A2
A1
A0
CE
VSS
MODE SELECTION
CE
H
L
OE
X
Byte
X
D15/A-1
X
D0~D7
D8~D15
High Z
Mode
Power
Stand-by
Active
High Z
High Z
D0~D7
D0~D7
-
H
L
X
X
High Z
-
L
H
Output
Input
D8~D15
High Z
Word
Byte
Active
L
L
L
Active
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REV. 2.9, MAY 11, 2004
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MX23L3211
BLOCK DIAGRAM
A0/(A-1)
A2
A3
D0
Address
Buffer
Memory
Array
Page
Page
Word/
Byte
Output
Buffer
Buffer
Decoder
D15/(D7)
A20
CE
BYTE
OE
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
VCC
VIN
Ratings
-0.3V to 4.3V
Supply Voltage Relative to VSS
Voltage on any Pin Relative to VSS
Ambient OperatingTemperature
Storage Temperature
-0.5V to VCC + 2.0V
0°C to 70°C
Topr
Tstg
-65°C to 125°C
DC CHARACTERISTICS (Ta = 0°C ~ 70° C, VCC = 2.7V~3.6V)
Item
Symbol
VOH
VOL
MIN.
MAX.
Conditions
IOH = -400uA
IOL = 1.6mA
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
2.4V
-
-
0.4V
VCC+0.3V
0.8V
5uA
VIH
2.2V
VIL
-0.3V
ILI
-
-
-
-
-
-
-
0V, VCC
0V, VCC
ILO
5uA
ICC1
ISTB1
ISTB2
CIN
40mA
1mA
5uA
tRC = 100ns, all output open
CE = VIH
CE>VCC-0.2V
10pF
10pF
Ta = 25° C, f = 1MHZ
Ta = 25° C, f = 1MHZ
COUT
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REV. 2.9, MAY 11, 2004
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MX23L3211
AC CHARACTERISTICS (Ta = 0° C ~ 70°C, VCC =2.7V~3.6V)
Item
Symbol
23L3211-70*
23L3211-90
MAX. MIN. MAX. MIN.
100ns
23L3211-10
MAX. MIN.
120ns
23L3211-12
MIN.
MAX.
Read Cycle Time
tRC
tAA
70ns
-
90ns
-
-
-
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
-
70ns
70ns
25ns
25ns
-
-
90ns
-
100ns
-
120ns
120ns
50ns
50ns
-
tACE
tPA
-
-
90ns
25ns
25ns
-
-
100ns
30ns
30ns
-
-
-
-
-
-
tOE
tOH
tHZ*
-
-
-
-
Output Hold After Address
Output High Z Delay
0ns
-
0ns
-
0ns
-
0ns
-
20ns
20ns
20ns
20ns
Note:
1. Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by
design over the full voltage and temperature operating range - not tested.
2. For 70ns speed grade, the VCC range is 3.0~3.6V, operating temperature 0~55°C, and output load is 30pF.
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.6V
10ns
IOH (load)=-0.4mA
1.4V
1.4V
DOUT
See Figure
IOL (load)=1.6mA
C<100pF
Note:
No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
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REV. 2.9, MAY 11, 2004
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MX23L3211
TIMING DIAGRAM
RANDOM READ
ADD
ADD
ADD
ADD
tRC
tACE
CE
OE
tOE
tHZ
tOH
tAA
VALID
VALID
VALID
DATA
PAGE READ
A3-A20
VALID ADD
2'nd ADD
tPA
3'rd ADD
(A-1),A0,A1,A2
DATA
1'st ADD
tAA
VALID
VALID
VALID
Note: CE, OE are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0411
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MX23L3211
PACKAGE INFORMATION
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
REVISION HISTORY
REVISION
2.0
DESCRIPTION
PAGE
P4
P1
P6~7
P3
DATE
JAN/22/1999
Output hold after address (tOH) spec is revised as 0ns(min.)
120ns speed grade's voltage range is revised as 2.7V~3.6V
Modify Package Information
2.1
2.2
JUL/17/2001
JUL/25/2002
1. Add supply voltage relative to VSS
2. Change voltage on any pin relative to VSS:-0.5V to VCC+2.0
1. Supply voltage change to 2.7V ~ 3.6V
1. Modify VIN : -0.5V to VCC + 2V --> -0.5V to VCC + 2.0V
2. Add 48-TSOP reverse type package information
To modify Package Information
1. Add access time:70ns, 90ns
1. Add MX23L3211MC-90 in Order Information
1.ModifyTiming Diagram--Page Read
P3
P1
P3
P8
P6~8
P1,4
P1
P5
P1
2.3
2.4
JUL/26/2002
AUG/21/2002
2.5
2.6
2.7
2.8
2.9
NOV/21/2002
JAN/20/2003
JAN/22/2003
JAN/23/2003
MAY/11/2004
1.Add Pb-free package in order information
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
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MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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