MP6402 [MPS]
Dual, High PSRR 500mA Linear Regulator With Integrated Reset Circuit; 双路，高PSRR 500mA线性稳压器，集成复位电路
| 型号： | MP6402 |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Dual, High PSRR 500mA Linear Regulator With Integrated Reset Circuit |
| 文件： | 总15页 (文件大小：382K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP6402
Dual, High PSRR 500mA Linear Regulator
With Integrated Reset Circuit
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6402 is a dual-channel, high PSRR
linear regulator with reset function.
•
•
•
•
•
•
•
•
•
•
Up to 500mA Output Current
High Output Voltage Accuracy (±1.5％)
High Reset Voltage Accuracy (±3％)
Programmable Reset Delay Time
High PSRR: 60dB at 100Hz
15µVRMS Low Noise Outputs
Built-in Short Circuit Protection
Built-in Thermal Protection
The outputs range from 0.9V and 3.3V with
±1.5% voltage accuracy at both channels by
operating from a +2.5V to +5.5V input. OUT2
pin voltage is recommended to be higher than
OUT1 pin voltage. Short circuit protection and
thermal protection are built in to prevent
damage caused by output short circuit and
overloading, respectively.
Output Discharge
SOIC8E and 3x3mm TQFN8
A reset circuit is designed to monitor output
RESET
APPLICATIONS
voltage of channel 2. The
becomes
•
•
•
•
Consumer electronics
Blu-ray
Portable GPS Devices
Wireless Devices
active (low) when OUT2 pin voltage drops
below its threshold. To ensure that a complete
RESET
reset occurs, the
remains active for a
pre-set delay time. The delay time is
programmable by the user through changing
the external capacitor. The MP6402 is available
in SOIC8E and 3x3mm TQFN8 packages and
is specified for operation TJ from -40°C to
+125°C.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
V
IN
5V
OUT1
OUT2
EN
V
V
IN
IN
OUT1
MP6402
OUT2
R1
22.1k
EN
RESET
RESET
ExtCap
GND
C4
3300pF
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
ORDERING INFORMATION
Part Number
MP6402DN-EF-LF-Z*
MP6402DQT-EF-LF-Z**
Package
SOIC8E
TQFN8 (3x3mm)
Top Marking
6402DNEF
9X
Junction Air Temperature (TJ)
-40°C to +125°C
-40°C to +125°C
* For Tape & Reel, add suffix –Z (e.g. MP6402DN–Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP6402DN–LF–Z).
** For Tape & Reel, add suffix –Z (e.g. MP6402DQT–Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP6402DQT–LF–Z).
ORDERING GUIDE***
MP6402DQT
_ _ - LFZ
DN
Output Voltage 2 (Table 1)
Output Voltage 1 (Table 1)
Package
Temperature
Table 1 — Output Voltage Selector Guide
Code
A
B
C
D
E
F
G
H
VOUT1
0.9
1.05
1.2
1.3
1.8
2.5
2.8
--
VOUT2
--
--
--
1.3
1.8
2.5
2.8
3.3
*** Code in Bold are standard versions. For other output voltage
between 0.9V to 3.3V contact factory for availability.
Minimum order quantity on no-standard version in 25,000 units.
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
2
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
IN
IN
IN
IN
1
2
3
4
8
7
6
5
OUT1
OUT1
1
2
3
4
8
7
6
5
OUT2
OUT2
EN
EN
RESET
ExtCap
RESET
ExtCap
GND
GND
SOIC8E
TQFN8 (3mm x 3mm)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
SOIC8E...................................55 ...... 12...°C/W
TQFN8 (3mm x 3mm) ............48 ...... 11...°C/W
θJA
θJC
IN ......................................................-0.3V to 6V
RESET
.............................................-0.3V to 6V
All Other Pins..................................-0.3V to +6V
Notes:
(2)
Continuous Power Dissipation. (TA = +25°C)
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of
the maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient
temperature TA. The maximum allowable continuous power
dissipation at any ambient temperature is calculated by PD
SOIC8E...................................................... 2.2W
TQFN8 (3mm x 3mm)................................ 2.6W
Storage Temperature Range..... -55°C to 150°C
Junction Temperature...............................150°C
Lead Temperature (Soldering, 10sec) ......260°C
(MAX)
= (TJ (MAX)-TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal
shutdown. Internal thermal shutdown circuitry protects the
device from permanent damage. Thermal shutdown
Recommended Operating Conditions (3)
Input Voltage VIN .............................2.5V to 5.5V
Operating Junct. Temp (TJ)...... -40°C to +125°C
engages
at
TJ=150oC(TYP)
and
disengages
at
TJ=130oC(TYP)
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
ELECTRICAL CHARACTERISTICS
VIN= VOUT2+0.5V or 2.5V for each LDO. Typical Value at TA = +25°C unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Quiescent Current (ON)
Iq
EN activate without load
0.4
0.58
mA
Quiescent Current (OFF)
IqEBL
EN deactivate
17
36
µA
Output Voltage Range
Dropout Voltage
VOUT
VDROP
0.9
3.3
V
mV
%
260
IOUT=500mA
IOUT=10mA
IOUT=10mA, TA=-40°C to
85°C
-1.5
-2.3
550
1.5
2.3
Output Voltage Accuracy
%
Output Current Limit
Short Circuit Current
ILIM
IST
mA
mA
OUT short to GND
200
VIN=(VOUT1+0.5V or 2.5V),
IOUT1=1mA to 500mA
VIN=(VOUT2+0.5V or 2.5V),
△VOUT1
△VOUT2
△VLINE1
△VLINE2
45
50
mV
mV
Load Regulation
Line Regulation
IOUT2=1mA to 500mA
VIN=(VOUT1+0.5V or 2.5V) to
5.5V, IOUT1=10mA
VIN=(VOUT2+0.5V or 2.5V) to
5.5V, IOUT2=10mA
0.05
0.05
0.1
0.1
%/V
%/V
VOUT1=1.8V
PSRR
PSR
f=100Hz, IOUT1=100mA
60
51
dB
dB
VOUT2=2.5V
PSR2
f=100Hz, IOUT2=100mA
100Hz
to
80kHz,
Output Voltage Noise
RESET OUT
15
µVRMS
C
OUT=3.3µF, IOUT=10mA
VIN=VOUT2+0.5V,
ExtCap=3300pF
VIN falling
Reset Delay Time
RSTDLY
1.4
2.1
2.8
ms
Reset Voltage
Reset Hysteresis
RSTVOL
△VHYS
92.5
2
%VOUT2
%VOUT2
Reset Voltage Accuracy
Reset Low Level Voltage
EN Input High Voltage
EN Input High Voltage
-3
3
%
V
V
V
RSTLOW
IIN=2mA
0.2
1.5
0.6
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
PIN FUNCTIONS
Pin #
Name
IN
Description
1
2
3
4
5
6
7
8
Power supply input pin.
IN
Power supply input pin.
EN
Enable (Active High). Connect EN to IN generally. Don’t float EN pin.
Ground.
GND
ExtCap
Reset delay time set external capacitor connect pin.
Reset signal output pin.
RESET
OUT2
OUT1
Channel 2 LDO output pin.
Channel 1 LDO output pin.
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
5
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3V, VOUT1=1.8V, VOUT2=2.5V, CIN = COUT1= COUT2=3.3µF, TA = +25ºC, unless otherwise noted.
Quiescent Current
vs. Temperature
Quiescent Current
vs. Temperature
Dropout Voltage
vs. Temperature
I
=I
=0mA
I
=I
=500mA
OUT1 OUT2
OUT1 OUT2
450
430
410
390
370
350
330
310
290
270
250
1200
1150
1100
1050
1000
950
350
300
250
200
150
100
50
900
0
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
o
-40 -20
0
20 40 60 80 100
o
o
TEMPERATURE ( C)
TEMPERATURE ( C)
TEMPERATURE ( C)
Dropout Voltage
vs. Output Current
EN threshold
vs. Input Voltage
EN threshold
vs. Temperature
300
250
200
150
100
50
1.1
1
1
EN high threshold
0.95
0.9
EN high threshold
EN low threshold
0.9
0.8
0.7
0.6
0.5
0.4
0.85
0.8
EN low threshold
0.75
0.7
0.65
0
0.6
-40 -20
0
20 40 60 80 100
0
100 200 300 400 500
OUTPUT CURRENT(mA)
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE(V)
o
TEMPERATURE ( C)
Current Limit
vs. Temperature
Line Regulation
Line Regulation
V
=1.8V
OUT1
V =2.5V
OUT2
1000
900
800
700
600
500
0.3
0.2
0.1
0
0.3
0.2
0.1
0
I
OUT
=0A
I
=0A
OUT
-0.1
-0.2
-0.3
-0.1
-0.2
-0.3
I
=500mA
I
=500mA
4.5
OUT
OUT
-40 -20
0
20 40 60 80 100
3
3.5
4
4.5
5
5.5
3
3.5
4
5
5.5
o
INPUT VOLTAGE(V)
INPUT VOLTAGE(V)
TEMPERATURE ( C)
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
6
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3V, VOUT1=1.8V, VOUT2=2.5V, CIN = COUT1= COUT2=3.3µF, TA = +25ºC, unless otherwise noted.
Load Regulation
Load Regulation
Output Voltage Accuracy
vs. Temperature
V
=1.8V
OUT1
V
=2.5V
OUT2
I
=10mA
OUT1
0.8
0.6
0.4
0.2
0
0.9
0.5
0.9
0.5
V
OUT2
0.1
0.1
V
OUT1
-0.2
-0.4
-0.6
-0.8
-0.3
-0.7
-1.1
-0.3
-0.7
-1.1
0
100 200 300 400 500
OUTPUT CURRENT(mA)
0
100 200 300 400 500
OUTPUT CURRENT(mA)
-40 -20
0
20 40 60 80 100
o
TEMPERATURE ( C)
PSRR Frequency Ranged
From 10Hz to 2MHz
Region of Stable C
vs. Output Current
ESR
OUT
RESET Delay Time
vs. Ext Cap
I =100mA
O
100
10
1
80
70
60
50
40
30
20
10
0
10000
1000
100
V
OUT1
V
OUT2
Unstable Range
10
1
Stable Range
-10
-20
10
0.1
0
1
2
3
4
5
6
7
10
1
10
100
1000
10000
100 200 300 400 500
OUTPUT CURRENT(mA)
10
10 10 10
FREQUENCY(Hz)
10
EXT CAP (nF)
RESET Delay Time
vs. Temperature
ExtCap=3300pF
3
2.5
2
1.5
1
-40
-15
10
35
60
85
o
TEMPERATURE ( C)
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
7
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3V, VOUT1=1.8V, VOUT2=2.5V, CIN = COUT1= COUT2=3.3µF, TA = +25ºC, unless otherwise noted.
Input Power Start Up
EN Start Up
Input Power Shutdown
I
=I
=500mA
I
=I =500mA
OUT1 OUT2
I
=I
=500mA
OUT1 OUT2
OUT1 OUT2
with Resistor Load
with Resistor Load
with Resistor Load
V
V
OUT1
OUT1
V
OUT1
1V/div
1V/div
I
500mA/div
1V/div
I
500mA/div
OUT1
OUT1
I
OUT1
500mA/div
V
V
OUT2
OUT2
V
OUT2
2V/div
2V/div
I
500mA/div
2V/div
I
500mA/div
OUT2
OUT2
I
OUT2
500mA/div
EN
3V/div
V
IN
2V/div
V
IN
2V/div
1ms/div
4ms/div
Line Transient
Load Transient
EN Shutdown
V
=3V to 5.5V, I
IN OUT
=500mA
V
=1.8V, I
=10mA to 500mA
I
=I
=500mA
OUT1
OUT
OUT1 OUT2
with Resistor Load
with Resistor Load
with Resistor Load
V
OUT1/AC
10mV/div
V
OUT1
1V/div
V
OUT1/AC
50mV/div
I
OUT1
500mA/div
VOUT2/AC
10mV/div
V
OUT2
2V/div
I
OUT2
500mA/div
I
OUT
500mA/div
V
IN
2V/div
EN
3V/div
4ms/div
Load Transient
Over Current
Protection Entry
Over Current
Protection Steady State
V
=2.5V, I =10mA to 500mA
OUT2 OUT
with Resistor Load
V
OUT1
1V/div
V
OUT2
2V/div
V
V
OUT2/AC
50mV/div
OUT1
1V/div
V
IN
2V/div
V
IN
2V/div
I
I
OUT
OUT
I
IN
200mA/div
500mA/div
200mA/div
10ms/div
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
8
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3V, VOUT1=1.8V, VOUT2=2.5V, CIN = COUT1= COUT2=3.3µF, TA = +25ºC, unless otherwise noted.
Over Current
Protection Recovery
RESET Timing
ExtCap=3300pF
V
OUT1
1V/div
V
OUT2
1V/div
V
IN
RESET
2V/div
2V/div
EN
2V/div
I
OUT
200mA/div
2ms/div
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
9
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
BLOCK DIAGRAM
IN
Current Limit
--
+
Reference
Voltage
OUT1
Current Limit
--
+
OUT2
Thermal
Shut Down
Detecter
Reset Timer
ExtCap
SHUTDOWN
LOGIC
RESET
EN
GND
Figure 1—MP6402 Block Diagram
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
10
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TIMING DIAGRAM
VIN
0.8V
0
t
VIT
0
VOUT2
RESET
t
Td
Td
0
t
Td=RESET Delay
=Undefined State
Figure 2—RESET Timing Diagram
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
11
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
OPERATION
The MP6402 integrates two low-noise, low-
dropout, low-quiescent current linear regulators
with a reset circuit. It operates from a 2.5V to
5.5V input voltage. The dual-channel LDOs can
supply up to 500mA of load current. The internal
Current Limit
The MP6402 includes two independent current
limit structures which monitor and control the
gate voltage of the pass element to limit the
guaranteed maximum output current to 500mA.
reset circuit is used to monitor the output voltage
RESET
of channel 2. The
becomes active (low)
Output Discharge
when output voltage drops below its threshold.
The MP6402 uses the internal P-channel
MOSFET as the pass element and features
internal thermal shutdown and internal current
limit circuits.
The part involves a discharge function that
provides a 100Ω resistive discharge path for the
external output capacitor. The function will be
active when the part is disabled and it will be
done in a very limited time.
Linear Regulator
Thermal Shutdown
The MP6402 integrates dual-channel LDOs. The
output voltages are fixed. Their values range
from 0.9V and 3.3V with ±1.5% accuracy. Each
channel of MP6402 can supply up to 500mA of
load current.
Thermal protection turns off the pass element
when the junction temperature exceeds +150ºC,
allowing cooling the IC. When the IC’s junction
temperature drops by 20ºC, the pass element will
be turned on again. Thermal protection limits
total power dissipation in the MP6402. For
reliable operation, junction temperature should
be limited to 125 ºC maximum.
Reset Function
The reset circuit monitors the OUT2 pin voltage.
RESET
is a open-drain, active-low signal pin. It
should be connected to power supply through a
pull up resistor (R1 should be larger than 10kΩ).
RESET
becomes active (low) when output
voltage of channel 2 drops below its threshold.
RESET
The thermal shutdown will make the
active. When the activated triggering condition is
RESET
removed,
will become inactive after a
pre-set delay time. The delay time is
programmable through external capacitor
between ExtCap and GND.
EN Shutdown
The MP6402 can be switched ON or OFF by a
logic input at the EN pin. A high voltage at this
pin will turn the device on. When the EN pin is
low, the regulator is off and the supply current is
reduced. If this feature is not to be used, the EN
input should be tied to IN pin to keep the
regulator on at all time. Do not float the EN pin.
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
12
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
APPLICATION INFORMATION
Operating Region and Power Dissipation
The maximum power dissipation of MP6402
depends on the thermal resistance of the case
and circuit board, the temperature difference
between the die junction and ambient air, and the
rate of airflow. The power dissipation across the
device is
Programmable Reset Delay Time
The reset delay time is determined by the value
of external capacitor (C4) connected to ExtCap
pin. Typically the reset delay time is 2.1mSec
when the external capacitor is 3300pF. For a
given delay time, the capacitor value can be
calculated using the following equation:
TD (ms) = [C4 (nF)× 0.6] + 0.1
P = IOUT x (VIN - VOUT)
The maximum power dissipation is:
PD (MAX) = (TJ (MAX)-TA)/θJA
The reset delay time is determined by the charge
time of external capacitor. Stray capacitance may
cause errors of the delay time. A ceramic
capacitor with low leakage is strongly
recommended.
Where (TJ (MAX) – TA) is the temperature
difference between the MP6402 die junction and
the surrounding environment, θJA is the thermal
resistance from the junction to the surrounding
environment. The FIN of the MP6402 performs
the dual function of providing an electrical
connection to ground and channeling heat away.
Connect the FIN to ground using a large pad or
ground plane.
Input Capacitor Selection
Using a capacitor whose value is higher than 1µF
on the MP6402 input and the amount of
capacitance can be increased without limit.
Larger values will help improve line transient
response with the drawback of increased size.
Ceramic capacitors are preferred.
Output Capacitor Selection
The MP6402 is designed specifically to work with
very low ESR ceramic output capacitor in space-
saving and performance consideration.
A
ceramic capacitor in the range of 3.3µF and 10µF,
and with ESR lower than 0.5Ω is suitable for the
MP6402 application circuit. Output capacitor of
larger values will help to improve load transient
response and reduce noise with the drawback of
increased size.
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
13
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
PACKAGE INFORMATION
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
0.124(3.15)
0.136(3.45)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
PIN 1 ID
1
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0.063(1.60)
0.016(0.41)
0.050(1.27)
0o-8o
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
0.138(3.51)
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MP6402 Rev.1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
14
MP6402 –DUAL 500MA LDO LINEAR REGULATORS WITH INTEGRATED RESET IC
TQFN8 (3mm x 3mm)
2.90
3.10
0.30
0.50
1.45
1.75
PIN 1 ID
SEE DETAIL A
PIN 1 ID
MARKING
0.20
0.30
8
1
4
2.25
2.55
2.90
3.10
0.65
BSC
PIN 1 ID
INDEX AREA
5
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.70
0.80
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
2.90
1.70
0.70
0.25
0.65
2.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6402 Rev. 1.0
4/8/2011
www. MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
15
相关型号：
MP6404_07
High Power High Speed Switching Applications 3-Phase Motor Drive and Stepping Motor Drive Applications
TOSHIBA
©2020 ICPDF网 联系我们和版权申明