MP5414DV [MPS]

PMU for 3D Glasses; PMU的3D眼镜
MP5414DV
型号: MP5414DV
厂家: MONOLITHIC POWER SYSTEMS    MONOLITHIC POWER SYSTEMS
描述:

PMU for 3D Glasses
PMU的3D眼镜

文件: 总22页 (文件大小:687K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MP5414  
PMU for 3D Glasses  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The MP5414 is a highly-efficient fully-integrated  
PMU with a current-mode step-up converter,  
four single-pole/double-throw switches, low  
drop-out, and a battery charger designed for  
battery-powered supply applications.  
BOOST  
1.8V Low Voltage Start-Up  
1.8V to 5.5V Input Range  
Output Disconnect  
Integrated Power MOSFET and Schottky  
Diode  
The step-up converter can start-up from an  
input voltage as low as 1.8V. It uses a current-  
limited variable-frequency control algorithm to  
optimize efficiency and minimize external  
component size and cost. The internal low-  
resistance N-Channel MOSFET switch can  
withstand up to 10V, allowing the MP5414 to  
produce a high output voltage with high  
efficiency from a dual-cell NiCd/NiMH or single-  
cell Li-ion battery. In addition, the step-up  
converter can disconnect all loads from the  
input DC power supply.  
Variable Frequency Control  
<1μA Shutdown Current  
Current Mode Control with Internal  
Compensation  
Inrush Current Limiting and Internal Soft-  
Start  
Input Under-Voltage Lockout  
CHARGER  
0.75% VBATT Accuracy  
Low Reverse-Battery Current (< 1µA)  
Programmable Charge Current  
Charge Status Indication  
No External Sense Resistor  
No External Reverse Blocking Diode  
The charger features constant-current and  
constant-voltage charging modes with  
a
programmable charge current (50mA to  
300mA), trickle-charge capability, and a charge-  
status indicator. Charging is enabled with an  
input voltage greater than 3.5V, and is disabled  
when unplugged from the AC adaptor. The  
charger does not need an external reverse-  
blocking diode.  
LINEAR REGULATOR  
Low 100mV Dropout at 100mA Output  
Programmable Output Voltage with 2%  
Accuracy  
Up to 6.5V Input Voltage  
High PSRR: 70dB at 1kHz  
Better Than 0.001%/mA Load Regulation  
Stable With Low-ESR Output Capacitor  
The low-dropout linear regulator operates with  
low noise from a 2.7V-to-6.5V input voltage,  
and regulates the output voltage with 2%  
accuracy from 1.25V to 5V.  
APPLICATIONS  
The MP5414 is available in a 4mm x 5mm 28-  
pin QFN package.  
2-Cell and 3-Cell NiCd/NiMH or Single-cell  
Li-Ion Battery Consumer Products  
3D Glass Driver  
Small LCD Displays Bias Supply  
Digital Still and Video Cameras  
Smartphones, Netbooks, and Handheld  
Video Game Consoles  
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green  
status, please visit MPS website under Quality Assurance. “MPS” and “The  
Future of Analog IC Technology” are Registered Trademarks of Monolithic  
Power Systems, Inc.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
1
MP5414—PMU FOR 3D GLASSES  
TYPICAL APPLICATION  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
2
MP5414—PMU FOR 3D GLASSES  
ORDERING INFORMATION  
Part Number*  
Package  
Top Marking  
MP5414DV  
QFN28 (4x5mm)  
MP5414  
* For Tape & Reel, add suffix –Z (e.g. MP5414DV–Z);  
For RoHS Compliant Packaging, add suffix –LF (e.g. MP5414DV–LF–Z)  
PACKAGE REFERENCE  
TOP VIEW  
28  
27 26  
25  
24 23  
S2  
S1  
1
2
3
4
5
6
7
8
22  
21  
20  
19  
18  
17  
16  
15  
BSTEN  
BSTL  
BSTFB  
BSTISET  
BSTGND  
BSTIN  
BSTOUT  
BATT  
IPGM  
BSTSW  
CHGGND  
CHGIN  
LDOFB  
LDOOUT  
9
10 11  
12 13 14  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
3
MP5414—PMU FOR 3D GLASSES  
ABSOLUTE MAXIMUM RATINGS (1)  
Thermal Resistance (4)  
θJA  
θJC  
BSTSW, A, B, C, D to BSTGND ...-0.5V to +12V  
CHGIN to CHGGND .....................-0.3V to +25V  
LDOIN to LDOGND......................-0.3V to +7.0V  
LDOFB to LDOGND.... -0.3V to (VLDOOUT + 0.3V)  
All other Pins................................-0.3V to +6.0V  
Continuous Power Dissipation (TA = 25°C) (2)  
............................................................ 3.1 W  
Junction Temperature...............................140°C  
Lead Temperature ....................................260°C  
Storage Temperature............... -65°C to +150°C  
QFN28 (4x5mm) ....................40 ....... 9....°C/W  
Notes:  
1) Exceeding these ratings may damage the device.  
2) The maximum allowable power dissipation is a function of the  
maximum junction temperature TJ(MAX), the junction-to-  
ambient thermal resistance θJA, and the ambient temperature  
TA. The maximum allowable continuous power dissipation at  
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-  
TA)/ θJA. Exceeding the maximum allowable power dissipation  
will cause excessive die temperature, and the regulator will go  
into thermal shutdown. Internal thermal shutdown circuitry  
protects the device from permanent damage.  
3) The device is not guaranteed to function outside of its  
operation conditions.  
4) Measured on JESD51-7 4-layer board.  
Recommended Operating Conditions (3)  
VBSTIN .............................................1.8V to 5.5V  
VBSTOUT .......................................... VBSTIN to 10V  
VCHGIN .........................................4.75V to 5.25V  
V
V
LDOIN ..............................................2.7V to 6.5V  
LDOOUT .............................................1.25V to 5V  
I
LDOOUT .....................................250mA Maximum  
Operating Junction Temp. (TJ). -40°C to +125°C  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
4
MP5414—PMU FOR 3D GLASSES  
ELECTRICAL CHARACTERISTICS  
VBSTIN = 2.4V, VBSTOUT=10V, IBSTOUT=2mA, VCHGIN = VLDOIN = 5V, TA = 25°C, unless otherwise noted.  
Parameters  
Symbol Condition  
Min  
Typ Max Units  
Step-Up Converter  
Operating Input Voltage  
Minimum Startup Voltage  
VBSTIN  
1.8  
5.5  
1.8  
V
V
VBSTST  
IBSTQ_NS  
IBSTSD  
VBSTOUT=0V  
BSTOUT=0, VBSTFB=1.3V,  
No switching  
I
Quiescent Current  
28  
50  
µA  
Shutdown Current  
VBSTEN=0V  
0.1  
1
µA  
V
IN Under Voltage Lockout  
VBSTUVLO VBSTIN Rising  
1.58  
1.7  
Under Voltage Lockout  
Hysteresis  
100  
mV  
Maximum On Time  
Minimum Off Time  
SW On-Resistance  
SW Leakage Current  
SW Current Limit  
TBSTON  
4
6
7.5  
700  
0.8  
2
µs  
ns  
TBSTOFF  
400  
550  
0.73  
RBSTDS_ON IBSTSW = 200mA  
IBSTSW_LKG VBSTSW=12V  
IBSTSW_LIMIT RBSTISET=300k  
µA  
mA  
180  
0.5  
Schottky Diode Forward  
Voltage  
VBSTFW  
IBSTFW=100mA  
0.4  
9.7  
0.6  
V
V
Let BSTFB pin floating,  
1.8V<VBSTIN<5.5V  
Fixed OUT Supply Voltage  
VBSTOUT_FD  
10  
10.3  
Connect R-divider to BSTFB,  
1.8V<VBSTIN<5.5V  
FB Voltage (Regulation Mode)  
FB Input Bias Current  
VBSTFB  
IBSTFB  
1.20 1.23 1.26  
1
V
µA  
VBSTFB = 1.23V  
Output Disconnect Switch On-  
Resistance  
RDISC_ON VBSTOUT=10V  
0.7  
0.8  
Thermal Shutdown  
Charger  
150  
°C  
Supply Current from VIN  
Input UVLO  
ISUPPLY  
ICHG = 0A,  
0.5  
2.3  
mA  
V
Input falling  
1.8  
2.8  
2
Battery Reverse Current to  
BATT Pin  
Input=GND or float, VBAT=4V  
µA  
V
Battery Voltage Regulation  
VBATT  
TA = 0°C to +50°C, ICHG = 5mA  
4.16 4.20 4.24  
VCHGIN = 5V, VBATT = 3.8V  
RPGM = 1.6kΩ  
225  
250  
275  
mA  
Constant Current Regulation  
ICHG  
VCHGIN = 5V, VBATT = 3.8V,  
%ICHG  
R
PGM = 1.5k– 7.2k,  
90  
100  
110  
(5)  
-40°C < TA < +85°C  
VCHGIN = 5V, VBATT = 2.3V  
VBATT Rising  
Trickle Current  
5
10  
2.6  
190  
10  
15 %ICHG  
Trickle Threshold Voltage  
Trickle Voltage Hysteresis  
CHGZ Low-to-High Threshold  
CHGZ Sink Current  
2.45  
2.75  
V
mV  
%ICHG  
mA  
Pin Voltage = 0.2 V  
5
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
5
MP5414—PMU FOR 3D GLASSES  
ELECTRICAL CHARACTERISTICS (continued)  
VBSTIN = 2.4V, VBSTOUT=10V, IBSTOUT=2mA, VCHGIN = VLDOIN = 5V, TA = 25°C, unless otherwise noted.  
Parameters  
Symbol Condition  
Min  
Typ Max Units  
VCHGIN  
VBATT  
-
VBATT = 3.8V, ICHG = 150mA,  
Current drop 10%  
Dropout Voltage  
0.25  
V
Overcharge Protection  
Thermal Limit (6)  
LDO  
VBATT = 4.25V  
0
μA  
130  
°C  
Operating Voltage  
Ground Pin Current  
Shutdown Current  
ILDOOUT = 1mA  
2.7  
6.5  
155  
1
V
ILDOOUT = 1mA–250mA  
VLDOEN = 0V, VLDOIN = 5V  
125  
0.1  
μA  
μA  
1.197 1.222 1.246  
FB Regulation Voltage  
Dropout Voltage (7)  
V
1.194 1.222 1.249  
-40°C TA +85°C  
VLDOOUT = 3V, ILDOOUT = 150mA  
150  
125  
mV  
VLDOOUT = 4V, ILDOOUT = 150mA  
f = 1kHz, CLDOFB > 0.1μF,  
ILDOOUT = 1mA  
nV/√  
Hz  
Output Voltage Noise  
Line Regulation  
300  
I
V
LDOOUT = 1mA,  
LDOIN = (VLDOOUT + 0.5V) to 6.5V (8)  
LDOOUT = 1mA to 150mA,  
LDOIN = VLDOOUT + 0.5V (8)  
0.005  
0.001  
%/V  
I
V
Load Regulation  
%/mA  
VLDOIN > VLDOOUT +0.5V,  
CLDOOUT = 2.2μF,  
VLDOIN(AC) = 100mV, f = 1kHz  
70  
30  
dB  
dB  
PSRR  
V
C
V
LDOIN > VLDOOUT + 0.5V,  
LDOOUT = 2.2μF,  
LDOIN(AC) = 100mV, f = 1MHz  
LDOEN Input High Voltage  
LDOEN Input Low Voltage  
LDOEN Input Bias Current  
Thermal Protection  
1.5  
V
V
0.4  
VLDOEN = 0V, 5V  
0.01  
155  
30  
1
μA  
°C  
°C  
Thermal Protection Hysteresis  
Control Interface  
BSTEN/SX Input High Voltage  
BSTEN/SX Input Low Voltage  
BSTEN/SX Input Bias Current  
VBSTEN_H  
VBSTEN_L  
IBSTEN  
1.4  
V
V
0.4  
1
µA  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
6
MP5414—PMU FOR 3D GLASSES  
ELECTRICAL CHARACTERISTICS (continued)  
VBSTIN = 2.4V, VBSTOUT=10V, IBSTOUT=2mA, VCHGIN = VLDOIN = 5V, TA = 25°C, unless otherwise noted.  
Parameters  
Symbol Condition  
Min  
Typ Max Units  
SPDT Switch  
Switch On-Resistance  
RSPDT_ON VBSTOUT=10V, IA, IB, IC, ID=2mA  
25  
50  
10  
Switch On-Resistance Match  
Between Channels  
RSPDT_ON VBSTOUT=10V, IA, IB, IC, ID=2mA  
Turn-on Time  
Turn-off Time  
Protection  
TON  
RL= 300, CL= 35pF  
RL= 300, CL= 35pF  
80  
ns  
ns  
TOFF  
170  
Output Disconnect Switch On-  
Resistance  
RDISC_ON VBSTOUT=10V  
0.74  
150  
0.8  
Thermal Shutdown  
°C  
Notes:  
5) ICHG is the target preprogrammed charge current (Die temperature below 110°C).  
6) Guarantee by design  
7) Dropout Voltage is defined as the input to output differential when the output voltage drops 1% below its normal value  
8) VLDOIN = 2.7V for VLDOOUT = 1.25V to 2.2V.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
7
MP5414—PMU FOR 3D GLASSES  
TYPICAL PERFORMANCE CHARACTERISTICS  
Step-Up Converter  
VBSTIN = VBSTEN = 2.4V, VBSTOUT = 10V, IBSTOUT = 2mA, L1 = 10µH/150m, unless otherwise noted.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
8
MP5414—PMU FOR 3D GLASSES  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
Charger  
VCHGIN = 5V, C3 = C5 = 1µF, TA = 25°C, unless otherwise noted.  
Battery Charge Curve  
Charge Current vs.  
Battery Votlage  
Battery Voltage vs.  
Input Voltage  
4.9  
4.2  
3.5  
2.8  
2.1  
1.4  
0.7  
0.0  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
4.30  
4.26  
4.22  
4.18  
4.14  
4.10  
0.36  
0.30  
0.24  
0.18  
0.12  
0.06  
0.00  
V
BATT  
I
BATT  
V
STATUS  
0
0.9  
2.7  
3.6  
4.5  
4.5 5.0 5.5 6.0 6.5 7.0  
8.0  
7.5  
1.8  
0
20  
40  
60  
80  
100  
Charge Current vs.  
Battery Voltage  
Charge Current vs.  
Charge Current vs.  
Input Voltage  
R
Resistance  
PGM  
0.36  
0.30  
0.24  
0.18  
0.12  
0.06  
0.00  
8
7
6
5
4
3
2
1
0
350  
300  
250  
200  
150  
100  
50  
0
2.9 3.1 3.3 3.5  
3.9 4.1  
3.7  
0
50 100 150 200 250 300 350  
400  
4.5  
6.0  
7.5  
9.0  
Charge Current vs.  
Temperature  
Reverse Current vs.  
Battery Votlage  
Forward Leakage Current  
160  
156  
152  
148  
144  
140  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.8  
0.75  
0.7  
0.65  
0.6  
0.55  
0.5  
0.45  
0.4  
-50  
-25  
0
25  
50  
75  
2.5 2.8  
3.7  
4
4.3  
3.1 3.4  
7.0  
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
9
MP5414—PMU FOR 3D GLASSES  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
Charger  
VCHGIN = 5V, C3 = C5 = 1µF, TA = 25°C, unless otherwise noted.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
10  
MP5414—PMU FOR 3D GLASSES  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
LDO  
VLDOIN = 4.5V, VLDOOUT = 2.85V, C4 = 1μF, CBYP = 0.1μF, C6 = 2.2μF, TA = 25°C, unless otherwise  
noted.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
11  
MP5414—PMU FOR 3D GLASSES  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
SPDT Switch  
BSTIN = VBSTEN = 2.4V, VBSTOUT = 10V, IBSTOUT = 2mA, L1 = 10µH/150m, unless otherwise noted.  
V
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
12  
MP5414—PMU FOR 3D GLASSES  
PIN FUNCTIONS  
Pin #  
Name  
Pin Function  
C-Channel SPDT Switch Control Input. If the chip is enabled, a logic low input switches C to  
GND and a logic high input switches C to BSTOUT. Do not leave this pin floating.  
1
S2  
Step-Up Converter Regulator Feedback. Connect to the tap of an external resistor divider  
from the output to BSTFB to set the boost converter output voltage. Float this pin to achieve  
fixed 10V output.  
2
3
BSTFB  
Step-Up Converter Constant Peak Current Set. Connect to an external resistor to BSTGND  
to set the boost converter peak current.  
BSTISET  
4
5
BSTGND Step-Up Converter and SPDT Ground.  
BATT  
Charger Output.  
Constant-Charge–Current Programmer. Connect to an external resistor to ground to  
6
IPGM  
program the charging current in constant-current mode. Do not connect a capacitor to this  
pin.  
7, 9  
8
CHGGND Charger Ground.  
CHGIN  
CHGZ  
Charger Input Supply. CHGIN receives the AC adapter.  
10  
Open-Drain Charger Status Indicator.  
Low Dropout Enabled. Drive LDOEN high to turn on the low dropout, drive LDOEN low to  
turn it off. For automatic startup, connect LDOEN to LDOIN.  
11  
LDOEN  
Low Dropout Power Source Input. LDOIN supplies the internal power to the low dropout and  
is the source of the pass transistor. Bypass LDOIN to LDOGND with a 1μF or greater  
capacitor.  
12  
13  
LDOIN  
LDOGND Low Dropout Ground.  
Low Dropout Regulator Output. LDOOUT is the output of the linear regulator. Bypass  
LDOOUT to LDOGND with a 1μF or greater capacitor.  
14, 15 LDOOUT  
Low Dropout Feedback Input. Connect a resistor divider from LDOOUT to LDOFB to set the  
output voltage.  
16  
17  
LDOFB  
Step-Up Converter Output Switch Node. BSTSW is the drain node of the internal low-side N-  
BSTSW Channel MOSFET. Connect the inductor from BSTL to BSTSW to complete the step-up  
converter.  
18  
19  
BSTOUT Step-Up Converter Output.  
Step-Up Converter and SPDT Input Supply. BSTIN pin powers the internal circuitry and is  
BSTIN  
the drain of the internal disconnecting N-channel MOSFET. Bypass locally.  
Step-Up Converter Inductor Output. BSTL is the source/body of the internal N-channel  
MOSFET, M3. Connect the inductor from this pin to BSTSW.  
20  
21  
22  
23  
BSTL  
Step-Up Converter and SPDT On/Off Control Input. A logic high input turns the chip on.. Do  
not leave this pin floating.  
BSTEN  
B-Channel SPDT Switch Control Input. If the chip is enabled, a logic low input switches B to  
GND and a logic high input switches B to BSTOUT. Do not leave this pin floating.  
S1  
A-Channel SPDT Switch Control Input. If the chip is enabled, a logic low input switches A to  
GND and a logic high input switches A to BSTOUT. Do not leave this pin floating.  
S0  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
13  
MP5414—PMU FOR 3D GLASSES  
PIN FUNCTIONS (continued)  
Pin #  
24  
Name  
Pin Function  
A
B
C
D
A-Channel SPDT Switch Output.  
B-Channel SPDT Switch Output.  
C-Channel SPDT Switch Output.  
D-Channel SPDT Switch Output.  
25  
26  
27  
D-Channel SPDT Switch Control Input. If the chip is enabled, a logic low input switches D to  
GND and a logic high input switches D to BSTOUT. Do not leave this pin floating.  
28  
S3  
Exposed  
Pad  
Connect exposed pad to ground plane in PCB for proper thermal performance.  
MP5414 Rev.1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
14  
MP5414—PMU FOR 3D GLASSES  
FUNCTIONAL BLOCK DIAGRAM  
L1  
C2  
BSTL  
BSTSW  
R1  
R2  
M2  
M3  
Driver  
Driver  
BSTOUT  
BSTGND  
Step-up  
Converter  
Control  
Logic  
BSTIN  
BSTOUT  
C1  
Regulator  
M1  
Step-up Converter  
Internal Power Supply  
-
+
Current  
Sensing AMP  
BSTEN  
S0  
Step-up & SPDT  
Enable Control  
Peak Current  
Control  
BSTISET  
BSTFB  
-
S1  
S2  
Control  
Signal  
EA  
+
1.23V  
S3  
SPDT Control  
BSTOUT  
A
B
C
D
L+  
L-  
R+  
R-  
CHGIN  
BATT  
VIN  
R
C3  
C5  
Battery  
LDOIN  
-
+
C4  
CHGZ  
Battery  
Charger  
Control  
Bandgap  
Reference  
CHGGND  
LDOOUT  
LDOFB  
VLDOOUT  
C6  
R3  
R4  
RPGM  
CBYP  
IPGM  
LDOGND  
LDOEN  
Figure 1—Functional Block Diagram  
MP5414 Rev.1.12  
12/13/2012  
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15  
MP5414—PMU FOR 3D GLASSES  
OPERATION  
The MP5414 is a high-efficiency fully-integrated  
PMU with a current-mode step-up converter, four  
single-pole/double-throw (SPDT) switches, low  
dropout (LDO), and a battery charger designed  
for low-power battery-operated bias-supply  
applications.  
converter limits this inrush current by increasing  
the current limit in three steps, rising from 0A to  
ILIM/4 in 256 switching cycles, then ILIM/4 to ILIM/2  
for the next 256 cycles, before rising to the full  
current limit. The soft-start time varies greatly  
with load current; output voltage, and input  
voltage.  
Step-Up Converter  
Variable Frequency  
Constant-Peak–Current Operation  
Output Disconnection  
The step-up converter integrates a disconnect  
switch between the BSTIN and the BSTL pins.  
The switch is composed of an NMOS and a  
PMOS in parallel. The step-up converter can  
disconnect all loads from input DC power supply  
when the BSTEN pin is connected to ground.  
When the power MOSFET M1 is turned on, the  
inductor current increases until it hits its current  
limit. The power MOSFET then turns off for a set  
minimum-off time. If the feedback pin is still lower  
than the 1.23V internal reference at the end of  
this minimum off time, the power MOSFET will  
turn on again. Otherwise the step-up converter  
waits until the voltage drops below the threshold  
before turning on the MOSFET again. This  
process allows for optimal use of the inductor  
while minimizing the output ripple, reducing the  
size of the output capacitor, and maintaining low  
operating current.  
Under Voltage Lockout  
An under-voltage lockout (UVLO) function  
prevents device startup for values of VBATT < 1.5V.  
If VBSTIN falls below 1.5V during device operation  
and battery discharge, the device automatically  
enters the shutdown mode.  
Step-Up Converter Start-Up  
Integrated Schottky Diode  
The converter undergoes the following steps  
after first applying the input signal and followed  
by the enable signal:  
A high switching frequency requires high-speed  
rectification for optimum efficiency. The step-up  
converter integrates a low-voltage–drop schottky  
diode to reduce the number of external parts to  
save critical board space.  
1. PMOS of the disconnect switch turns on,  
2. Internal soft-start boosts step-up converter,  
causing VBSTOUT to rise,  
Four SPDT Switches  
3. VBSTOUT drives the NMOS of the disconnect  
switch when VBSTOUT reaches threshold.  
The MP5414 includes four SPDT analog  
switches, where pins S0 through S3 control the  
switches, respectively. While the chip is enabled,  
a logic-low input switches the corresponding  
channel output to BSTGND. Conversely, a logic-  
high input switches the channel to BSTOUT.  
Table 1 shows the control logic.  
Because the on-resistance of the NMOS is  
smaller than that of PMOS, the NMOS shorts the  
PMOS under normal operation to reduce  
conduction loss.  
The MP5414 offers both soft-start and inrush  
current limiting during start-up and under normal  
operation.  
Soft-Start  
The step-up converter implements a soft-start by  
charging an internal capacitor with a very weak  
current source. The voltage on this capacitor, in  
turn, slowly ramps the peak inductor current limit  
from zero to the setting value. The step-up  
MP5414 Rev.1.12  
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MP5414—PMU FOR 3D GLASSES  
Table 1—Switching Selection Control Logic  
Control Input Switch Output  
BSTEN  
S0  
X
L
S1  
X
L
S2  
X
L
S3  
X
L
A
B
C
D
L
Open  
Open  
Open  
Open  
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
BSTGND BSTGND BSTGND BSTGND  
BSTOUT BSTGND BSTGND BSTGND  
BSTGND BSTOUT BSTGND BSTGND  
BSTOUT BSTOUT BSTGND BSTGND  
BSTGND BSTGND BSTOUT BSTGND  
BSTOUT BSTGND BSTOUT BSTGND  
BSTGND BSTOUT BSTOUT BSTGND  
BSTOUT BSTOUT BSTOUT BSTGND  
BSTGND BSTGND BSTGND BSTOUT  
BSTOUT BSTGND BSTGND BSTOUT  
BSTGND BSTOUT BSTGND BSTOUT  
BSTOUT BSTOUT BSTGND BSTOUT  
BSTGND BSTGND BSTOUT BSTOUT  
BSTOUT BSTGND BSTOUT BSTOUT  
BSTGND BSTOUT BSTOUT BSTOUT  
BSTOUT BSTOUT BSTOUT BSTOUT  
H
L
L
L
L
H
H
L
L
L
H
L
L
L
H
H
H
H
L
L
H
L
L
L
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
H
L
L
L
H
H
L
L
H
L
L
H
H
H
H
H
L
L
H
H
H
H: High Level  
L: Low Level  
X: Irrelevant  
MP5414 Rev.1.12  
12/13/2012  
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MP5414—PMU FOR 3D GLASSES  
Charger  
programmed current value, ICHG. Once the battery  
voltage reaches 4.2V, the charger will operate in  
the Constant Voltage (CV) mode until the battery  
is fully charged.  
The charger is enabled when the input supply  
voltage reaches 3.5V, the UVLO threshold, or the  
battery voltage—whichever voltage is highest. An  
internal 500kpull-down resistor connects the  
CHGIN and CHGGND pins. The charger  
automatically switches between CC/CV charging  
algorithms depending on the battery status.  
Figure 2 shows a typical charging sequence.  
Charge Current vs  
1/R  
Resistance  
PGM  
400  
350  
300  
250  
200  
150  
100  
50  
V
I
BATT  
BATT  
Soft-Start  
Time  
V
BATT  
4.2V  
I
CHG  
Thermal  
Regulation  
90% of I  
CHG  
CHG  
2.6V  
I
BATT  
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
10% of I  
Charge  
Start  
Charge  
End  
Trickle  
Charging  
CC  
Mode  
CV  
Mode  
Figure 3—Charge Current vs. 1/RPGM  
Resistance  
Figure 2—Charger Typical Charging  
Procedure  
Charge Status (CHGZ)  
The open-drain CHGZ pin monitors charge status  
by connecting to VBATT through an LED, a resistor,  
or both. The CHGZ pin signals the end-of-  
charge—or battery full—when its voltage goes  
from LOW to HIGH (i.e. the LED turns off), which  
occurs when ICHG decreases to 10% of the  
programmed value.  
Programming of Charge Current and Battery  
Full Current  
Table 2—RPGM and ICHG Relationship  
RPGM (k)  
7.210  
5.555  
4.010  
3.742  
2.497  
1.873  
1.492  
1.249  
1.080  
ICHG (mA)  
54.67  
70.99  
Thermal Protection  
98.70  
The charger automatically limits the die  
temperature to 130°C by reducing the current to  
prevent overheating. The current remains  
continuous throughout.  
105.90  
159.80  
214.30  
269.90  
323.00  
371.00  
LDO  
The MP5414 has an integrated low-current, low-  
noise, high-PSRR, low-dropout linear regulator. It  
is suitable for use in devices that require very low  
noise power supplies and high-PSRR such as  
PLL VCO supplies for mobile handsets and  
802.11 PC Cards, as well as audio codecs and  
microphones. The LDO uses a PMOS pass  
element and features internal thermal shutdown.  
An optional feed-forward capacitor CBYP between  
LDOFB and LDOOUT pins for improves transient  
response.  
A resistor (RPGM) connecting the IPGM pin to  
ground programs the charge current, ICHG. Table  
2 and Figure 3 show the relationship between the  
charge current and the value of the programming  
resistor.  
When the battery voltage falls below the trickle-  
charge threshold (2.6V), the charge current is  
limited to 10% of the programmed value. After  
the battery voltage reaches 2.6V, the charger  
switches to constant-current (CC) mode using a  
MP5414 Rev.1.12  
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MP5414—PMU FOR 3D GLASSES  
APPLICATION INFORMATION  
Components referenced below apply to  
Typical Application Circuit on page 2.  
For example, if R1=178kand R2 = 24.9k,  
then VBSTOUT = 10V.  
Setting the Step-Up Converter BSTSW  
Current Limit  
Selecting the Step-Up Converter Inductor  
Select an inductor with a DC current rating of at  
least 40% higher than the maximum input current.  
For best efficiency, select an inductor with the  
lowest-possible DC resistance.  
The resistor on the BSTISET pin sets the  
BSTSW current limit. Figure 4 illustrates the  
relationship of the BSTSW current limit vs. the  
BSTISET resistor. In constant-peak-current mode,  
the inductor current increases until the current  
limit is reached after the power MOSFET turns  
on. Since the response delay, the actual BSTSW  
peak current value exceeds the setting current  
limit a little. Under same condition, a lower  
current limit allows lower BSTSW current and  
higher switching frequency, while a higher  
current limit allows higher BSTSW current and  
lower switching frequency.  
Selecting the Step-Up Converter Input  
Capacitor  
The input capacitor, C1, reduces both the surge  
current drawn from the input supply and the  
switching noise from the device. Select a  
capacitor with a switching frequency impedance  
less than the input source impedance to prevent  
high-frequency switching current from passing  
through the input: for example, ceramic  
capacitors with X5R or X7R dielectrics with low  
ESR and small temperature coefficients. A 4.7μF  
or 10μF capacitor will suffice for most  
applications.  
R
vs. Current Limit  
BSTISET  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
Selecting the Step-Up Converter Output  
Capacitor  
The output capacitor, C2, limits the output  
voltage and improves feedback loop stability.  
Select an output capacitor with a low switching  
frequency impedance, such as ceramic  
capacitors with X7R dielectrics with low ESR  
characteristics. A ceramic capacitor with a value  
of less than 10μF will suffice for most  
applications.  
0
200 400 600 800 1000  
Figure 4—BSTISET Resistance vs. BSTSW  
Current Limit  
Flow Chart of Charger Operation  
The power-on reset (POR) feature can ensure  
that the device initiates in a known state. The  
flow chart in Figure 5 describes the conditions  
that lead to charger operation modes, such as  
constant voltage charge (CVC) and constant-  
current charge (CCC).  
Setting the BSTOUT Output Voltage  
MP5414’s step-up converter features an internal  
resistor divider that allows the device to output a  
fixed 10V when the BSTFB is left floating.  
Connecting the BSTFB pin to the tap of an  
external resistor divider between BSTOUT to  
ground otherwise sets the boost converter output  
voltage, where:  
R1+ R2  
VBSTOUT = VBSTFB  
Where VBSTFB = 1.23V.  
×
R2  
MP5414 Rev.1.12  
12/13/2012  
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MP5414—PMU FOR 3D GLASSES  
Figure 5—Flow Chart of Charger Operation  
MP5414 Rev.1.12  
12/13/2012  
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MP5414—PMU FOR 3D GLASSES  
Setting the LDO Output Voltage  
Selecting the LDO Input Capacitor  
The LDO output voltage can be also adjusted by  
using an external resistor divider (R3 and R4 in  
the Functional Block Diagram). However, the  
value of R3 and R4 in series should not exceed  
100kto minimize the impact on the internal  
resistor divider. To accurately set the output  
voltage, use 10k(±1%) for the low-side resistor  
(R4), and determine the value of the high-side  
resistor R3 using the following equation:  
For proper operation, place a ceramic capacitor  
(C4) between 1µF and 10µF of dielectric type  
X5R or X7R between the LDOIN pin and ground.  
Larger values in this range will help improve line  
transient response at the cost of increased size.  
Selecting the LDO Output Capacitor  
For stable operation, use a ceramic capacitor of  
type X5R or X7R between 1µF and 10µF for the  
LDOOUT capacitor, C6. Larger values in this  
range will help improve load transient response  
and reduce noise at the cost of increased size.  
Other dielectric types can be used, but their  
temperature-sensitivity can unduly influence their  
capacitances.  
VLDOOUT VLDOFB  
R3 = R4×  
VLDOFB  
Where VLDOFB is the OUT feedback threshold  
voltage equal to 1.222V.  
For example, for a 2.5V output  
To improve load transient response, add a small  
ceramic (X5R, X7R or Y5V dielectric) 100nF  
feed-forward capacitor in parallel with R3. The  
feed-forward capacitor is not required for stable  
operation.  
2.5V 1.222V  
R3 =  
=10.41kΩ  
1.222V  
10kΩ  
You can select a standard 10.5k(±1%) resistor  
for R3.  
Layout Considerations  
Proper layout of the high frequency switching  
path is critical to limit noise issues and  
electromagnetic interference. The circuit loop  
from BSTOUT pin, output capacitor to BSTGND  
pin is flowing with high frequency pulse current. It  
must be as short as possible. The BSTIN pin is  
the power supply input for the internal MOSFET  
switch gate driver and the internal control  
circuitry and requires decoupling. For the LDO,  
the input and output need bypass ceramic  
capacitors close to the LDOIN pin and LDOOUT  
pin respectively. Ensure all feedback connections  
are short and direct. Place the feedback resistors  
and compensation components as close to the  
chip as possible. Connect LDOIN, LDOOUT and  
especially LDOGND respectively to a large  
copper area to cool the chip to improve thermal  
performance and long-term reliability. See the  
MP5414 demo board layout for reference.  
The following table lists the selected standard R3  
values for correlated with their output voltages:  
Table 3—Adjustable LDO Output Voltage  
R3 Values  
R4 ()  
VLDOOUT (V)  
R3 ()  
232  
1.25  
1.5  
1.8  
2
2.26k  
4.75k  
6.34k  
10.5k  
13k  
2.5  
2.8  
3
10k  
14.7k  
16.9k  
22.6k  
30.9k  
3.3  
4
5
MP5414 Rev.1.12  
12/13/2012  
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21  
MP5414—PMU FOR 3D GLASSES  
PACKAGE INFORMATION  
QFN28 (4x5mm)  
2.50  
2.80  
3.90  
4.10  
23  
28  
PIN 1 ID  
PIN 1 ID  
MARKING  
SEE DETAIL A  
22  
1
0.50  
BSC  
PIN 1 ID  
INDEX AREA  
4.90  
5.10  
0.18  
0.30  
3.50  
3.80  
8
15  
14  
9
0.35  
0.45  
TOP VIEW  
BOTTOM VIEW  
PIN 1 ID OPTION A  
0.30x45º TYP.  
PIN 1 ID OPTION B  
R0.25 TYP.  
0.80  
1.00  
0.20 REF  
0.00  
0.05  
DETAIL A  
SIDE VIEW  
3.90  
2.70  
NOTE:  
1) ALL DIMENSIONS ARE IN MILLIMETERS.  
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.  
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.  
4) DRAWING CONFORMS TO JEDEC MO-220, VARIATION VGHD-3.  
5) DRAWING IS NOT TO SCALE.  
0.70  
0.25  
3.70 4.90  
0.50  
RECOMMENDED LAND PATTERN  
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third  
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not  
assume any legal responsibility for any said applications.  
MP5414 Rev. 1.12  
12/13/2012  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2012 MPS. All Rights Reserved.  
22  

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