MP28300GG-Z [MPS]
Switching Regulator,;
| 型号： | MP28300GG-Z |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, |
| 文件： | 总19页 (文件大小：1261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP28300
Ultra-Low 500nA Iq, Wide Input 2V-5.5V,
300mA Step-Down Regulator Plus300nA Iq,
2V-5.5V Input, 100mA LDO in 2x2 QFN
DESCRIPTION
FEATURES
The MP28300 is
management unit containing 300mA, high-
efficiency, step-down, switching converters and
a
monolithic power-
300mA Buck Switcher
o Ultra-Low Iq: 500nA
o Wide 2.0V to 5.5V Operating Input
Range
a
100mA LDO regulator. The nanoamp
quiescent current provides extremely high
efficiency when the load current is down in the
µA range. With minimum input voltage as low
as 2V, the MP28300 allows the system to
operate directly from the battery.
o 7 Selectable Output Voltages
o Up to 300mA Output Current
o 1.5MHz
Switching
Frequency
in
Continuous Conduction Mode (CCM)
o 100% Duty Cycle in Dropout
o 0.25Ω and 0.25Ω Internal Power
MOSFET Switches
o Cycle-by-Cycle Over-Current Protection
(OCP)
o Short-Circuit Protection (SCP) with
Hiccup Mode
The constant-on-time control scheme provides
fast transient response, high light-load
efficiency, and requires minimal capacitance.
The regulation can be made tight by integrating
an error amplifier to correct the output voltage.
An 100mA LDO regulator provides easy system
configuration with clean output voltage.
100mA LDO
o Ultra-Low Iq: 300nA
o 2.0V to 5.5V Operating Input Range
o 3 Selectable Output Voltages
o Over-Temperature Protection (OTP)
Available in
Package
The CTRL pins control the on/off and output
voltage selection functions.
Fault protection features include under-voltage
lockout (UVLO), over-current protection (OCP),
and thermal shutdown.
a
QFN-12 (2mmx2mm)
APPLICATIONS
The MP28300 requires a minimal number of
Wearables
IOT
Portable Instruments
readily
available,
standard,
external
components and is available in a small QFN-12
(2mmx2mm) package.
Battery-Powered Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS” and “The Future of Analog IC Technology” are
registered trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN1:
3.6V
L1
VOUT1
1.8V/300mA
SW1
VIN1
2.2µH
C1
C2
10µF
10µF
OUT1
CTRL1
CTRL2
CTRL3
PG1
MP28300GG
VIN2:
3.6V
VOUT2
1.8V/100mA
VIN2
OUT2
C3
1µF
C4
1µF
CTRL4
CTRL5
GND
MP28300 Rev.1.01
6/6/2017
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1
MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP28300GG
QFN-12 (2mmx2mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MP28300GG–Z)
TOP MARKING
EG: Product code of MP28300GG
Y: Year code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
OUT2 VIN2
12
11
OUT1
VIN1
SW
1
2
3
4
10
9
CTRL1
CTRL2
CTRL3
8
GND
PG1
7
5
6
CTRL4 CTRL5
QFN-12 (2mmx2mm)
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
Thermal Resistance (4) θJA
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage (VIN1/2).................................6V
VSW1 .................................... -0.3V to VIN + 0.3V
-0.3V (-5V for <10ns) to
θJC
QFN-12 (2mmx2mm) ............ 80.......16 ... °C/W
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
6V (8V for <10ns or 10V for <3ns)
All other pins.................................... -0.3V to 6V
Continuous power dissipation (TA = +25°C)
(2)
.............................................................1.6W
Junction temperature...............................150°C
Lead temperature ....................................260°C
Storage temperature................-65°C to +150°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions (3)
Supply voltage (VIN1/2)................. 2.0V to 5.5V
Operating junction temp...........-40°C to +125°C
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN1 = 3.6V, VIN2 = 3.6V, TJ = -40°C to +125°C , typical value is tested at TJ = 25°C. The limit over
temperature is guaranteed by characterization, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Buck Section
Input voltage range (5)
VIN1
2.0
5.5
V
V
Under-voltage lockout threshold
rising for buck
VIN1_UVLO_R
1.65
1.8
1.95
Under-voltage lockout threshold
hysteresis for buck
VIN1_UVLO_H
150
70
mV
nA
Supply current (shutdown)
ISD_25
CTRL1/2/3 = 0V, or EN = 0
No load, CTRL4/5 = 0V,
CTRL1/2/3 = H/L/H,
Supply current (quiescent)
IQ_BUCK
500
nA
OUT1 = 1.8V, not switching
High-side switch on resistance
Low-side switch on resistance
RDSON1_H
RDSON1_L
0.25
0.25
Ω
Ω
CTRL1/2/3 = 0V, VIN1 = 5.5V,
VSW = 0V and 5.5V, TJ = 25°C
Switch leakage current
ILK_SW1
ILIM1_H
ILIMV1_L
-100
480
300
0
100
720
nA
mA
mA
High-side current limit
600
400
Low-side switch valley current
(sourcing)
Low-side switch zero crossing
current
IZCD
0
20
mA
On time
Input voltage range for LDO (5)
TON
VIN2
VIN1 = 3.6V, VOUT = 1.8V
When VIN1 > VIN1_UVLO
280
2.0
330
380
5.5
ns
V
Minimum on time
TMIN_ON
TMIN_OFF
DMAX
60
ns
ns
%
Minimum off time
Maximum duty cycle (5)
100
100
CTRL1/2/3 = H/L/H,
TJ = 25°C, IOUT = 0.1A
1.782 1.800 1.818
Output voltage accuracy
VOUT
V
CTRL1/2/3 = H/L/H,
TJ = -40°C to 85°C, IOUT = 0.1A
1.773
-1
1.827
1
From 2.5V to 5.5V, from 0A to
300mA
Line/load regulation of buck (6)
%
MP28300 Rev.1.01
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN1 = 3.6V, VIN2 = 3.6V, TJ = -40°C to +125°C , typical value is tested at TJ = 25°C. The limit over
temperature is guaranteed by characterization, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
LDO Section
No load, CTRL1/2/3 = 0V,
Supply current (quiescent)
IQ_LDO
CTRL4/5 = L/H,
300
nA
no load current from VIN2
Supply current (shutdown)
Voltage dropout of LDO
Dropout resistance
ISD_25
VDP
CTRL4/5 = 0V, or EN = 0
ILDO = 0.1A, VOUT = 3.3V
50
50
nA
mV
Ω
RDP
0.5
200
Current limit of LDO
ILIM_LDO
150
mA
CTRL4/5 = L/H, TJ = 25°C,
1.782 1.800 1.818
CTRL4/5=L/H,TJ = -40°C to 85°C 1.773
Internal reference,
TA = -40°C to 85°C
1.827
DC output voltage accuracy
VOUT
V
0.591 0.600 0.609
Line regulation of LDO
Load regulation of LDO
IOUT = 1mA
0
%
%
IOUT = 1mA to 100mA
10Hz, IOUT = 100mA
100Hz, IOUT = 100mA
1kHz, IOUT = 100mA
-1
1
40
20
15
Power supply rejection ratio (6)
Both Buck and LDO
PSRR
dB
TSS
TSS
Buck
0.5
2
ms
ms
Internal soft-start time
LDO: VOUT = 3.3V, IOUT = 100mA,
Co = 1µF
Discharge resistance during
enable off
RDIS_OFF
50
Ω
CTRL high logic
CTRL low logic
CTRLH
CTRLL
1.2
V
V
0.4
VCTRL = 3.6V
VCTRL = 0
1
0
CTRL input current
ICTRL
nA
VEN = 0V
0
CTRL turn-on delay
TD
300
μs
Not present when CTRL is high
to avoid IQ impact
CTRL pull-down resistor
RPD
2
MΩ
Power good threshold
Power good hysteresis
Power good delay
PG
FB with respect to the regulation
90
10
75
%
%
PGHys
PGTD
μs
Power good sink current
capability
VPG_LO
Sink 1mA
0.4
10
V
Power good leakage current
Thermal shutdown (5)
Thermal hysteresis (5)
IPGLK
TSD
VPGBUS = 1.8V
nA
°C
°C
150
30
TSDHY
NOTES:
5) Guaranteed by design.
6) Data derived from bench characterization test.
MP28300 Rev.1.01
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH , CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH, CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH, CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH, CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH, CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN1 = 3.6V, VOUT1 = 1.8V, L1 = 2.2µH, CIN1 = 10µF, COUT1 = 10µF, VIN2 = 3.6V, VOUT2 = 1.8V, CIN2
1µF, COUT2 = 1µF, TA = +25°C, unless otherwise noted.
=
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin#
Name
Description
Output voltage sensing of the step-down switcher. Connect the load to OUT1. An
output capacitor is needed to decrease the output voltage ripple.
1
OUT1
Step-down switcher control signal. Adjust the step-down switcher output voltage value
dynamically. Do not float the CTRL pins during application. When used, ensure that the
CTRL voltage is not lower than VIN. If unused, tie CTRL to GND. Refer to Table 1 on page
14 to set the buck output value.
2
3
4
5
CTRL1
CTRL2
CTRL3
CTRL4
LDO control signal. Adjust the LDO output voltage value dynamically. Do not float the
CTRL during application. When used, ensure that the CTRL voltage is not lower than VIN.
If unused, tie CTRL to GND. Refer to Table 1 on page 14 to set the LDO output value.
6
CTRL5
7
8
PG1
Power good for the step-down switcher. PG1 is an open-drain output.
GND
Ground.
Switch output for the step-down switcher. SW is the drain of the internal, high-side, P-
channel MOSFET. Connect the inductor to SW to complete the converter.
9
SW
VIN1
VIN2
OUT2
Input supply voltage to the step-down switcher. Place a small decoupling capacitor as
close to VIN1 and GND as possible.
10
11
12
Input supply voltage to the LDO. Place a small decoupling capacitor as close to VIN2
and GND as possible.
Output voltage sensing of LDO. OUT2 is the output of the linear regulator. Bypass OUT2
to GND with a 1μF capacitor.
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
BLOCK DIAGRAM
VIN1
+
COMP
VTH
CTRL1
Ramp
-
+
PWM
Summer
CTRL2
CTRL3
Main
Switch
(PCH)
COMP
Buck
CTRL
-
-
E.A.
RST
Buck Control
+
PDRV
PWM
PWM
Sleep
Constant
-
On Time
SW
&
+
Sleep Mode
Synchronous
Rectifier
Low IQ
COMP
Driver
OUT1
(
NCH)
-
NDRV
Ref
&
Soft Start
Sleep
+
COMP
-
Z
Hi
GND
-
PG Control
PG1
Sleep
LDO Control
OUT2
-
COMP
Sleep Mode
OCP
+
CTRL4
CTRL5
OUT2
LDO
CTRL
Main
Switch
+
-
E.A.
VIN2
Figure 1: Functional Block Diagram
MP28300 Rev.1.01
6/6/2017
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
light-load mode, the output voltage drops during
the exit transition. The LDO exits light-load
mode after a load of >20mA.
OPERATION
The MP28300 has an ultra-low, quiescent
current, step-down converter and low-dropout
regulator. The step-down converter has 500nA
of IQ current, allowing the MP28300 to achieve
extremely high efficiency at an ultra-low load
current. The 300nA low-IQ LDO provides easy
system configuration.
Control (CTRL)
CTRL1/2/3 are used to control start-up and set
the output voltages of the step-down regulator.
When CTRL1/2/3 are low, the step-down
switcher of the MP28300 is disabled. Once
either one of CTRL1/2/3 are pulled high, the
switcher is enabled. The output voltage is set
depending on which CTRL pin is pulled high.
This applies for CTRL4/5 for the low-dropout
regulator as well. The output voltage is
programmable according to Table 1.
Constant-On-Time Control of the Buck
The MP28300 use a constant-on-time control
scheme to implement output voltage regulation.
The one-shot on-timer is controlled by the input
and output voltages. At different input and
output voltage conditions, the switching
frequency is fairly stable, which helps with
system design. The switching frequency is
around 1.5MHz, typically. With constant-on-time
control, the output ripple is small, and the load
transient response is fast. Constant-on-time
control minimizes the input and output
capacitors. The MP28300 enters pulse-skip
mode automatically when the low-side switch
current reaches the zero ampere threshold.
Pulse-skip mode helps improve light-load
efficiency. The constant-on-time control scheme
provides a seamless transition from pulse-width
modulation (PWM) mode to pulse-frequency
modulation (PFM) mode and vice versa.
Table 1: CTRL vs. Output Voltages
Step-Down Switcher
CTRL3
CTRL2
CTRL1
OUT1
Disabled
0.8V
1.0V
1.2V
1.5V
1.8V
2.5V
3.3V
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
LDO
CTRL5
CTRL4
OUT2
Disabled
1.3V
1.8V
3.3V
0
0
1
1
0
1
0
1
Light-Load Operation
When the load current decreases and the low-
side switch current reaches the zero ampere
threshold, both the high-side and low-side
switches are turned off. Output energy is
provided by the output capacitors during this
period until the output voltage drops, reaches
the regulation voltage, and triggers another on
pulse.
The output voltage can be programmable
during operation and supports dynamic output
voltage scaling. CTRL cannot be floating. Any
used CTRL voltage cannot be less than VIN,
and any unused CTRL pin must be tied to GND.
Soft Start (SS)
When the converter is enabled, the internal
reference is powered up. After a certain delay
time, the device enters soft start (SS). The step-
down switcher output voltage ramps up to the
regulation voltage in around 0.5ms. The LDO’s
SS time is about 2ms when VOUT2 is 3.3V and
COUT2 is 1μF.
Generally, the switching frequency in PFM
mode depends on the load current. The
switching frequency is lower when the load
current is lighter. With PFM control at light-load
mode plus the ultra-low quiescent operation
current, the MP28300 can achieve the highest
efficiency at an extremely low load. This helps
extend the charge cycle of any battery-powered
system.
Power Good (PG) Indicators of the Buck
The MP28300 has an open-drain output power
good (PG) indicator with a maximum RDS(ON) of
less than 400Ω. PG requires an external pull-
up resistor (100kΩ~500kΩ) for the power good
When the buck works in light-load operation, it
needs at least 5µs to exit light load. When a
large, quick, and sharp load increase occurs in
MP28300 Rev.1.01
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
indicator. This resistor can be pulled up to VIN
or tied to CTRL if the CTRL voltages do not
need to be adjusted dynamically.
the high-side switch is not allowed to turn on
again.
If the current of the LDO reaches the current
limit, the LDO current clamps the current at the
current limit level, and the output regulation is
lost.
The PG comparator is active when the device is
enabled. It is driven to a high impedance once
the output voltage trips the PG threshold (90%
of the regulation voltage, typically) and is pulled
low once the output voltage falls below the PG
hysteresis threshold (80% of the regulation
voltage, typically). The output is also pulled low
if the input voltage is lost or the part is disabled.
Short Circuit and Recovery
If the output voltage of the buck converter is
shorted to GND, the current limit is triggered. If
the current limit is triggered every cycle for
200µs continuously, the MP28300 enters
hiccup mode for the buck converter. The short-
circuit condition can also be triggered when the
output voltage is lower than 50% of the
regulation output voltage and when the current
limit is hit simultaneously. The buck disables
the output power stage, discharges the output
voltage, and then attempts to recover after a
hiccup. If the short-circuit condition remains, the
MP28300 repeats this operation until the short
circuit is removed and the output rises back to
regulation levels.
Output Discharge Function
Both the step-down regulator and the LDO
feature the output discharge function once they
are disabled. This feature prevents residual
charge voltages on the capacitors, which may
impact a proper power-up of the system. When
the input voltage is high and the related
converters are disabled, the output discharge is
active.
100% Duty Cycle Mode
When the input voltage reduces and is lower
than the regulation output voltage, the output
voltage drops, and the on time increases.
Further reducing the input voltage drives the
MP28300 into 100% duty cycle mode. The
high-side switch is always on, and the output
voltage is determined by the loading current
times the RDS(ON) composed by the high-side
switch and inductor.
When a short circuit occurs in the LDO, the
mechanism is similar to the current limit
condition. The current is clamped at the current
limit level.
Thermal Shutdown Circuit and Recovery
When the thermal shutdown signal is triggered,
the MP28300 turns off and restarts until the
temperature falls below the thermal hysteresis.
LDO Operation
The low-dropout regulator is enabled when at
least one of CTRL4 or CTRL5 is high and the
input voltage (VIN1) is higher than the UVLO
threshold. CTRL4 and CTRL5 can be
programmed to select one of three preset
output voltages.
Current Limit
The MP28300 has an internal current limit for
the step-down converter and LDO converter.
The high-side switch current is monitored cycle-
by-cycle and compares with the current-limit
threshold. Once the current-limit comparator is
triggered, the high-side switch is turned off and
the low-side switch is turned on, reducing the
inductor current. Until the low-side switch
current is lower than the low-side current limit,
MP28300 Rev.1.01
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MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
Estimate the RMS current in the input capacitor
with Equation (3):
APPLICATION INFORMATION
Inductor Selection
VOUT
VOUT
1
Most applications work best with a 1µH to
2.2µH inductor. Select an inductor with a DC
resistance less than 200mΩ to optimize
efficiency.
IC1 ILOAD
(3)
V
V
IN
IN
The worst-case scenario occurs at VIN = 2VOUT
,
shown in Equation (4):
High-frequency, switch-mode power supplies
with a magnetic device have strong electronic
magnetic inference for the system. Any
unshielded power inductor should be avoided
since it has poor magnetic shielding. Metal alloy
or multiplayer chip power shield inductors are
recommended for the application since they can
decrease influence effectively. Table 2 lists
some recommended inductors.
ILOAD
IC1
(4)
2
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality, 0.1μF,
ceramic capacitor as close to the IC as possible.
When using ceramic capacitors, ensure that
they have enough capacitance to provide a
sufficient charge to prevent excessive voltage
ripple at the input. The input voltage ripple
caused by capacitance can be estimated with
Equation (5):
Table 2: Recommended Inductors
Manufacturer
Inductance
Package Manufacturer
P/N
DFE201612P-
2R2M
2.2µH
2.2µH
2016
2012
the
Tokyo
Wurth
74479775222A
For
most
designs,
inductance
ILOAD VOUT
V
value can be calculated with Equation (1):
OUT
IN
(5)
V
1
IN
fS C1
VIN
V
VOUT (V VOUT
)
IN
(1)
L1
Output Capacitor Selection
V IL fOSC
IN
The output capacitor limits the output voltage
ripple and ensures a stable regulation loop.
Select an output capacitor with low impedance
at the switching frequency. For most
applications, a 10µF capacitor is sufficient.
Estimate the output voltage ripple with Equation
(6):
Where ∆IL is the inductor ripple current.
Choose the inductor current to be
approximately 30% of the maximum load
current. The maximum inductor peak current
can be calculated with Equation (2):
IL
2
(2)
IL(MAX) ILOAD
VOUT
VOUT
1
(6)
VOUT
1
RESR
fS L1
V
8 fS C2
IN
Input Capacitor Selection
Where L1 is the inductor value, and RESR is the
equivalent series resistance (ESR) value of the
output capacitor. When using ceramic
capacitors, the capacitance dominates the
impedance at the switching frequency and
causes most of the output voltage ripple. For
simplification, the output voltage ripple can be
estimated with Equation (7):
The input capacitor reduces the surge current
drawn from the input and the switching noise
from the device. Select an input capacitor with a
switching frequency impedance less than the
input source impedance to prevent high-
frequency switching current from passing to the
input source. Use low ESR ceramic capacitors
with X5R or X7R dielectrics with small
temperature coefficients. For most applications,
a 10μF capacitor is sufficient.
VOUT
V
(7)
ΔVOUT
1
OUT
IN
2
8 fS L1 C2
V
The input capacitor requires an adequate ripple
current rating since it absorbs the input
switching current.
The characteristics of the output capacitor also
affect the stability of the regulation system.
MP28300 Rev.1.01
6/6/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
16
MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
PCB Layout Guidelines
Efficient PCB layout of the switching power
supply and especially the high-switching
frequency converter is critical for stable
operation. If the layout is not carefully done, the
regulator could show poor line or load
regulation and stability issues. For best results,
1) Place the input capacitor as close to the IC
pins as possible for the high speed step-
down regulator to provide clean control
voltage for the chip.
2) Place the CIN1 close to VIN1 and GND to
absorb noise.
refer to Figure 2 and follow the guidelines below.
GND
GND
Vout2
Vin2 Vin1
OUT2
12
VIN2
11
1
2
3
4
10
9
OUT1
CTRL1
CTRL2
CTRL3
VIN1
SW
GND
Lout
8
GND
Bottom Layer
SW
PG1
7
Top Layer
Via
5
6
Co1
CTRL4 CTRL5
Vout1 sense
Bottom Layer
GND
GND
Vout1
PG
Figure 2: Recommended PCB Layout
MP28300 Rev.1.01
6/6/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
17
MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
VIN1:
2.0V to 5.5V
VOUT1
1.8V/300mA
L1
SW1
VIN1
2.2µH
C1
C2
10µF
10µF
OUT1
CTRL1
R1
100kΩ
CTRL2
CTRL3
PG1
MP28300GG
VIN2:
2.0V to 5.5V
VOUT2
1.8V/100mA
VIN2
OUT2
C3
1µF
C4
1µF
CTRL4
CTRL5
GND
Figure 3: Typical Application Circuit for MP28300GG
NOTE: VIN1 and VIN2 supply power dependently, VIN1 must be more than the VIN UVLO.
VIN1:
3V to 5.5V
VOUT1
2.5V/300mA
L1
2.2µH
SW1
VIN1
C1
C2
10µF
10µF
OUT1
CTRL1
CTRL2
CTRL3
R1
100kΩ
PG1
MP28300GG
VOUT2
VOUT1
1.8V/100mA
VIN2
OUT2
C3
1µF
C4
1µF
CTRL4
CTRL5
GND
Figure 4: Buck and LDO in Sequence
NOTE: CTRL4/5 must connect to VIN1 in sequence.
MP28300 Rev.1.01
6/6/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
18
MP28300 – ULTRA-LOW IQ STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN-12 (2mmx2mm)
PIN 1 ID
0.15X45º TYP
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
0.15X45º
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
3) JEDEC REFERENCE IS MO-220.
4) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP28300 Rev.1.01
6/6/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
19
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