MP2625BGL [MPS]
2A Switching Charger with NVDC Power Path Management For Single Cell Li Battery;
| 型号： | MP2625BGL |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 2A Switching Charger with NVDC Power Path Management For Single Cell Li Battery 电池 |
| 文件： | 总31页 (文件大小：1203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP2625B
2A Switching Charger with NVDC
Power Path Management
For Single Cell Li+ Battery
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2625B is a monolithic switch mode
battery charger with power path management
for single-cell Li-ion batteries in a wide range of
tablet and other portable devices. It integrates a
synchronous BUCK regulator to provide
regulated voltage for powering the system
output and at the same time charging the
battery. This device supports both USB and
high power DC adapter input. In USB mode, the
input current limit can be programmed to
450mA or 825mA via the logic pins to cover the
USB2.0 and USB3.0 specifications. When the
adapter input is present, the input current can
also be limited in order to avoid overloading of
the DC adapter. Input current limit can be
programmed up to 2A.
4V to 10V Operating Input Voltage
Smart Power Path Management
Five Control Loops: Input Current Limit,
Input Voltage Limit, Constant Charge
Current, Terminal Battery Control and
Thermal Fold-Back.
1.6MHz Switching Frequency
Programmable Input Current Limit
Programmable Charge Current
Single Input for USB and AC adapter
Cover USB2.0 and USB3.0 Input
Specification
Fully Integrated Power Switches
No External Blocking Diode and Sense
Resistor Required
Charging Operation Indicator
Built-in Programmable Charging Timer
Thermal Limiting Regulation on Chip
Battery Temperature Monitor
Tiny Package Features Small Size
The smart power path management allows
MP2625B to regulate the system voltage for
powering an external load and charging the
battery independently and simultaneously. This
allows immediate system operation even under
missing or deeply discharged battery. When the
input current limit is reached, the system load is
satisfied in priority, then the charger will take
the remaining current to charge the battery.
Additionally, the smart power path control
allows an internal connection from battery to the
system in order to supplement additional power
to the load in the event the system power
demand increases over the input limited power
or the input is removed.
APPLICATIONS
Smart Phone
E-Book
GPS
Portable Media Player
Portable Hand-held Solution
Tablet PC
All MPS parts are lead-free, halogen free, and adhere to the RoHS
directive. For MPS green status, please visit MPS website under Quality
Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered
Trademarks of Monolithic Power Systems, Inc.
The MP2625B features high integration with all
the power switches integrated inside. No
external MOSFET, blocking diodes, or current
sense resistor is required.
Two status monitor output pins are provided to
indicate the battery charge status and power
source status. Other features include trickle
charge, battery temperature monitoring, timer
and thermal limiting regulation on chip.
MP2625B is available in QFN 3mmx4mm
package.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
1
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL APPLICATION
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
2
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP2625BGL
QFN-20 (3mmx4mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MP2625BGL–Z);
TOP MARKING
MP: MPS prefix
Y: year code
W: week code
2625B: part number
LLL: lot number
PACKAGE REFERENCE
TOP VIEW
QFN-20 (3mmx4mm)
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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3
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
PIN FUNCTIONS
Package
Pin #
Name Description
Bootstrap. A capacitor is connected between SW and BST pin to form a floating supply
across the power switch driver to drive the power switch’s gate above the supply voltage.
1
BST
3
2,4
5
IN
Power input of the IC from adapter or USB.
SW
Switch output.
PGND Power ground.
_____
Function logic control pin of the IC. Logic low to enable the part and logic high to disable the
part.
6
EN
7
8
M0
M1
Mode Select Input Pin, in combination with M1 pin, setting the input current limit mode.
Mode Select Input Pin, in combination with M0 pin, setting the input current limit mode.
_____________
Open drain output. It is pulled low during charging. And it is pulled high through an external
resistor to VCC to indicate charge completed.
9
CHGOK
Open drain output. It is pulled low to indicate the presence of a valid input power supply.
Otherwise, it is pulled high through an external resistor to VCC to indicate invalid input or
removed input.
__________
10
ACOK
11
12
AGND Analog ground.
SYS voltage program pin. Connect a resistor divider from the pin to SYS and AGND to
SYSFB
program the system output voltage. Leave the pin float to disable the function.
13
14
SYS DC-DC regulator output to power the system load and charge the battery.
BATT Positive battery terminal.
Charge current program pin. A resistor from the pin to AGND can program the charge
current during CC charge. Float the pin will disable the charge function.
15
16
17
ISET
Thermistor input. Connect a resistor from this pin to VCC and the thermistor from this pin to
ground. The thermistor is usually inside the battery pack.
NTC
Input current limit program pin. A resistor from the pin to AGND can program the input
current limit with adapter input.
ILIM
18
19
20
TMR Set timer out period. Connect TMR pin to AGND to disable the internal timer.
VLIM Input voltage clamp program pin.
VCC Supply voltage of the IC.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
ABSOLUTE MAXIMUM RATINGS (1)
IN, SW .........................................-0.3V to +20V
BATT, SYS .....................................-0.3V to +6V
BST...............................................-0.3V to +26V
All Other Pins..................................-0.3V to +6V
Thermal Resistance (4)
QFN-20 (3mmx4mm)..............48...... 11... C/W
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
(2)
Continuous Power Dissipation (TA = +25°C)
QFN20 3mmx4mm..................................... 2.6W
Junction Temperature...............................150C
Lead Temperature ....................................260C
Storage Temperature.................–65°C to 150°C
Recommended Operating Conditions (3)
Supply Voltage VIN ...........................4.0V to 10V
Operating Junction Temp. (TJ).... -40°C to +125°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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5
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
ELECTRICAL CHARACTERISTICS
VIN = 5.0V, TA = 25C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Input Power (IN)
IN Operating Range
VIN
4.0
3.65
3.35
240
40
10
V
V
Rising
Falling
Rising
Falling
3.8
3.5
280
70
3.95
3.65
320
120
IN Under Voltage Lockout
Threshold
V
mV
mV
IN vs. BATT Threshold
Rising
VBST-VSW
2.7
2.55
1.4
2.9
2.75
1.6
3.1
2.95
1.8
V
V
BST Voltage Threshold
Switching Frequency
Falling
MHz
USB2.0 Mode
400
750
450
825
500
900
mA
mA
mA
USB3.0 Mode
Default Mode
Input Current Limit
IIN
1840
2000
2160
Programmable Mode,
RILIM=23k
1840
1.1
2000
1.14
2160
1.18
mA
V
Input Current Limit Reference
Voltage
VILIM
High-side NMOS On Resistance
Low-side NMOS On Resistance
RH DS(ON) Include the BLOCK FET
RL_DS(ON)
120
80
130
100
mΩ
mΩ
High-side NMOS Peak Current
limit
3.0
4.0
1.52
2.4
5.0
1.55
5
A
V
Input Voltage Clamp Threshold
VVLIM
Voltage on VLIM
1.49
Charger Enabled, USB2.0
Mode
mA
Charger Enabled, USB3.0
Mode
2.8
3.8
5
5
mA
mA
Input Quiescent Current
IIN
Charger Enable,
Programmable Mode
Charger Enabled, Default
Mode
3.8
3
5
5
mA
uA
uA
Disabled, EN=0V
SYS to IN reverse current
blocking
SYS=SW=4.5V,VIN=0V,
monitor VIN leakage
0.01
0.2
SYS Output
SYS voltage @ VBATT≤3.4V,
SYSFB float
Minimum SYS Regulation Voltage
VSYS
3.45
3.5
3.6
3.75
V
V
3.4V<VBATT≤4.2V, SYSFB float
BATT Float
VBATT
0.2V
+
4.5
4.4
SYS Regulation Voltage
SYS Reference Voltage
VSYS
User Programmed by SYSFB
4.08
V
V
VSYS_REF
1.135
1.152 1.170
MP2625B Rev. 1.01
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1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5.0V, TA = 25C, unless otherwise noted.
Parameters
Symbol Condition
Min
4
Typ
Max
Units
VIN=0V, ISYS=200mA,
VBATT=4.2V
BATT to SYS Resistance
0.04
0.05
Ω
VSYS>VBATT–800mV,
VBATT=4.2V
5
6
A
BATT to SYS Current Limit
SYS short
230
mA
Battery Charger
V
BATT>VRECH, ICHG≤IBF,
4.168
4.2
4.232
V
V
SYSFB float
Terminal Battery Voltage
VBATT
VSYS
0.04 x
IBF
-
VSYS<4.2V Programmed
by SYSFB Pin
SYSFB Float
3.9
4.0
3.95
85
4.1
V
V
Recharge Threshold at VBATT
VRECH
SYSFB programmed
3.85
4.05
Recharge Hysteresis
mV
V
Trickle Charge Threshold
Trickle Charger Hysteresis
Trickle Charge Current
Termination Charger Current
2.9
5%
3
3.1
200
10%
10%
mV
ICC
ICC
ITRICKLE
IBF
15%
200
IBF Maximum Limit
150
mA
RISET=1.05k
RISET=1.53k
RISET=4.6k
1.8
1.26
0.405
1.1
2.0
1.4
2.2
1.54
0.495
1.2
A
A
A
V
V
V
Constant Current Mode Charge
Current
ICC
0.45
1.15
2.6
ISET Reference Voltage
Battery UVLO
Rising
Falling
2.4
2.8
2.2
2.4
2.6
VBATT
65mV
-
Idea Diode Regulation Voltage
BATT Leakage Current
VSYS
IBATT
Supplement Mode
mV
µA
VBATT=4.2V, SYS float,
20
30
VIN=PGND
__________ _____________
ACOK, CHGOK
__________ _____________
ACOK, CHGOK Pin Output Low
Voltage
__________ _____________
Sinking 5mA
270
0.1
350
0.5
mV
uA
Connected to 3.3V
ACOK,CHGOKPin Leakage Current
Timer
Trickle Charge Time
Total Charge Time
CTMR=0.1µF, ICHG=1A
CTMR=0.1µF, ICHG=1A
45
Min
6.5
Hour
MP2625B Rev. 1.01
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1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5.0V, TA = 25C, unless otherwise noted.
Parameters Symbol Condition
Negative Temperature Coefficient (NTC) Control
Min
Typ
Max
Units
NTC Low Temp Rising Threshold
VTHL
RNTC=NCP18XH103F 0°C
63
65
35
67
%VCC
mV
Hysteresis on Low Temp
Threshold
NTC High Temp Falling
Threshold
VTHH
RNTC=NCP18XH103F, 50°C
32
33.5
70
35
%VCC
mV
Hysteresis on High Temp
Threshold
VCC Supply
Rising
3.15
2.8
3.35
3
3.55
3.2
V
V
VCC UVLO
Falling
VCC Output Voltage
0mA<IVCC<25mA, VIN=6V
4.3
4.5
40
4.6
V
VCC Output Current Limit
mA
Logic
0.4
8
V
V
EN Input Low Voltage
EN Input High Voltage
1.5
4
EN =4V
μA
EN Input Current
M0, M1
-0.5
1.5
-0.1
EN =0V
Logic High
Logic Low
V
V
0.4
Protection
Thermal Limit Temperature
Thermal Shutdown
120
150
°C
°C
MP2625B Rev. 1.01
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1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5.0V, VBATT = Full Range, Default Mode, IIN Limit=2A, VSYS=4.4V, R6 and R7 are float, ICHG=2A,
VIN Clamp=4.5V, L = 1.2 µH, TA = +25ºC, unless otherwise noted.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
9
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = Full Range, Default Mode, IIN Limit=2A, VSYS=4.4V, R6 and R7 are float, ICHG=2A,
VIN Clamp=4.5V, L = 1.2 µH, TA = +25ºC, unless otherwise noted.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
10
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = Full Range, Default Mode, IIN Limit=2A, VSYS=4.4V, R6 and R7 are float, ICHG=2A,
L = 1.2 µH, TA = +25ºC, unless otherwise noted.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = Full Range, Default Mode, IIN Limit=2A, VSYS=4.4V, R6 and R7 are float, ICHG=2A,
L = 1.2 µH, TA = +25ºC, unless otherwise noted.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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© 2018 MPS. All Rights Reserved.
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = Full Range, Default Mode, IIN Limit=2A, VSYS=4.4V, R6 and R7 are float, ICHG=2A,
L = 1.2 µH, TA = +25ºC, unless otherwise noted.
MP2625B Rev. 1.01
1/15/2018
www.MonolithicPower.com
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13
MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
OPERATION
BST
IN
HSG
SYSFB1
EAO
EA
EA
3.6V
L
Converter
control
Max(A,B)
SW
SYS
VBATT+200mV
Driver
1
0
M
Input current
limit reference
selector
C
LSG
Iref
M
EAO
SYSFB
VBG
VREF
SYSFB
SYS
SYSFB
EA
ILIM
SYSFB1
VLIM
1.5V
mO
4 0
VBATx 2
Charge
Pump
VIN
Ideal diode
regulation
VTH
SYS
Battery switch
current limit
BATT
BATT
EN
3.5 V coarse
LDO &
EN
3.0 V UVLO
CC/ CV linear
charger
BATTFB
BATTFB
VBG
VREF_CC
VCC
Bandgap
& Bias
VBG
EN
4.5 V LDO
Charger Control & Chip Logic
UVLO
3.8 V UVLO
VIN
ISET
CHGOK
ACOK
TMR
NTC
GND
Figure 1: Function Block Diagram
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
the combination of the system load and battery
charger. The regulator contains input current
Introduction
The MP2625B is a switching charger IC, with
integrated smart power path management for
powering the system and charging a single cell
battery simultaneously and independently.
measurement and control scheme to ensure the
average input current remains below the level
programmed via ILIM pin or logic inputs M0&M1.
This meets the adapter capacity limit or stays in
compliance with USB specification.
The MP2625B includes a high-voltage (up to 10V)
input DC-DC step down converter for wide range
of DC sources and USB inputs. It has precision
average input current limit to make maximum use
of the allowable input power. This feature allows
fast charging when powering from an USB port,
and ensures the input current never exceeds the
input power specification especially when the
input power comes from a USB port. Additionally,
the input current limit threshold can be
programmed by logic inputs or a resistor to
ground from the ILIM pin.
When the input voltage is higher than UVLO and
280mV higher than the battery voltage, input
——————
voltage OK signal is active (ACOK turns low) and
the DC-DC converter soft-starts. If the input
power is sufficient to supply the combination of
the system load and battery charger, and the
input current limit loop is not triggered. The
converter output voltage VSYS will be regulated:
1) If BATT>3.4V, VSYS is approximately 0.2V
above the battery voltage to minimize the power
loss of the battery charger during fast charging.
The MP2625B implements an on-chip 40mꢀ
MOSFET which works as a full-featured linear
charger with trickle charge, high accuracy
constant current and constant voltage charge,
charge termination, auto recharge, NTC monitor,
built-in timer control, charge status indication,
and thermal protection. The charge current can
be programmed by an external resistor
connected from the ISET pin to AGND. The IC
limits the charge current when the die
temperature exceeds 120°C.
2) If BATT<3.4V, VSYS is fixed at 3.6V to power
the system immediately even when a drained
battery is inserted to be charged. Figure 2 shows
the relationship of VSYS vs. VBATT.
System voltage can also be regulated to any
value between 4.08V to 4.4V by using a resistor
divider on the SYSFB pin. This is shown as R6
and R7 in Figure 10. If the SYSFB is left floating,
the system program is invalid, and VSYS is
regulated as Figure 2.
The 40mꢀ MOSFET works as an ideal diode to
connecting the battery to the system load when
the input power is not enough to power the
system load. When the input is removed, the
40mꢀ MOSFET is turned on allowing the battery
to power up the system.
The converter adopts fixed off-time control to
extend the duty cycle (close to 100%) when the
input of the converter is close to VSYS.
4.4V
4.2V
With smart power path management, the system
load is satisfied in priority then the remaining
current is used to charge the battery. The
MP2625B will reduce charging current or even
use power from the battery to satisfy the system
load when its demand is over the input power
capacity.
VSYS
200mV
3.6V
VBATT
Figure 1 shows the function block diagram of
MP2625B.
3.4V
4.2V
DC-DC Step Down Converter
Figure 2: SYS Regulation Output
The DC-DC converter is a 1.6MHz step-down
switching regulator to provide the input power to
the SYS, which drives
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
Close to 100% duty operation, BST refresh
to control the operation duty. In this mode, the
input voltage will be clamped according to the
value set by the resistor divider. The control to
the system voltage and charge current is the
same as the one explained in the input current
limit. Charge current drops down to satisfy the
system current request first. This feature
provides a second protection to the input power
and ensures the safe operation of the input
adapter. Even if a wrong adapter is inserted, the
MP2625B can continue operation, providing the
maximum power to its load. User can program
the input voltage limit value through the resistor
divider from IN to VLIM to AGND.
operation makes sure the driver voltage of the
HS will be charged by turning on the LS until
negative IL hit to a threshold. If the input power is
insufficient to supply the combination of the
system load and battery charger, the DC-DC
converter will limit the total power requirement by
restricting the input voltage, input current and the
peak current through the MOSFET. The power
path management will reduce the charge current
to satisfy the external system load in priority.
According to this feature, the USB specification is
always satisfied first. Even if the charge current is
set larger than the USB input current limit, the
real charge current will be reduced as needed.
Peak Current Limit: The peak current of the high
side switch of the DC-DC converter is sensed
during every cycle, it is compared to the
reference 4A, if the peak current hits the
threshold, the peak current limit mode is
triggered. The control of the charge current is the
same with the above two limits.
Input Limit State
If the input power is insufficient to supply the
combination of the system load and battery
charger, the MP2625B implements three input
limit control loops to reduce the charge current
and satisfy the external system load in priority.
The input in this case might be limited as follows:
input current limit, input voltage limit and DC-DC
peak current limit.
Input Current Limit Setting
The current at ILIM is a precise fraction of the
adapter input current. When a programming
resistor is connected from ILIM to AGND, the
voltage on ILIM represents the average input
current of the PWM converter. And the input
current approaches the programmed limit, ILIM
voltage reaches 1.14V.
Input Current Limit: When the input current is
higher than the programmed input current limit
the input current limit loop takes the control of the
converter and regulates the input current at
constant value. When the battery voltage is over
3.4V, the output voltage (VSYS) will drop down
according to the increase of the system current,
and the charge current drops down after the
BATT-to-SYS switch (40mꢀ MOSFET) is fully on
according to VSYS dropping down. During this
process, the system voltage is slightly higher
than VBATT. When the battery voltage is lower
than 3.4V, to maintain the minimum system
voltage and ensure the system operation, the
input current limit control will pull down the
charge current directly to reduce the load of the
converter so that the system current is satisfied
in priority.
The average input current limit can be set
through the resistor connecting from ILIM to
AGND according to the following expression:
40000
IIN_LIM=1.14
(mA)
RILIM(kꢀ)
When USB input, the input current limit is set
internally and the programmed value is invalid.
The MP2625B provides typical of 450mA input
current limit for USB2.0 specification and a
typical of 825mA for USB3.0 specification
respectively.
Input Voltage Limit: A resistor divider from IN pin
to VLIM pin to AGND is used for the input voltage
limit control. When the voltage on VLIM pin hits
the reference voltage of 1.52V, the output of the
input voltage limit error amplifier will drop in
The user can choose to set the input current limit
through the two logic pins M0 and M1 as shown
in Table 2 according to its input specification.
When both M0 and M1 are float, they are pulled
to the logic high, under this condition, the input
current is limited to a default value of 2A.
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
low, the battery can be charged at full constant
current.
Table 1: Input Current Limit Setting
M0
Low
Low
M1
Low
High
Mode
USB2.0 Mode
USB3.0 Mode
When the battery voltage reaches the battery full
threshold, the charger enters the “constant
voltage mode” operation.
High
Low
Programmable Mode
End of Charge (EOC) and Indication
High/Float High/Float Default Mode
In constant voltage charge mode, the battery
voltage is regulated at 4.2V (when SYSFB is float
or SYS is programmed higher than battery full
threshold) and the charge current decreases
naturally. Once the charge current hits the
battery full threshold IBF (1/10 programmed
charge current), the battery is fully charged and
charge cycle is terminated.
Input Voltage Limit Setting
The input voltage can be limited at a value set by
a resistor divider from IN pin to VLIM pin to
AGND according to the following expression
(Typical Application Circuit):
R1+R2
VIN_LIM=1.52
(V)
R2
If the charge current drops below IBF because of
any limit condition, the MP2625B will come out of
CV mode, and the charge full detection is invalid.
When the voltage on VLIM pin drops and hits the
reference voltage 1.52V, the input voltage will be
clamped to the setting value.
A safe timer starts at the beginning of each new
charge cycle and it monitors if the whole charge
period is within the programmed time limit. After
each charge cycle, when the battery is indicated
as full, the timer counter will be reset. If the time
is expired while the charging is still on going, the
Battery Charger
The MP2625B completes charge operation
consist of trickle charge, automatic charge
termination, charge status indication, timer
control, NTC indication, automatic recharge, and
thermal limiting.
timer will force the MP2625B to terminate
_____________
charging CHGOK is blinking to indicate the fault
condition.
When the PWM converter is out of soft start, the
battery charge cycle begins, the MP2625B first
determines if the battery is deeply discharged. If
the battery voltage is lower than the trick charge
threshold (typical 3.0V), the battery charger starts
in “trickle charge mode”. The trickle charge
current is limited to 10% of the programmed
charge current until the battery voltage reaches
3.0V. If the charge stays in the “trickle charging
mode” for longer than “trickle charge timer
If system voltage is programmed lower than 4.2V
by the resistor divider at the SYSFB pin, the
battery will be charged most close to VSYS until
the charge current reaches the IBF threshold.
Automatic Recharge
Once the battery charge cycle is completed, the
MP2625B turns off indicating the battery full
status. During this process, the battery power
may be consumed by the system load or self
discharge. If the input power is always on, to
ensure the battery not to be exhausted, the new
charge cycle will automatically begin when the
battery voltage falls below the auto-recharge
threshold VRCHG which is typically 4V when the
SYSFB is float, and 50mV lower if the SYSFB is
connected to a resistor divider. The timer will re-
start when the auto-recharge cycle begins.
period”, the “timer out” condition is triggered, the
_____________
charge is terminated and CHGOK will start
blinking to indicate that the battery is
unresponsive. When the battery voltage is above
3.0V, the charger is operating at “constant
current mode.” The current delivered to the
battery will try to reach the value programmed by
the ISET pin. Depending on the available input
power and system load conditions,
the battery charger may or may not be able to
charge at the full programmed rate. The system
load is always satisfied first over the battery
charge current. If the system load requirement is
During the charge off state when the battery is
fully charged, if the input power is recycled, or
the EN signal is refreshed, the charge cycle will
re-start and the timer will refresh even if the
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
battery voltage is above the auto-recharge
threshold.
VBATT-40mV
Enable Ideal Diode Mode
Disable Ideal Diode Mode
Charge Current Setting
VSYS
The charge current of the MP2625B is
programmed using a single resistor from ISET
pin to ground. The program resistor and charge
current are calculated using the following
equations:
VBATT+40mV
Figure 3: Ideal Diode Mode Enable/Disable
Logic Control
1800
ICHG 1.15
(mA)
RSET(k)
The MP2625B has two separate enable control
pins.
At either constant current mode or constant
voltage mode, the voltage at the ISET pin is
proportional to the actual charge current
_____
EN is a logic control pin that controls the
_____
operation of the whole IC. When EN is low, the
delivered to the battery, IBATT. The charge current
can be calculated by monitoring the ISET pin
voltage with the following formula:
IC is enabled and the PWM converter output
_____
powers the system and the charger. When EN is
high, both the PWM converter and the charger
are disabled. The BATT to SYS switch turns fully
on to connect the battery to power the system.
VISET
IBATT
=
×ICHG
1.15
The ISET pin can be also used to control the
operation of the charger. Setting ISET pin floating
will disable the charger function while the output
of PWM converter will continue supply power to
system. On the other hand, a resistor from ISET
to AGND will enable the charging at the
programmed charge current.
Additionally, the actual battery charge current
may be lower than the programmed current due
to limited input power available and prioritization
of the system load.
Battery charge full current threshold IBF is set
internally at 10% of the programmed charge
current. However, IBF has a 150mA maximum
limit which can not be exceeded.
The logic control of the ISET pin of the MP2625B
can be realized as Figure 3. In this way, the user
can choose logic low to be “off” signal or logic
high to be ”on” signal with a N-MOSFET.
Ideal Diode Mode
If the system current requirement increases over
the preset limit of the PWM converter, the
additional current will be drawn from the battery
via the BATT-to-SYS switch. To avoid very large
currents being drawn from the battery which
might affect the reliability of the device, the
MP2625B controls the charge switch to work at
ISET
OFF ON
RISET
the ideal diode mode regulating VSYS to VBATT
-
65mV when VSYS is 40mV lower than VBATT is
detected. Only when VSYS is 40mV higher than
Figure 4: ISET Logic Control
__________
Input Power Status Indication (ACOK)
VBATT, the charger switch exits the ideal diode
An internal under voltage lockout circuit monitors
the input voltage and keeps the IC in off state
until the input rises over the rising threshold
(3.8V). When the input voltage decreases below
threshold (3.5V), the IC will turn off, and the
system load will be powered by the battery
mode, and the charge cycle softly restarts.
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
__________
Table 2: Charger Status Indication
automatically. ACOK is an open-drain, active-
low output that indicates the status of input power.
The input is considered valid when the input
voltage is over the UVLO rising threshold, and
280mV higher than the battery voltage to ensure
both the converter and the charger can operate
Charger Status
ACOK
low
CHGOK
In charging, supplement
mode
low
End of charge, ISET
disable charger only.
low
low
high
normally. If the input voltage from an adapter or
blinking at 6Hz
NTC fault, timer out
__________
from a USB port is indicated OK, ACOK will turn
VIN absent, EN disable,
thermal shutdown
high
high
low.
_____
During EN off or thermal shutdown conditions,
Timer Setting
__________
the ACOK turns high to indicate no power is
The MP2625B uses an internal timer to terminate
charge if the timer times out. The timer duration
is programmed by an external capacitor at the
TMR pin and related to the real charge current.
__________
provided by the input to the system. The ACOK
signal indicates if input supplies power to the
system load or not. Any other condition can not
__________
affect the ACOK indication as long as the input
power is present.
The trickle mode charge time is:
CTMR
_____________
tTrickle _ TMR 45
(min) (ICHG 1A)
0.1μF
Charge Status Indication (CHGOK)
_____________
The total charge time is:
CHGOK is an open-drain, active-low output that
_____________
indicates the status of charge. CHGOK will be
low during normal charging operation, turn high
after charge full, and blink if a fault condition
happens including NTC fault (battery temperature
invalid) and timer out (bad battery).
CTMR
tTotal_TMR 6.5
0.1μF
(hr) (ICHG 1A)
The above equations are based on 1A charge
current. As a result of power path management
control, charge current might vary during normal
operation, under this condition, the MP2625B
automatically takes into account this variation
and adjust the timer period accordingly.
_____________
In the event of a fault condition, CHGOK
switches at 6Hz with the 50% duty cycle and
enter “blinking” mode. The user should check the
application circuit to find out the root cause of the
When the charge current is set larger than 1A,
the safe timer period is reduced accordingly with
the same TMR capacitor. If the charge current is
reduced because of insufficient input power, the
timer period is increased proportionally by the
same rate at which the charge current is reduced.
If charge is stopped due to high system load, the
timer is temporarily suspended.
fault condition if the “blinking” signal is asserted.
_____________
For no battery condition, CHGOK is blinking
according to the transition between charging and
charge full. The blinking frequency is determined
by the cycle of charge and discharge of the
output capacitor.
When the charge current to the battery is low or
in the event the battery is in supplement mode
_____________
This feature avoids indicating a false trigger
indication for bad battery indication when there is
little charge current delivered to the battery as a
result of the insufficient input power.
caused by the insufficient input power, CHGOK
keeps low to avoid providing false charge full
indication.
__________
_____________
Table 2 shows the ACOK and CHGOK status
under different charge conditions.
When the timer out condition occurs, the
MP2625B terminates the charge at once and
_____________
CHGOK blinks to indicate the fault status. If one
of the following events happens, the timer is
refreshed and MP2625B re-starts the charge
cycle.
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
battery switch is fully on to minimize the power
loss. The MP2625B integrates battery discharge
protection. If the battery discharge current is
larger than the discharge current limit threshold
IDIS (5A), the current will be regulated at the
preset limited value. And if the current increases
further, the SYS voltage starts to decrease.
When VSYS drops to about 800mV lower than
Input re-startup
_____
Refresh EN /ISET signal
Auto-Recharge
NTC Thermistor
The NTC pin allows MP2625B to sense the
battery temperature using the Negative Thermal
Coefficient (NTC) thermistor usually available in
the battery pack to ensure safe operating
environment of the battery. A resistor with
appropriate value should be connected from VCC
to NTC and the NTC resistor is from NTC pin to
AGND. The voltage on NTC pin is determined by
the resistor divider whose divide ratio as the
different resistance of the NTC thermistor
depends on the ambient temperature of the
battery.
VBATT, SYS short condition is detected. Under this
condition, the discharge current is limited at
230mA. In the event of a short from system to
GND the discharge current from the battery to
the system is also limited to 230mA.
Furthermore, battery voltage UVLO is always
monitored. If the battery voltage is lower than the
battery UVLO threshold, the battery switch is
turned off immediately. This feature makes sure
the battery from over-discharged.
Dynamic Power Path Management (DPPM)
The MP2625B has an internal NTC voltage
comparator to set the upper and lower limit of the
divide ratio. If NTC pin voltage falls out of this
range it means the temperature is outside the
safe operating range,
In the presence of a valid input source, the PWM
converter will supply the current to both the
system and the battery charger.
The voltage VSYS is regulated based on the value
of the battery voltage. When VBATT is higher than
3.4V, VSYS is regulated 200mv above VBATT to
charge the battery. When VBATT is lower than
3.4V, to ensure the system can still be powered
up even with a drained battery connected, VSYS is
regulated at constant 3.6V.
As a result, The MP2625B will stop charging and
report it on indication pins. Charging will
automatically resume after the temperature falls
back into the safe range.
Thermal Protection
The MP2625B implements thermal protection to
prevent the thermal damage to the IC or
surrounding components. An internal thermal
sense and feedback loop will automatically
decrease the charge current when the die-
temperature rises to about 120oC. This function is
referred as charge current thermal fold-back.
This feature protects the MP2625B from
excessive temperature due to high power
operation or high ambient thermal conditions.
Another benefit of this feature is charge current
can be set according to the requirement rather
than worst-case conditions for a given application
with the assurance of safe operation. The
MP2625B will stop charging if the junction
temperature rises above 150oC as the IC enters
thermal shutdown protection.
When the input source is overloaded, either the
current exceeds the input current limit or the
voltage falls below the input voltage limit, the
MP2625B then reduces the charge current until
the input current falls below the input current limit
and the input voltage rises above the input
voltage limit. If the system current increases
beyond the power allowed by the input source,
additional power will be drawn from the battery
via an on-chip 40mꢀ MOSFET working as an
ideal diode.
Additionally, if the input source is removed, the
MP2625B will turn on the 40mꢀ MOSFET
allowing the battery to power the system load to
keep the operation of the portable device.
Operation Flow Chart
Figure 5 shows the operation flow chart of the
MP2625B.
Battery Discharge Protection
When the input power is removed or invalid, the
system load will draw power from the battery via
the battery switch. Under this condition, the
Figure 6 shows the operation process.
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
Yes
Clamp DC-DC
EAO to regulate
the part
Any Limit condition
triggered?
at the limit state
No
VBATT<3.4V?
VBATT>3.0V?
Yes
No
Yes
No
Trickle Charge
ICHG=10%ICC
VSYS drops down,
Charge switch
is fully on
Decrease ICHG
Keep VSYS=3.6V
,
CC/CV Charge
Yes
No
Satisfy System current
Charge the battery with
remaining current
No
Limit condition
Removed?
ICHG=IBF
?
No
Yes
Disable
Ideal Diode Mode
Charge in
CV mode and
No
No
Charge Full, EOC=1
TMR off,
Yes
ICHG=0?
Yes
ICHG<IBF?
clear the counter
DC-DC keeps work
Yes
No
No
VSYS>VBATT+40mV?
VSYS<VBATT-40mV?
Yes
VSYS<VBATT-40mV?
No
Yes
Yes
VBATT>VBATT_UVLO
?
No
Yes
VBATT<VRCHG
?
Ideal Diode Mode:
VSYS=VBATT-65mV,
Enable discharge
current limit
Battery switch shuts down,
DC-DC in over load
condition,
VSYS drops down
Figure 5: MP2625B Operation Flow Chart under No Fault Condition
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
Normal
operation
voltage
UVLO
Threshold-Hys
UVLO
Thresohold
VIN
0
Power Path Management
Battery
Supplement
Mode
ISYS
0
CV Charge
CC Charge
Trickle Charge
Battery
Full
IBATT
0
ISYS -IIN_LIM
Input Power
Current Limit
IIN_LIM
IIN_AVE
0
Supplement
Mode-
Discharging
Auto-
Recharging
Self-
discharging
Power off-
discharging
Charging
Charging
V
BATT=4.0V
VSYS
VBATT
VBATT=3.4V
V
BATT=3.0V
0
Figure 6: MP2625B Operation Process under No Fault Condition
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
For example, if the typical ICHG is designed as
APPLICATION INFORMATION
2A, then the RSET is calculated at 1.05kꢀ. The
tolerance of the ICHG setting is ±10%. If the
minimum or maximum charge current is
required, first the typical value should be
calculated according to the tolerance. After that,
calculate the resistor according to formula (2).
1% accuracy resistor is used for this setting.
COMPONENT SELECTION
Setting the Input Current Limit
First the input current limit can be set by the M0
and M1 pins refer to the Table 1, the exact
current value in minimum, typical and maximum
is listed in the EC table.
Under program mode, connect a resistor from
the ILIM pin to AGND to program the input
current limit for different input ports. The
relationship between the input current limit and
setting resistor is as Equation (1) which is
shown in following again:
For a given setting resistor, the charge current
can be calculated by the same way did in the
input current limit setting. Usually in USB mode,
the charge current is always set over the USB
input limit specification. Then the MP2625
regulates the input current constant at the
limitation value. Thus the real CC charge
current is not the setting value, it varies with
different input and battery voltages.
40000
(1)
IIN_LIM=1.14
(mA)
RILIM(kꢀ)
For MP2625B, the RILIM is greater than 22.8k, so
that IILIM is not over 2A.
The tolerance is ±8% of the input current limit
setting.
The maximum CC charge value can be
calculated as:
V IILIM
IN
ICC _ MAX
(A)
(3)
VTC
So for a required minimum input current limit
value, just calculate its typical value first, then
calculate the setting resistor based on Equation
(1). Also the maximum value can be calculated
Where VTC is trickle charge threshold (3V) and η
is the current charge efficiency. Assume
VIN=5.5V, IILIM=1A, suppose η=83%, thus
ICC_MAX=1.52A.
Figure 7 shows a calculating charge current
curve by limiting the input current limit.
according to the tolerance.
1% accuracy
resistor is used for this setting. Also, for a given
resistor of RILIM, the input current limit can be
calculated. Following table is an example:
Table 3: Example of RILIM setting
RILIM
Resistor (kꢀ)
IIN_LIM
(mA)
8%
‐8%
Typ.
Min.
Max.
54.9 830.601 897.049 764.153
54.351 838.991 906.11 771.872
55.449 822.377 888.168 756.587
Therefore, if customer selected a 54.9k in 1%
accuracy resistor for the input current limit
setting, then the typical input current limit value
is 830.6mA, the minimum is 756.6mA and the
maximum is 906mA.
Figure 7: ICHG Variation with Different Input
Current Limit
Setting the Charge Current
RISET connecting from the ISET pin to AGND
sets the charge current (ICHG). The relationship
between the charge current and setting resistor
is as Equation (2) which is shown in following
again:
Setting the Input Voltage Limit
The input clamp voltage is set using a resistive
voltage divider from the input voltage to VLIM
pin. The voltage divider divides the input
voltage down to the limit voltage by the ratio:
1800
ICHG 1.15
(mA)
(2)
RSET(k)
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
Selecting the Inductor
R2
VVLIM = V
×
(V)
(4)
(5)
Inductor selection trades off among cost, size,
and efficiency. A lower inductance value
corresponds to a smaller size, but results in
higher ripple currents, higher magnetic
IN_LIM
R1+R2
Thus the input voltage is:
VIN_LIM = VVLIM
R1+R2
R2
×
(V)
hysteretic
losses,
and
higher
output
capacitances. From a practical standpoint, the
inductor ripple current does not exceed 30% of
the maximum load current under worst cases
conditions. For example, if the ICHG is setting to
2A in MP2625B, then, ∆IL is general set at 0.6A.
The voltage clamp reference voltage VVLIM is
1.52V, and a typical value for R2 can be 10kꢀ.
With this value, R1 can be determined by:
VIN_LIM - V
R1=R2×
VLIM (V)
(6)
VVLIM
However, for the light load condition, the
inductor ripple current will be very small which
may cause unstable operation due to the peak
current mode control of the IC. For stable
operation, the experienced minimum limit value
for inductor current ripple is 0.5A. Therefore, the
inductor current ripple is the maximum one of
30% times ICHG and 0.5A.
For example, for a 4.65V input limit voltage, R2
is 10kꢀ, and R1 is 20.6kꢀ.
The minimum value and the maximum value of
the input voltage limit can be calculated
according to the accuracy of the resistor and
the tolerance of VVLIM. 1% accuracy resistors
are used for R1 and R2.
Setting the System Voltage
The system voltage can be regulated to any
value between 4.08V to 4.4V by the resistor
divider on SYSFB pin as R6 and R7 in Figure
10.
And the inductance can be calculated according
to Equation (9):
V VSYS
IL _MAX V fS(MHz)
VSYS
IN
L
(H)
(9)
R6 R7
IN
VSYS VSYS _REF
(7)
R7
The peak current of the inductor is calculated
Where VSYS_REF is 1.152V, the reference voltage
of SYS. With a typical value for R7, 10kꢀ, R6
can be determined by:
as Equation (10):
%ripple
IPEAK ILOAD(MAX) (1
)(mA)
(10)
2
VSYS V
SYS _REF (V)
(8)
Where VIN, VSYS, and fS are the typical input
voltage, the output voltage, and the switching
frequency, respectively.
R6 R7
VSYS _REF
For example, for a 4.2V system voltage, R7 is
10kꢀ, and R6 is 26.5kꢀ. 1% resistors are
selected for the R5 and R6.
Be noted that, the minimum VSYS is limited to be
higher than the maximum value of the auto-
recharge threshold which is 4.05V.
Following Table 4 provides the selection guide
of the inductance based on different input
voltage.
Table 4: Inductance Selection Guide under different Input Voltage
Inductance Selection
SPEC
VIN
LMIN
(uH)
0.55
LMAX
(uH)
1.25
L
(uH)
1.0
Saturation
Current (A)(6)
>2.8
DCR
(mꢀ)
<50
Package
V VSYS
VSYS
IN
L
IL
V fS(MHz)
IN
5V
9V
Application
Required
∆IL=max (0.3*ICHG,0.5A)
∆ILMIN=0.5A
2.25
2.8
2.2(5) >2.8
<50
Application
Required
∆ILMAX=0.6A
NOTE:
5) Choose the inductor with a value a little lower than the calculated LMIN, makes the ∆IL increased a little, but the 2.2uH is more
regular in the application which will have a lower cost.
6) Saturation Current of the inductor should be higher than the IPEAK, add 0.5A margin here.
MP2625B Rev. 1.01
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
Selecting the Input Capacitor
the system load to ensure it properly absorbs
the ripple current.
The input capacitor C1 from the typical
application circuit absorbs the maximum ripple
current from the PWM converter, which is given
by
Use a ceramic capacitor because it has lower
ESR and smaller size that allows us to ignore
the ESR of the output capacitor. Thus, the
output voltage ripple is given by:
VTC (V
VTC )
IN _ MAX
(A) (11)
IRMS _ MAX ICC _ MAX
VSYS
V
IN _ MAX
1
VSYS
VSYS
V
IN
For ICC_MAX=2A, VTC=3V, VIN_MAX=10V, the
maximum ripple current is 1A. Select the input
capacitors so that the temperature rise due to
the ripple current does not exceed 10°C. Use
ceramic capacitors with X5R or X7R dielectrics
because of their low ESR and small
temperature coefficients.
(12)
r
%
2
8CSYS fS L
In order to guarantee the ±0.5% system voltage
accuracy, the maximum output voltage ripple
must not exceed 0.5% (e.g. 0.1%). The
maximum output voltage ripple occurs at the
minimum system voltage and the maximum
input voltage.
For most applications, use a 10µF capacitor.
Besides, usually a small cap with at least 1uF
(C1) from IN to GND is required to be put as
much close as possible to the IC. For the input
voltage is high to 10V, consider the spike when
input insert, select the input capacitors (both the
22uF and 1uF) in 25V rating.
The output capacitor can be calculated with
Equation (13):
VSYS _MIN
1
V
IN
(13)
CSYS
2
8 fS L r
When SYSFB pin is floating, output voltage
ripple is the main concern to select the output
capacitor (CSYS), refer to Table 5 for detail
selection guide about the SYS capacitance
selection under typical inputs.
Selecting the Output Capacitor
The output capacitor CSYS from the typical
application circuit is in parallel with the SYS
load. CSYS absorbs the high-frequency switching
ripple current and smoothes the output voltage.
Its impedance must be much less than that of
Table 5: SYS Capacitance Selection Guide
SYS Capacitance (CSYS) Selection
SPEC
VIN
SYS_MIN (uF) 7)
CSYS_MIN (uF) 7)
When SYSFB is
Programmed
VSYS
C
Temperature
Characteristic
1
When SYSFB is
Floating
Package
V
IN
CSYS
2
8 fS L r
5V
9V
13.6
20
X5R;X7R
X5R;X7R
Application
Required
∆r=0.1%
13.3
20
Application
Required
L=1uH @VIN=5V
L=2.2uH @VIN=9V
NOTE:
7) For different voltage rating, capacitance will have different DC bias characteristic. Suppose a general condition, capacitance drops
40% under VSYS=4.4V under 10V rating, and 50% at 6.3V rating.
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
When SYSFB is programmed using external
At 0°C, RNTC_Cold = 27.445kꢀ;
At 50°C, RNTC_Hot = 4.1601kꢀ.
resistors, the control loop function is changed.
A zero point is added around the cross over
frequency of the DC gain, and this may result in
the phase margin varied a lot, which may cause
the unstable operation. To avoid this condition,
a minimum capacitance requirement should be
satisfied to make the pole point to compensate
the zero point. This minimum capacitance is
20uF for a general application.
The following equations are derived assuming
that the NTC window is between 0°C and 50°C.
According to the above equations to calculate
RT1=7.15kꢀ and RT2=25.5kꢀ.
So, for the SYSFB programmed condition, the
CSYS should be selected as max (CSYS_MIN
,
20uF), CSYS_MIN is calculated from the formula of
equation (13), as shown in Table 5. For better
stability margin, select
a
47uF ceramic
capacitor with 6.3V and above voltage rating as
the output capacitor in this case.
Figure 8: NTC Function Block
PCB Layout Guideline
Resistor Choose for NTC Sensor
Figure 8 shows an internal resistor divider
reference circuit to limit the low temperature
threshold and high temperature threshold at
65%·VCC and 33.5%·VCC, respectively. For a
given NTC thermistor, select appropriate RT1
and RT2 to set the NTC window:
It is important to pay special attention to the
PCB layout to meet specified noise, efficiency
and stability requirements. The following design
considerations can improve circuit performance:
1) Route the power stage adjacent to their
grounds. Aim to minimize the high-side
switching node (SW, inductor), trace lengths in
the high-current paths and the current sense
resistor trace.
RT2//RNTC_Cold
RT1 RT2//RNTC_Cold VCC
RT2//RNTC_Hot
RT1 RT2//RNTC_Hot VCC
V
THL
(14)
65%
V
THH
(15)
33.5%
Keep the switching node short and away from
all small control signals, especially the feedback
network.
RNTC_Hot is the value of the NTC resistor at high
temperature of the required temperature
operation range, and RNTC_Cold is the value of
the NTC resistor at low temperature.
Place the input capacitor as close as possible
to the IN and PGND pins.
The two resistors, RT1 and RT2, allow the high
temperature limit and low temperature limit to
be programmed independently. With this
feature, the MP2625B can fit most type of NTC
resistor and different temperature operation
range requirements.
Place the output inductor close to the IC and
connect the output capacitor between the
inductor and PGND of the IC.
2) For high-current applications, the balls for the
power pads (IN, SW, SYS, BATT and PGND)
should be connected to as much copper in the
board as possible. This improves thermal
performance because the board conducts heat
away from the IC.
RT1 and RT2 values depend on the type of the
NTC resistor:
0.3RNTC_ColdRNTC_Hot
(16)
RT2
0.1225RNTC_Cold-0.4225RNTC_Hot
0.3RNTC_Hot RNTC_Cold
3) The PCB should have a ground plane
connected directly to the return of all
components through vias (two vias per
capacitor for power-stage capacitors, one via
(17)
RT1
0.2275(RNTC_Cold RNTC_Hot
)
For example, for the thermistor NCP18XH103,
it has the following electrical characteristic:
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
per capacitor for small-signal components). It is
also recommended to put vias inside the PGND
pads for the IC, if possible. A star ground
design approach is typically used to keep circuit
block currents isolated (high-power/low-power
small-signal) which reduces noise-coupling and
ground-bounce issues. A single ground plane
for this design gives good results. With this
small layout and a single ground plane, there is
no ground-bounce issue, and having the
components segregated minimizes coupling
between signals.
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL APPLICATION CIRCUITS
Figure 9: Typical Charge Application Circuit for 5V input with NTC Resistor Fixed
Table 6: The Key BOM of Figure 9.
Qty Ref
Value
Description
Package
Manufacture
Ceramic Capacitor;10V;
X5R or X7R
1
1
CIN
C1
10μF
1206
Any
Ceramic Capacitor;10V;
X5R or X7R
1μF
0603
0603
Any
Any
Ceramic Capacitor;6.3V;
X5R or X7R
1
C2
1uF
Ceramic Capacitor;16V;
X5R or X7R
Ceramic Capacitor;6.3V;
X5R or X7R
1
1
C3
100nF
100nF
0603
0603
Any
Any
CTMR
Ceramic Capacitor;10V;
X5R or X7R
2
2
1
CSYS,CBATT 22uF
1206
0603
SMD
Any
Any
Any
RT1,RT2
L1
10k
Film Resistor;1%
Inductor;1.0uH;Low
DCR;ISAT>2.8A
1.0μH
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
TYPICAL APPLICATION CIRCUITS
Figure 10: Typical Charge Application Circuit for 9V Input and 1.5A Input Current Limit
Table 7: The Key BOM of Figure 10.
Qty
Ref
Value
Description
Package Manufacture
Ceramic Capacitor;16V;
X5R or X7R
1
CIN
22μF
1206
0603
Any
Any
Ceramic Capacitor;16V;
X5R or X7R
1
1
C1
C2
1μF
Ceramic
Capacitor;6.3V;
X5R or X7R
1uF
0603
Any
Ceramic Capacitor;25V;
X5R or X7R
Ceramic Capacitor;10V;
X5R or X7R
1
1
C3
C4
100nF
4.7uF
0603
0603
Any
Any
Ceramic
1
2
CTMR
100nF Capacitor;6.3V;
X5R or X7R
0603
1206
Any
Any
Ceramic Capacitor;10V;
CSYS,CBATT
22uF
X5R or X7R
1
3
R6
26.5k
10k
Film Resistor;1%
0603
0603
Any
Any
RT1,RT2,R7
Film Resistor;1%
Inductor;2.2uH;Low
DCR;ISAT>6A
1
L1
2.2μH
SMD
Any
MP2625B Rev. 1.01
1/15/2018
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MP2625B – SINGLE CELL SWITCHING CHARGER WITH POWER PATH CONTROL
PACKAGE INFORMATION
QFN-20 (3mmX4mm)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2625B Rev. 1.01
1/15/2018
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31
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