MF88M1-GMCAVXX_技术文档

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

MF82M1-GMCAVXX

8/16-bit Data Bus

MF84M1-GMCAVXX

MF88M1-GMCAVXX

MF816M-GMCAVXX

MF820M-GMCAVXX

MF832M-GMCAVXX

MF82M1-GNCAVXX

MF84M1-GNCAVXX

MF88M1-GNCAVXX

MF816M-GNCAVXX

MF820M-GNCAVXX

MF832M-GNCAVXX

Flash Memory Card

C o n n e c t o r T y p e

Two- piece 68-pin

DESCRIPTION

Buffered interface

The MF8XXX-GMCAVXX is a flash memory card

which uses eight-megabit or sixteen megabit flash

electrically erasable and programmable read only

memory IC’s as common memory and a 64-kilobit

electrically erasable and programmable read only

memory as attribute memory.

The MF8XXX-GNCAVXX is a flash memory card

which uses eight-megabit or sixteen megabit flash

electrically erasable and programmable read only

memory IC’s.

TTL interface level

Program/erase operation by software

command control

100,000 program/erase cycles

Write protect switch

Operating temperature =0 to 70°C

.No Vpp required (5V Vcc only operation)

APPLICATIONS

Notebook computers Printers

Industrial machines

FEATURES

68 pin JEIDA/PCMCIA

8/16 controllable data bus width

PRODUCT LIST

Item

Memory

capacity

2MB

Attribute

memory

Data bus

width(bits)

Access

time (ns)

Memory

IC’s

8Mbit

Outline

drawing

Type name

MF82M1-GMCAVXX

MF84M1-GMCAVXX

MF88M1-GMCAVXX

MF816M-GMCAVXX

MF820M-GMCAVXX

MF832M-GMCAVXX

MF82M1-GNCAVXX

MF84M1-GNCAVXX

MF88M1-GNCAVXX

MF816M-GNCAVXX

MF820M-GNCAVXX

MF832M-GNCAVXX

4MB

8MB

16MB

20MB

32MB

2MB

4MB

8MB

16MB

20MB

32MB

Yes

16Mbit

8Mbit

8/16

150

68P-013

No(FFh)

16Mbit

MITSUBISHI

ELECTRIC

1/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

PIN ASSIGNMENT

No.

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

Function

Symbol

Function

1

2

GND

D3

Ground

GND

CD1#

D11

D12

D13

D14

D15

CE2#

NC

Ground

Card detect 1

3

D4

4

D5

Data I/O

5

D6

Data I/O

6

D7

7

8

9

CE1#

A10

OE#

A11

A9

Card enable 1

Address input

Output enable

Card enable 2

No connection

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

NC

A8

Address input

A17

A18

A19

A20

A21

VCC

NC

A22

A23

A24

NC

A13

A14

WE#

NC

VCC

NC

A16

A15

A12

A7

A6

A5

A4

A3

A2

A1

A0

D0

Address

input

Write enable

No connection

Power supply voltage

No connection

A21 (NC for < 2 MB types)

Power supply voltage

No connection

A22 (NC for < 4 MB types)

A23 (NC for < 8 MB types)

A24 (NC for < 16 MB types)

Address

input

NC

Address input

No connection

REG# Attribute memory select

62 BVD2

63 BVD1

Battery voltage detect 2

Battery voltage detect 1

64

65

66

67

68

D8

D9

D10

CD2#

GND

D1

D2

WP

GND

Data I/O

Write protect

Ground

Card detect 2

Ground

BLOCK DIAGRAM (MF832M-GMCAVXX)

A24

A23

A22

A21

A0

ADDRESS-

DECODER

16

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

A9

D15

CE#

D14

D13

D12

D11

D10

D9

8

ADDRESS-

BUS

BUFFERS

21

COMMON

MEMORY

16Mbit

FLASH

MEMORY

´ 16

DATA-BUS

BUFFERS

D8

8

D7

D6

D5

A8

A7

D4

A6

D3

A5

OE# WE#

D2

A4

D1

A3

A2

A1

CE1#

MODE

CONTROL

LOGIC

CE2#

WE#

OE#

VCC

CE# OE# WE#

REG#

WP

8

ATTRIBUTE

MEMORY

13

BVD2

BVD1

WRITE PROTECT

64Kbit

2

ON

OFF

GND

E PROM

´ 1

CD1#

CD2#

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ELECTRIC

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

FUNCTIONAL DESCRIPTION

The operating mode of the card is determined by

five active low control signals (REG#, CE1#,

CE2#, OE#, WE#), and control registers located in

each memory IC.

After latching the command data, the card will go into

programming, erasure or other operation mode. For

details please refer to the Command Definition table,

each individual command’s definition and the

programming and erasure algorithms.

Common memory function

When the REG# signal is set to a high level

common memory is selected.

Attribute memory function

When the REG# signal is set to a low level attribute

memory is selected.

-Read mode

When each memory IC in the card are switched,

the control registers of each memory IC are set to

read only mode.

Operation of the card then depends on the four

possible combinations of CE1# and CE2# (note WE#

should be set to a high level when the device is in read

mode except during combination (4) where it’s

condition is unimportant) :

GM series

The card includes a byte wide attribute memory

consisting of 8K bytes of E²PROM located at the even

addresses when the card is in the 8 bit

operating mode. It is located at sequential

addresses on the lower half of the data bus when

the card is in 16 bit operating mode i.e. A0 is

ignored.

(1) If CE1# is set to a low level and CE2# is set to a

high level, the card will work as an eight bit data

bus width card. Data can be accessed via the

lower half of the data bus (D0 to D7).

(2) If both CE1# and CE2# are set to a low level, data

will be accessible via the full sixteen bit data bus

width of the card. In this mode LSB of address bus

(A0) is ignored.

(3) If CE1# is set to a high level and CE2# is set

to a low level the odd bytes (only) can be

accessed through upper half of the data bus (D8

to D15). This mode is useful when handling the

odd (upper) bytes in a sixteen bit interface

system. Note that A0 is also ignored in this

operating condition.

(4) If CE1# and CE2# are set to a high level, the

card will be in standby mode where it consumes

low power. The data bus is kept high impedance.

When OE# is set to a low level data can be read from

the card, depending on the address applied and the

setting of CE1# and CE2# as mentioned above, except

under combination (4) When OE# is set to a high level

and WE# is set to a high level the card is in an output

disable mode

To access the attribute memory, first set CE1# and

CE2#. Set CE1# to low level and CE2# to high level

for 8 bit mode or CE1# and CE2# to low level for 16

bit mode. Then select the required address. Note

please take care that in 8 bit mode A0 must be set low

for attribute memory access i.e. an even address is

applied. In 16 bit mode it is not important whether A0

is high or

low. Data can then be read by setting OE# to a low

level with WE set to a high level.

Writing to the attribute memory can be achieved

in byte mode only. To write to attribute memory set

OE# to high level and WE# to low level. The data to

be written will be latched at the rising edge of WE#.

Then, unless WE# changes back

from high level to low level over 100 µs an

automatic erase/program operation starts which will

complete within 10ms.

Please also remember that for attribute memory A0 is

not applicable and it should be set to low, even

addressing only, in 8 bit mode or ignored for 16 bit

mode.

-Write mode

By using the 4 combinations of CE1# and CE2# as

described under Read only above the appropriate

Data Out and Command/Data In bus selection can be

made.

GN series

The card then outputs FFh on the lower half of the

data bus (D0 to D7) when the following conditions

are applied;

(1)CE1#=low level,CE2#=high level,OE#=low

level,WE#=high level,A0=low level.

(2)CE1#=low level,CE2#=low level,OE#=low

level,WE#=high level.

If OE# is set to a high level and WE# set to a low level,

the control register will latch command data applied

at the rising edge of the WE# signal. Note that more

than one bus cycle may be required to latch the

command and/or the related data-please refer to the

Command Definition table.

If OE# is set to a low level and WE# is set to a high

level the card data can be read from the card

depending on the condition of the control register.

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

is applied. When the card is not in write protect

mode the WP output pin is set to a low level when

VCC is applied. By reading the state of the WP

output the host system can easily check whether the

card is in write protect mode or not.

Write protect mode

The card has a write protect switch on the opposite

edge to the connector edge. When it is switched on,

the card will be placed into a write protect mode,

where data can be read from the card but it cannot

be written to it. The WP output pin is set to a high

level when the card is in write protect mode and V CC

FUNCTION TABLE (COMMON MEMORY)

I/O

(D15 to D8)

I/O

(D7 to D0)

Mode

Standby

A0

CE1# OE#

REG# CE2#

WE#

H

L

H

L

H

L

H

X

L

X

H

X

L

H

X

High-Z

Read A(16-bit)

Odd byte data out

High-Z

Even byte data out

odd byte data out

High-Z

Read B(8-bit)

High-Z

Read C(8-bit)

Odd byte data out

Command or odd byte data in

Command or even byte data in

Write A(16-bit)

H

L

H

L

H

L

X

L

High-Z

Command or even byte data in

Command or odd byte data in

High-Z

Write B(8-bit)

High-Z

H

Command or odd byte data in

Write C(8-bit)

Output disable

H

L

X

H

X

H

L

H

X

High-Z

Note 1 : H=VIH, L=VIL, X=VIH or VIL, High-Z= High-impedance

To operate refer to the command definition, algorithms and so on.

FUNCTION TABLE (ATTRIBUTE MEMORY )

GM series

I/O

(D15 to D8)

I/O

(D7 to D0)

CE1# OE#

REG# CE2#

WE#

Mode

Standby

Read A(16-bit)

Read B

A0

L

H

L

H

L

H

L

H

L

H

X

L

H

X

H

L

H

X

L

H

X

L

X

High-Z

Data out(not valid)

High-Z

Even byte data out

Data out(not valid)

High-Z

Even byte data in

Odd byte data in (not valid)

High-Z

(8-bit)

High-Z

Read C(8-bit)

Write A(16-bit)

Write B

(8-bit)

Write C(8-bit)

Output disable

Data out(not valid)

Odd byte data in (not valid)

High-Z

L

H

L

High-Z

Odd byte data in (not valid)

High-Z

X

High-Z

GN series

I/O

(D15 to D8)

High-Z

Data out(not valid)

High-Z

Data out(not valid)

High-Z

I/O

(D7 to D0)

CE1# OE#

REG# CE2#

WE#

Mode

A0

Standby

Read A(16-bit)

Read B

(8-bit)

Read C(8-bit)

Output disable

L

H

L

H

L

H

L

H

X

L

H

X

H

X

L

H

X

High-Z

Data out (FFh)

Data out(not valid)

High-Z

X

High-Z

Note 2 : H=VIH, L=VIL, X=VIH or VIL, High-Z= High-impedance

MITSUBISHI

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

COMMAND DEFINITION

The corresponding memories of the card are set to

read/write mode and the operation is

controlled by the software command written in the

control register.

COMMAND DEFINITION TABLE

First bus cycle

Mode Address Data in

Second bus cycle

Bus

cycles

1

Command

Mode Address

Data in

-

Data out

-

Read/Reset

Write

ZA

FFh(FFFFh)

-

Programme setup/

Programme

Erase Setup/

Erase Confirm

Programme

Suspend/Resume

Erase Suspend/

Resume

Read Status

Register

2

1

2

Write

PA

40(4040)h

Write

PA

PD

-

Write

BA

PA

BA

ZA

20(2020)h

B0(B0B0)h

70(7070)h

50(5050)h

90(9090)h

Write

Read

-

BA

PA

BA

ZA

-

D0(D0D0)h

-

D0(D0D0)h

-

D0(D0D0)h

-

RD

-

Clear Status

Register

Read Device

Identifier Code

Read

DIA

DID

Note 3: Indicates the basic functions of commands and should not write another commands.

Refer to the algorithms to operate.

Signal status is defined in function table and bus status.

Parenthesized data shows the data for 16 bit mode operation.

ZA=an address of a memory zone (Please refer to the memory zone)

PA=Programming address

PD=Programming data

BA=An address of a memory block (Please refer to the memory block)

RD=Data of status Register

DIA=Device identifier address

000000h for manufacturer code 000002h for device code

DID=Device identifier data

2MB=manufacturer code : 89 (8989)h

Others=manufacturer code : 89 (8989)h

device code : A6h (A6A6)h

device code : AA (AAAA)h

Read/Reset

Erase Setup/Erase confirm

The memory in the card is switched to read mode by

writing FFh (FFFFh for 16 bit operation) into

the control resister. This mode is maintained

until the contents of register are changed. This

mode needs to be written to every

The erase setup is a command to set up the memory

block for erasure. Writing setup erase command 20h

(2020h for 16 bit operation) in the control register

followed by erase confirm command D0h (D0D0h

for 16 bit operation) will initiate a erasure

operation. Erasing will take place automatically

after the rising edge of WE# controlled by a internal

timer. The completion of

memory zone to which access is required.

Programme Setup/Programme

The setup programme command sets up the card for

programming. It is applied when 40h (4040h for 16

bit operation) is written to control register.

Programming will take place automatically after

latching the address and data which are applied at

the rising edge of WE#.

erase can be confirmed by reading status register.

(For details please refer to the algorithm)

These commands will not erase all the data of a

memory card and should be repeated for all the

required memory blocks. At an eight bit access

mode it should be noticed that the erasure of a

memory block will result in odd byte or even byte

erasure.

The completion of programme can be confirmed by

reading status register.

(For details please refer to the algorithm)

MITSUBISHI

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

Erase Suspend/Erase Resume

Clear Status Register

The erase suspend command B0h (B0B0h for 16

bit operation) is a command to generate erase

interruption and to read data from another block

of selected memory zone. By writing in the

control register erase resume command D0h

(D0D0h for 16 bit operation), the memory block will

continue the erase operation.

The clear status register command will clear data of

status register. It is applied when 50h (5050h for 16

bit operation) is written to the control

register. If an error occurred during programme or

erase, the status register must be cleared before

retrying programme or erase.

These commands must be executed in erase

algorithm.

(For details please refer to the algorithm)

Read Device Identifier Codes

The read device identifier codes command is

implemented by writing 90h (9090h for 16 bit

operation) to the command register. After writing

the command, manufacturer code can be read at the

address of 000000h of the zone and device code can

be read at the address 000002h of the zone. Each

card uses the same type of memory throughout and

each memory zone will respond the same code.

(Do not apply high voltage to A10 pin in order to try

and read the device identifier codes as this will

result in the card being destroyed.)

Read Status Register

The Read status register is a command to read the

status register’s data and to make sure programme

or erase operations complete successfully. The data

of status register can be read after writing 70h

(7070h for 16 bit operation) in the control register.

The register’s read data is latched on the falling

edge of OE#. At programme or erase, the status

register’s data must be read to verify the results.

STATUS REGISTER

When operating programme or erase, it is necessary

to read status register data and to transact these bit.

Each memory IC used in this

card has internal status register to make sure

programme or erase operations complete

successfully.

7 (15) BIT

Programme/

Erase Status Bit Suspend Bit

6 (14) BIT

Erase

5 (13) BIT

Erase Error

Bit

4 (12) BIT

Programme

Error Bit

3 (11) BIT

Vcc Error

Bit

2 (10) BIT

Programme

Suspend Bit

1,0 (9,8) BIT

Reserved

Note 4: ( ) ; for 16 bit operation

Bit ; Field name

7(15) BIT ; Programme/Erase Status Bit

0=Busy (in programming/erasing) 1=Ready

6(14) BIT ; Erase Suspend Bit

1=Erase Suspended

5(13) BIT ; Erase Error Bit

1=Erase Error

4(12) BIT ; Programme Error Bit

1=Programme Error

3(11) BIT ; Vcc Error

2(10) BIT ; Programme Suspend Bit

1=Programme Suspended

1=Error of voltage at Vcc

1,0(9,8) BIT ; Reserved for future

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

MEMORY ZONE AND BLOCK

8 bit mode

Even byte

Odd byte

Zone1

0000000h

Zone0

0000001h

03FFFFFh

0400001h

07FFFFFh

0800001h

0BFFFFFh

0C00001h

0FFFFFFh

1000001h

13FFFFFh

1400001h

17FFFFFh

1800001h

1BFFFFFh

1C00001h

1FFFFFFh

0000001h

Block0

03FFFFEh

0400000h

07FFFFEh

0800000h

0BFFFFEh

0C00000h

0FFFFFEh

1000000h

13FFFFEh

1400000h

17FFFFEh

1800000h

1BFFFFEh

1C00000h

1FFFFFEh

001FFFFh

0020001h

Zone2

Zone3

Block1

003FFFFh

.

Zone4

Zone5

Zone6

Zone7

Zone9

Block31

0300001h

03FFFFFh

Zone8

Zone10

Zone11

Zone13

Zone15

2MB; 1 zone=64KB*16 blocks

Others; 1 zone=64KB*32 blocks

Zone12

Zone14

Note 5 : 2MB;1 zone=0h to 1FFFFFh address

Others;1 zone=0h to 3FFFFFh address

Zone 2 to 15 do not exist in 2MB

Zone 2 to 15 do not exist in 4MB

Zone 4 to 15 do not exist in 8MB

Zone 8 to 15 do not exist in 16MB

Zone 10 to 15 do not exist in 20MB

16 bit mode

Odd byte

Zone0

Even byte

0000000h

03FFFFFh

0400000h

07FFFFFh

0800000h

0BFFFFFh

0C00000h

0FFFFFFh

1000000h

13FFFFFh

1400000h

17FFFFFh

1800000h

1BFFFFFh

1C00000h

1FFFFFFh

0000000h

001FFFFh

0020000h

Block0

Block1

Zone1

Zone2

Zone3

Zone4

Zone5

Zone6

Zone7

003FFFFh

.

Block31

0300000h

03FFFFFh

2MB; 1 zone=64KW*16 blocks

Others; 1 zone=64KW*32 blocks

Note 6 : 2MB;1 zone=0h to 1FFFFFh address

Others;1 zone=0h to 3FFFFFh address

Zone 1 to 7 do not exist in 2MB

Zone 1 to 7 do not exist in 4MB

Zone 2 to 7 do not exist in 8MB

Zone 4 to 7do not exist in 16MB

Zone 5 to 7 do not exist in 20MB

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

PROGRAMME ALGORITHM

ERASE ALGORITHM

PROGRAMME

ERASE

8 bit Operation

Write the programme setup command (40h) to the

address to be programmed. The next write sequence

will initiate the programming operation which will

end automatically as this period being controlled by

an internal timer and the data will be programmed.

To make sure that the data is

programmed correctly read data of the status

register. The read status register command (70h)

may or may not be applied to read the data after the

programme data input. If the data is programmed

step address and programme data according to the

above sequence.

The next address to be programmed should be

written with in a memory zone. After the last

programming operation, write the reset command

(FFh) in control register of the programmed memory

zones.

Write the erase setup command (20h) and erase

confirm command (D0h) for the applicable block

address.

An erasure operation will then commence which

will be finished in 1.6s typical or less this being

automatically controlled by an internal timer.

To make sure that the data is erased correctly

and read data of the status register.

The read status register command (70h) may or may

not be applied to read the data after the erase

confirm command.

After erasure has completed write the reset

command (FFh) to the control register, proceed

to the erase operation for the next memory block.

16 bit Operation

Most of the algorithm of 16 bit erasure is same as

the one of the 8 bit erasure.

(Please refer to the algorithm and the state of bus

at erasure.)

When overwriting bits programmed as “0”,

programme “1” or the device reliability is affected.

16 bit operation

The algorithm of 16 bit programming is almost same

as the 8 bit programming. (Please refer to the

algorithm and the status of bus at programming)

ERASE SUSPEND

8 bit Operation

The erase suspend is a command to generate block

erase interruption in order to read or programme

data from another block of the selected memory

zone. It is necessary to write the erase suspend

command (B0h) in the erase algorithm.

The execution of the erase suspend can be confirmed

by reading data of the status register.

Then it is necessary to write the read command

(FFh) in control register in order to read data, after

reading the status register’s data.

PROGRAMME SUSPEND

8 bit Operation

The programme suspend is a command to generate

zone programme interruption in order to read or

data from another block of the selected memory

zone. It is necessary to write the erase suspend

command (B0h) in the programme algorithm.

The execution of the programme suspend can be

confirmed by reading data of the status register.

Then it is necessary to write the read command

(FFh) in control register in order to read data, after

reading the status register’s data.

After the erase resume command (D0h) is written in

the control register, the memory block will continue

erase operation.

After the programme resume command (D0h) is

written in the control register, the memory zone will

continue the programme operation.

16 bit Operation

Most of the algorithm of 16 bit erase suspending is

same as the one of the 8 bit erase suspending.

(Please refer to the algorithm and the state of bus

at erase suspending.)

16 bit Operation

Most of the algorithm of 16 bit programme

suspending is same as the one of the 8 bit

programme suspending.

(Please refer to the algorithm and the state of bus

at programme suspending.)

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

PROGRAMME ALGORITHM

8 bit mode

PROGRAMME START

ADDRESS=FIRST LOCATION

WRITE PROGRAMME SETUP COMMAND(40h)

WRITE PROGRAMME DATA

READ STATUS REGISTER

BIT 7= “ 0”

PROGRAMME

SUSPEND LOOP A

NO

PROGRAMME

SUSPEND?

CHECK PROGRAMME

STATUS BIT

YES

BIT 7= “ 1”

BIT 3= “ 1”

CHECK Vcc

ERROR BIT

BIT 3= “ 0”

BIT 4= “ 1”

CHECK PROGRAMME

ERROR BIT

BIT 4= “ 0”

ADDRESS=

NEXT ADDRESS

WRITE STATUS REGISTER

CLEAR COMMAND(50h)

LAST ADDRESS?

NO

YES

WRITE RESET COMMAND(FFh)

PROGRAMME PASSED

PROGRAMME FAILED

MITSUBISHI

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Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

PROGRAMME ALGORITHM

16 bit mode

PROGRAMME START

ADDRESS=FIRST LOCATION

WRITE PROGRAMME SETUP COMMAND(4040h)

WRITE PROGRAMME DATA

READ STATUS REGISTER

PROGRAMME

SUSPEND LOOP B

NO

BIT 7.AND.15= “ 0”

PROGRAMME

SUSPEND?

CHECK PROGRAMME

STATUS BIT

YES

BIT 7.AND.15= “ 1”

BIT 3.OR11= “ 1”

CHECK Vcc

ERROR BIT

BIT 3.OR.11= “ 0”

BIT 4.OR.12= “ 1”

CHECK PROGRAMME

ERROR BIT

BIT 4.OR.12= “ 0”

ADDRESS=

NEXT ADDRESS

WRITE STATUS REGISTER

CLEAR COMMAND(5050h)

LAST ADDRESS?

YES

NO

WRITE RESET COMMAND(FFFFh)

PROGRAMME PASSED

PROGRAMME FAILED

MITSUBISHI

ELECTRIC

10/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

A

B

WRITE SUSPEND

COMMAND(B0B0h)

WRITE SUSPEND

COMMAND(B0h)

READ STATUS REGISTER

BIT 7.AND.15.= ” 0”

BIT 7.= ” 0”

CHECK PROGRAMME

STATUS BIT

CHECK PROGRAMME

STATUS BIT

BIT 7.= ” 1”

BIT 7.AND.15.= ” 1”

BI T 2.AND.10.= ” 0”

BI T 2.= ” 0”

CHECK PROGRAMME

SUSPEND BIT

CHECK PROGRAMME

SUSPEND BIT

BIT 2.= ” 1”

BIT 2.AND.10.= ” 1”

WRITE READ

COMMAND(FFFFh)

COMMAND(FFh)

READ DATA

WRITE RESUME

COMMAND(D0D0h)

WRITE RESUME

COMMAND(D0h)

PROGRAMME SUSPEND PASSED

Note 7: If Vcc error bit is detected, try to programme again at Vcc level.

This is a programme algorithm for a memory zone and not for a card.

Reading data from the zone generating programme suspend.

.OR. : =Logical or

; .AND. : =Logical and

MITSUBISHI

ELECTRIC

11/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

ERASE ALGORITHM

8 bit mode

ERASE START

ADDRESS=BLOCK ADDRESS

WRITE ERASE SETUP

COMMAND(20h)

WRITE ERASE COMMAND(D0h)

READ STATUS REGISTER

ERASE SUSPEND

NO

LOOP C

YES

BIT 7= ” 0”

ERASE

SUSPEND?

CHECK ERASE

STATUS BIT

BIT 7 = ” 1”

BIT 3= ” 1”

CHECK Vcc

ERROR BIT

BIT 3= ” 0”

BIT 4. OR. 5= ” 1”

BIT 5.OR.13= ” 1”

CHECK CONTROL

COMMAND BIT

BIT 4. OR. .5= ” 0”

CHECK ERASE

ERROR BIT

WRITE STATUS REGISTER CLEAR COMMAND(50h)

BIT 5.OR.13 = ” 0”

WRITE RESET COMMAND(FFh)

ERASE PASSED

ERASE FAILED

MITSUBISHI

ELECTRIC

12/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

ERASE ALGORITHM

16 bit mode

ERASE START

ADDRESS=BLOCK ADDRESS

WRITE ERASE SETUP

COMMAND(2020h)

WRITE ERASE COMMAND(D0D0h)

READ STATUS REGISTER

ERASE SUSPEND

NO

LOOP D

YES

BIT 7.AND.15= ” 0”

BIT 3.OR.11= ” 1”

ERASE

SUSPEND?

CHECK ERASE

STATUS BIT

BIT 7.AND>15 = ” 1”

CHECK Vcc

ERROR BIT

BIT 3.OR.11= ” 0”

BIT 4.OR.5 OR. 12.OR.13= ” 1”

CHECK CONTROL

COMMAND BIT

BIT 4.OR.5 OR. 12.OR.13= ” 0”

BIT 5.OR.13= ” 1”

CHECK ERASE

ERROR BIT

WRITE STATUS REGISTER CLEAR COMMAND(50h)

BIT 5 .OR.13= ” 0”

WRITE RESET COMMAND(FFh)

ERASE PASSED

ERASE FAILED

MITSUBISHI

ELECTRIC

13/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

C

D

WRITE SUSPEND

COMMAND(B0B0h)

WRITE SUSPEND

COMMAND(B0h)

READ STATUS REGISTER

BIT 7.AND.15.= ” 0”

BIT 7.= ” 0”

CHECK ERASE

STATUS BIT

CHECK ERASE

STATUS BIT

BIT 7.= ” 1”

BIT 7.AND.15.= ” 1”

BI T 6.AND.15.= ” 0”

BI T 6.= ” 0”

CHECK ERASE

SUSPEND BIT

CHECK ERASE

SUSPEND BIT

BIT 6.= ” 1”

BIT 6.AND.15.= ” 1”

READ /

PROGRAMME

WRITE RESUME

COMMAND(D0D0h)

WRITE RESUME

COMMAND(D0h)

PROGRAMME SUSPEND PASSED

Note 8 : If Vcc error bit is detected, try to programme again at Vcc level.

This is an erase algorithm for a memory block and not for a card.

Reading data from blocks other than the suspended block in the zone generating erase suspend.

.OR. : =Logical or

;

.AND. : =Logical and

ABSOLUTE MAXIMUM RATINGS

Symbol

VCC

VI

VO

Parameter

VCC Supply voltage

Input voltage

Conditions

Ratings

-0.5 to 6.5

-0.3 to VCC+0.3

0 to VCC

Unit

V

With respect to GND

Output voltage

V

Topr

Tstg

Operating temperature

Storage temperature

Read/Write Operation

0 to 70

-40 to 80

°C

MITSUBISHI

ELECTRIC

14/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

RECOMMENDED OPERATING CONDITIONS (Ta=0 to 55°C, unless otherwise noted)

Limits

Typ.

5.0

Parameter

VCC Supply voltage

High input voltage

Low input voltage

Number of simultaneous activated

memory zones/blocks

Symbol

Unit

Min.

4.75

Max.

5.25

VCC

VIH

VIL

V

Zone

Block

2.4

0

VCC

0.8

1

Programme

Erase

NACT

1

CAPACITANCE

Limits

Typ.

Test conditions

Parameter

Symbol

Min.

Max.

Ci

Co

Input capacitance

Output capacitance

VI=GND, vi=25mVrms, f=1 MHZ, Ta=25°C

VI=GND, vo=25mVrms, f=1 MHZ, Ta=25°C

45

pF

Note 9 : These parameters are not 100% tested.

ELECTRICAL CHARACTERISTICS

Ta= 0 to 55°C, VCC=5V+/-5%, unless otherwise noted)

Limits

Typ.

Unit

V

Conditions

Parameter

Symbol

VOH

Min.

Max.

IOH=-0.1mA, BVDn

IOH=-1.0mA, Other outputs

IOL=2mA

2.4

0

High output current

VOL

IIH

Low output voltage

High input current

0.4

10

V

µA

VI=VCC V

-10

-70

VI=0V

CE1#, CE2#, OE#, WE#, REG#

Other inputs

IIL

Low output voltage

µA

mA

-10

10

High output current

in off state

Low output current

in off state

Active VCC supply

current 1

IOZH

CE1#=CE2#=VIH or OE#=VIH,VO(Dm)=VCC

CE1#=CE2#=VIH or OE#=VIH, VO(Dm)=0V

-10

IOZL

CE1#=CE2#=VIL, Other inputs=VIH or VIL,

Outputs=open

130

110

200

ICC 1 • 1

Active VCC supply

current 2

CE1#=CE2# < 0.2V, Other inputs < 0.2V

or > VCC-0.2V, Outputs=open

mA

ICC 1 • 2

180

2MB

4MB

8MB

6.0

10

ICC 2 • 1 Standby VCC

supply current 1

CE1#=CE2#=VIH, Other

inputs=VIH or VIL

16MB

20MB

32MB

2MB

4MB

8MB

16MB

20MB

32MB

18

22

34

1.2

1.4

1.8

2.0

2.6

mA

0.05

0.10

0.20

0.25

0.40

ICC 2 • 2 Standby VCC supply CE1#=CE2# > VCC-0.2V,

current 2

Other inputs < 0.2V

or > VCC-0.2V

µA

Note 10 : Currents flowing into the card are taken as positive (unsigned).

Typical values are measured at VCC=5.0V,Ta=25°C.

The card consumes active current at programming, erasure even if both CE1# and CE2# are

high level.

MITSUBISHI

ELECTRIC

15/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

SWITCHING CHARACTERISTICS (COMMON MEMORY) (Ta= 0 to 55°C, Vcc=5V+/-5% )

Limits

Typ.

Parameter

Symbol

tcR

ta(A)

ta(CE)

ta(OE)

tdis(CE)

Unit

Min.

150

Max.

Read cycle time

ns

Address access time

Card enable access time

Output enable access time

150

75

Output disable time (from CE#)

Output disable time (from OE#)

Output enable time (from CE#)

tdis(OE)

ten(CE)

ten(OE)

tv(A)

75

ns

5

0

Output enable time (from OE#)

Data valid time after address change

TIMING REQUIREMENTS (COMMON MEMORY) (Ta= 0 to 55°C, Vcc=5V+/-5% )

Limits

Typ.

Parameter

Unit

Symbol

Min.

150

20

Max.

tcW

tSU(A)

trec(WE)

tsu(D-WEH) Data setup time

th(D)

Write cycle time

Address setup time

Write recovery time

ns

µs

ms

20

50

20

0

100

20

80

40

Data hold time

tWRR

Write recovery time before read

tsu(A-WEH) Address setup time to write enable high

tsu(CE)

th(CE)

tw(WE)

tWPH

tDP

tDE

Card enable setup time

Card enable hold time

Write pulse width

Write pulse width high

Duration of programming operation

Duration of erase operation

6.5

900

Note 11 : Refer to switching characteristics for read parameters

TIMING DIAGRAM

Common Memory Read

tcR

VIH

An

VIL

ta(A)

tV(A)

VIH

VIL

ta(CE)

CE#

OE#

tdis(CE)

ta(OE)

VIH

VIL

ten(CE)

ten(OE)

tdis(OE)

VOH

VOL

Dm

(DOUT)

OUTPUT VALID

High-Z

WE# =“H” level, REG# =”H” level

MITSUBISHI

ELECTRIC

16/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

TIMING DIAGRAM (COMMON MEMORY)

Programme Mode

PROGRAMME

STATUS REGISTER

PA

PROGRAMME

RESET

PA

SET UP

VIH

VIL

PA

An

trec(WE)

tcW

tsu(A-WEH)

tsu(A)

VIH

VIL

CE#

OE#

tWRR

tDP

th(CE)

tsu(CE)

VIH

VIL

tWPH

VIH

VIL

WE#

Dm

tsu(D-WEH)

th(WE)

tw(WE)

Din

VOH

VOL

Dout

FF

40

High-Z

REG# =”H” level

Erase Mode

ERESE

SET UP

STATUS REGISTER

PA

ERASE

PA

RESET

PA

VIH

An

PA

VIL

trec(WE)

tcW

tsu(A-WEH)

tsu(A)

VIH

CE#

VIL

tWRR

tDE

th(CE)

tsu(CE)

VIH

OE#

VIL

tWPH

VIH

WE#

VIL

tsu(D-WEH)

th(WE)

tw(WE)

Din

VOH

Dm

Dout

FF

40

VOL

High-Z

REG# =”H” level

MITSUBISHI

ELECTRIC

17/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

SWITCHING CHARACTERISTICS (ATTRIBUTE MEMORY)

Read Cycle (Ta= 0 to 55°C, VCC=5V+/-5%, unless otherwise noted)

Limits

Typ.

Parameter

Symbol

tcRR

Min.

300

Max. Unit

ns

Read cycle time

ta(A)R

Address access time

Card enable access time

Output enable access time

300

150

100

ns

ta(CE)R

ta(OE)R

tdis(dis)R

Output disable time (from CE#)

Output disable time (from OE#)

Output enable time (from CE#)

tdis(OE)R

ten(CE)R

tv(A)R

100

ns

5

0

Output enable time (from OE#)

Data valid time after address change

TIMING REQUIREMENTS (ATTRIBUTE MEMORY)

Write Cycle GM series only (Ta= 0 to 55°C, VCC=5V+/-5%, unless otherwise noted)

Limits

Typ.

Parameter

Symbol

Min.

30

Max. Unit

tASR

tAHR

tCSR

tCHR

tDSR

tDHR

tOESR

tOEHR

tWPR

tDLR

tBLR

tWCR

Address setup time

Address hold time

CE setup time

ns

µs

ms

30

40

30

120

40

30

40

170

120

100

10

CE hold time

Data setup time

Data hold time

OE setup time

OE hold time

Write pulse width

Data latch time

Byte load cycle time

Write cycle time

TIMING DIAGRAM (Attribute Memory)

Read

tCRR

VIH

An

VIL

ta(A)R

ta(CE)R

tv(A)R

VIH

CE#

VIL

ten(CE)R

tdis(CE)R

ta(OE)R

VIH

OE#

VIL

tdis(OE)R

ten(OE)R

VOH

VOL

High-Z

Dm

(DOUT)

OUTPUT VALID

WE# =“H” level, REG# =”L” level

MITSUBISHI

ELECTRIC

18/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

Byte Write (GM series only)

tAHR

VIH

An

VIL

tCSR

tASR

tCHR

VIH

CE#

VIL

tWPR

VIH

WE#

VIL

VIH

tOESR

tOEHR

OE#

tdis(OE)R

VIL

tDSR

tDHR

Hi-Z

VIH

VIL

Dm

(DIN)

ten(OE)R

Hi-Z

VOH

VOL

Dm

(DOUT)

REG# =“L” level

PAGE MODE WRITE (GM series only)

An

(n>5)

An

(A₀~A₅)

4h

0h

2h

3Ch

3Eh

CE#

th(CE)R

tsu(CE)R

tw(WE)R

WE#

tsu(A)R

tsu(OE-WE)R

OE#

th(OE-WE)R

tDLR

tBLCR

trec(WE)R

tcWR

th(D)R

t(D-WEH)R

Hi-Z

DIN

tdis(OE)R

Hi-Z

DOUT

REG# =“L” level

MITSUBISHI

ELECTRIC

19/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

Note 12 : AC Test Conditions

Input pulse levels : VIL=0.4V, VIH=2.8V

Input pulse rise, fall time : tr=tf=10ns

Reference voltage

Input : VIL=0.8V, VIH=2.4V

Output : VOL=0.8V, VOH=2.0V

(ten and tdis are measured when output voltage is ± 500mV from steady state. )

Load : 100pF+ 1 TTL gate

5pF+ 1 TTL gate (at ten and tdis measuring)

13 : The data write is performed during the interval when both CE# and WE# are “L” level.

14 : Do not apply inverted phase signal externally when Dm pin is in output mode.

15 : CE# is indicated as follows:

Read A/Write A : CE#=CE1#=CE2#

Read B/Write B : CE#=CE1#, CE2#=“H” level

Read C/Write C : CE#=CE2#, CE1#=“H” level

16:

Indicates the don’t care input.

RECOMMENDED POWER UP/DOWN CONDITIONS (Ta=0 to 55°C, unless otherwise noted)

Limits

Test conditions

Parameter

Symbol

Min.

0

Max.

VI

Unit

V

0V< VCC <2V

2V< VCC < VIH

VIH < VCC

Vi(CE)

CE input voltage

VCC-0.1

VI

V

VI

V

VIH

5.0

1.0

0.1

3.0

tsu(CE)

CE# setup time

CE# recovery time

VCC rise time

ms

µs

ms

trec(CE)

tpr(VCC)

tpf(VCC)

300

VCC fall time

POWER UP TIMING DIAGRAM

tpr(Vcc)

0.9×VCC

VCC

4.75V

tsu(CE)

VIH

2V

0.1×VCC

CE1#,CE2#

0V

Insertion

VCC

tpr(Vcc)

0.9×VCC

4.75V

tsu(CE)

VIH

2V

0.1×VCC

CE1#,CE2#

0V

Withdraw

BLOCK PROGRAM/ERASE TIME

Limits

Parameters

Unit

s

Typ.

1.1

0.5

Max.

10

2.1

Block erase time

Block program time

Note 17 : At Ta=25°C, Vcc=5V

Byte/word program time is about 8µs (typical), but not guaranteed.

MITSUBISHI

ELECTRIC

20/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

!

Warning ( if card with battery / card with auxiliary battery )

(1)Do not charge, short, disassemble, deform, heat, or throw the batteries into fire, as they may ignite, overheat,

rupture or explode.

(2)Place the batteries out of the reach of children. If somebody swallows them, they should see a doctor

immediately.

(3)When discarding or storing the batteries, wrap them individually with cellophane tape or other nonconductive

material. If they are positioned in contact with any other metals or batteries, they may explode, rupture or

leak electrolyte solution.

!

Caution

This product is not designed or manufactured for use in a device or system that is used under circumstances in

which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized

Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for a

special applications, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear,

or undersea repeater use.

Keep safety first in your circuit designs !

Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more

reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may

lead to personal injury, fire or property damage. Remember to give due consideration to safety when making

your circuit designs, with appropriate measures such as (1)placement of substitutive, auxiliary circuits,(2)use of

non-flammable material or (3)prevention against any malfunction or mishap.

Notes regarding these materials

lThese materials are intended as a reference to assist our customers in the selection of the Mitsubishi

semiconductor product best suited to the customer’s application; they do not convey any license under any

intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.

l Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-

party’s rights, originating in the use of any product data, diagrams, charts or circuit application examples

contained in these materials.

l All information contained in these materials, including product data, diagrams and charts, represent

information on products at the time of publication of these materials, and are subject to change by Mitsubishi

Electric Corporation without notice due to product improvements or other reasons. It is therefore

recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi

Semiconductor product distributor for the latest product information before purchasing a product listed

herein.

l For instruction on proper use of the IC card, thoroughly read the manual attached to the product before use.

After reading please store the manual in s safe place for future reference.

l The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole

or in part these materials.

l If these products or technologies are subject the Japanese export control restrictions, they must be exported

under a license from the Japanese government and cannot be imported into a country other than approved

destination. Any diversion or re-export contrary to the export control laws and regulations of Japan and/or

the country of destination is prohibited.

l Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product

distributor for further details on these materials or the products contained therein.

MITSUBISHI

ELECTRIC

21/22

Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

OUTLINE(68P-013)

MITSUBISHI

ELECTRIC

22/22

Feb.1999 Rev2.0


型号：	MF88M1-GMCAVXX
厂家：	Mitsubishi Group
描述：	8/16-bit Data Bus Flash Memory Card 8位/ 16位数据总线闪存卡闪存存储内存集成电路
文件：	总22页 (文件大小：148K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MF88M1-GMCAVXX [MITSUBISHI]

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