LX1664CN-TR [MICROSEMI]
Switching Controller;
| 型号： | LX1664CN-TR |
| 厂家： | 
Microsemi |
| 描述： | Switching Controller 开关 |
| 文件： | 总17页 (文件大小：873K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Not Recommended For New Design
LX1664 / 64A, LX1665 / 65A
D
UAL
OUTPUT PWM CONTROLLER WITH 5-BIT DAC
P
R O D U C T I O N A T A H E E T
D
S
T
H E
I
N F I N I T E
P
O W E R O F
I N N O V A T I O N
KEY FEATURES
DESCRIPTION
The LX1664/64A and LX1665/65A are
a DIP switch on the motherboard, or
monolithic switching regulator controller hardwired into the processor’s package (as
5-bit Programmable Output For
CPU Core Supply
Adjustable Linear Regulator
Driver Output
No Sense Resistor Required For
Short-Circuit Current Limiting
Designed To Drive Either
Synchronous Or Non-
in the case of Pentium® Pro and Pentium II
processors). The 5-bit code adjusts the
output voltage between 1.30 and 2.05V in
50mV increments and between 2.0 and 3.5V
in 100mV increments, conforming to the
Intel Corporation specification. The device
can drive dual MOSFET’s resulting in
typical efficiencies of 85 - 90% even with
IC’s designed to provide a low cost, high
performance adjustable power supply for
advanced microprocessors and other
applications requiring a very fast transient
response and a high degree of accuracy.
Short-circuit Current Limiting without
Expensive Current Sense Resistors.
Current-sensing mechanism can use PCB
Synchrous Output Stages
Sobility
Monstant Off-Time
Ae For st Transient
Re And ple System
Des
Availabr-Voltage
Protection (OVP) Crowbar Driver
d wer Good Flag (LX1665
trace resistance or the parasitic resistance of loads in excess of 10 amperes. For cost
the main inductor. The LX1664A and
LX1665A have reduced current sense
comparator threshold for optimum
performance using a sense resistor. For
applications requiring a high degree of
sensitive applications, the bottom MOSFET
can be replaced with a Schottky diode (non-
synchronous operation).
Linear Regulator Driver. The LX16
family of devices have a secondary
accuracy, a conventional sense resistor can be output. This can drive a OSFET o
APPLICATIONS
used to sense current.
transistor as a pass elemeconstr
low-cost adjustable linear retor sui
for powering a 1.5V GTL+ bus .5V
clock supply.
Socket 7 (Pentium Class)
Microprocessor Supplies
(including Intel Pentium
Processor, AMD-K6TM And
Cyrix® 6x86TM, Gx86TM and
M2TM Processors)
Pentium II and Deschutes
Processor & L2-Cache Supplies
Voltage Regulator Modules
Programmable Synchronous Rectifier
Driver for CPU Core. The main output is
adjustable from 1.3V to 3.5V using a 5-bit
code. The IC can read a VID signal set by
IMPORTANT: For the most current data, consult MICROSEMI’s website: hmi.com
PRDUGHLIGHT
LX1665 in a PentiuSinglehip Power Supply Solution
F1 20A
12V
5V
L
1µH
2
C3
0.1µF
6.3V
C5
1µF
1500µF x3
C2
Q1
IRL3102
1
2
3
4
6
7
8
9
18
R
SS
VC1
TDRV
GND
BDRV
VCC
1
Supply Voltage
for CPU Core
17
16
15
14
13
12
11
10
L
1
0.0025
INV
VOUT
VCC_CORE
VID0
VID1
VID2
VID3
2.5µH
Q2
IRL3303
C1
6.3V, 1500µF x 3**
** Three capacitors for Pentium
Four capacitors for Pentium II
C9
330µF
CT
C8
680pF
OV
Q4
IRLZ44
Supply Voltage
For I/ O Chipset or GTL+ Bus
VID4
L
DRV
L
PWRGD
FB
R
C7
330µF
5
18-pin
Wide-Body SOIC
OV
PWRGD
R
6
PACKAGE ORDER INFO
Plastic DIP
16-Pin
Plastic DIP
Plastic SOIC
16-Pin
Plastic SOIC Wide
18-Pin
RoHS Compliant / Pb-free
Transition DC: 0516
N
N
D
DW
18-Pin
RoHS Compliant / Pb-free
Transition DC: 0503
TA (°C)
RoHS Compliant / Pb-free
Transition DC: 0440
LX1664CN
LX1664ACN
LX1665CN
LX1665ACN
LX1664CD
LX1664ACD
LX1665CDW
LX1665ACDW
0 to 70
Note: Available in Tape & Reel. Append the letters ‘TR’ to the part number. (i.e. LX1664CD-TR)
L
I N
F
I N I T Y
M
I C R O E L E C T R O N I C S
I N C .
Copyright © 1999
Rev. 1.3a,2005-03-17
1
11861 WESTERN
A
VENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
DESCRIPTION (con't.)
PACKAGE PIN OUTS
Smallest Package Size. The LX1664 is
sient response for a given inductor, reduc-
ing output capacitor requirements, and re-
ducing the total regulator system cost.
Over-Voltage Protection and Power
Good Flag. The OVP output in the LX1665
& LX1665A can be used to drive an SCR
crowbar circuit to protect the load in the
event of a short-circuit of the main MOSFET.
The LX1665 & LX1665A also have a logic-
level Power Good Flag to signal when the
output voltage is out of specified limits.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SS
INV
VC1
available in a narrow body 16-pin surface
mount IC package for space sensitive appli-
cations. The LX1665 provides the additional
functions of Over Voltage Protection (OVP)
and Power Good (PWRGD) output drives
for applications requiring output voltage
monitoring and protection functions.
Ultra-Fast Transient Response re-
duces system cost. The modulated off-
time architecture results in the fastest tran-
TDRV
GND
BDRV
VCC
VCC_CORE
VID0
VID1
VID2
VID3
CT
LDRV
LFB
E — 16-Pin
664A (Top View)
1
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
S
VC1
TDRV
GND
BDRV
VCC
DEVICE SELECTION GUIDE
VCC_CORE
VID0
D1
VID2
VID3
VID4
LFB
OVP and
Current-Sense
DEVICE
Packages
Power Good
Comp. Thresh. (mV) Optimal Load
CT
LX1664
16-pin SOIC
& DIP
100
60
Pentium-class (<
OV
No
LDRV
LX1664A
LX1665
PeII (> 10
Pentiuass (<1
Pentium I0A)
PWRGD
18-pin SOIC
& DIP
100
60
Yes
N PACKAGE — 18-Pin
LX1665/1665A (Top View)
LX1665A
ABSOLUTE MAXIMUM RATINGS
1
16
15
14
13
12
11
10
9
SS
INV
VC1
2
3
4
5
6
7
8
TDRV
GND
BDRV
VCC
Supply Voltage (VC1) ........................................................................ 25V
Supply Voltage (VCC) ........................................................................... 15V
Output Drive Peak Current Source (500ns)...................................... 1.5A
Output Drive Peak Current Sink (500ns) .............................................................. 1.5A
Input Voltage (SS, INV, VCC_CORE, CT, VID0-VID........................... -0.3V to 6V
Operating Junction Temperature
VCC_CORE
VID0
VID1
VID2
VID3
VID4
CT
LDRV
LFB
D PACKAGE — 16-Pin
LX1664/1664A (Top View)
Plastic (N, D & DW Packages) ........................................................................ 150°C
Storage Temperature Range ........................................ -65°C to +150°C
Lead Temperature (SolderinSe................................................... 300°C
Peak Package Solder Reflow Temp (e)............................................260°C(+0, -5)
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
SS
INV
VC1
Note 1. Exceeding these atings coulthe device. All voltages are with respect
to Groundpositivve out of the specified terminal. Pin
numbeges on
TDRV
GND
BDRV
VCC
VCC_CORE
VID0
VID1
VID2
VID3
VID4
LFB
RMAL DATA
CT
OV
LDRV
N (16-PIN DIP)
PWRGD
THERMAL RESISTO AMBIENT, θJA
N (18-PIN DIP) PACKA
65°C/W
60°C/W
120°C/W
90°C/W
DW PACKAGE — 18-Pin
LX1665/1665A (Top View)
RoHS / Pb-free 100% Matte Tin Lead Finish
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
D PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
DW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no ambient airflow
Copyright © 1999
Rev. 1.3a 11/04
2
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
ELECTRICAL CHARACTERISTICS
(
Unless otherwise specified, 10.8 < VCC < 13.2, 0°C ≤ TA ≤ 70°C. Test conditions: VCC = 12V, T = 25°C. Use Application Circuit.)
LX1664/1665 (A)
Parameter
Symbol
Test Conditions
Units
Min. Typ.
Max.
Reference & DAC Section (See Table 1 - Next Page)
Regulation Accuracy (See Table 1)
Regulation Accuracy
(Less 40mV output adaptive positioning), VCC = 12V, ILOAD = 6A
-30
-1
30
1
mV
%
1.8V ≤ VOUT ≤ 2.8V
Timing Section
Off Time Initial
OT
VCC_CORE = 1.3V, CT = 390pF
VCC_CORE = 3.5V, CT = 390pF
VCC_CORE = 1.3V to 3.5V
40
210
µs
µs
ppm
µA
V
Off Time Temp Stability
Discharging Current
Ramp Peak
240
IDIS
VP
VCC_CORE = 1.3V, VCT = 1.5V
0.9
0.3
1
0.42
100
1.1
0.47
V
V
Ramp Peak-Valley
VRPP
VCC_CORE = 1.3V
VCC_CORE = 3.5V
10% Overdrive
ns
Ramp Valley Delay to Output
Error Comparator Section
Input Bias Current
IB
1.3V < VSS = VINV < 3.5V
10% Overdrive
0.8
41
2
46
µA
mV
ns
36
Input Offset Voltage
EC Delay to Output
VIO
200
Current Sense Section
Input Bias Current (VCC_CORE Pin)
IB
1.3V < VINV = VCC_CORE < 3
Initial Accuracy
27
100
60
35
115
70
µA
mV
mV
ns
Pulse By Pulse CL
LX1664/1665
VCLP
85
50
LX1664A/1665A
Initial Accuracy
200
CS Delay to Output
10% Overdrive
Output Drivers Section
Drive Rise Time
Drive Fall Time
TR
TF
VC1 = V2V, CL = 30
VC1 CC = 12V, 3000pF
VCC ISO= 20mA
VCC = 12V, ISI200mA
= VCC = 12V, URCE = 20mA
70
70
11
ns
ns
V
Drive High
VDH
10
V
V
V
0.06
0.8
0.8
0.1
1.2
1.4
Drive Low
VCC = 12V, ISINK = 200mA
V
Output Pull Down
= 0, IPULL UP = 2mA
UVLO and S.S. Section
Start-Up Threshold
Hysteresis
VHY
ISD
9.9
2
10.1
0.31
5.5
10.4
V
V
mA
V
SS Sink Current
VC1 = 10.1V
0.15
0.6
27
92
SS Sat Voltage
VOL
VC1 = 9V, ISD = 200µA
Supply Curren
Dynamic Operatin
ICD
VCC = VC1 = 12V, Out Freq = 200kHz, CL = 0
mA
Power Good / Ovetection Section (LX1665 Only)
Lower Threshold
Hysteresis
(VCC_CORE / DACOUT
)
88
90
1
%
%
Power Good Voltage Low
Over-Voltage Threshold
OVP Sourcing Current
I
PWRGD = 5mA
0.5
117
45
0.7
125
V
%
mA
110
30
(VCC_CORE / VDAC
)
VOV = 5V
Linear Regulator Section
Output Voltage
Set by external resistors
1.5
3.6
1.5
V
%
Setpoint Accuracy
IL = 0.5A using 0.5% resistors
-1.5
40
70
ppm
%
Output Temperature Drift
Load Regulation
1.5
3
%
mA
Cummulative Accuracy
Op-Amp Output Current
50
Open Loop
Copyright © 1999
Rev. 1.3a 11/04
3
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
ELECTRICAL CHARACTERISTICS
Table 1 - Adaptive Transient Voltage Output (Output Voltage Setpoint Typical)
Processor Pins
Output Voltage (VCC_CORE
)
0 = Ground, 1 = Open (Floating)
VID4 VID3 VID2 VID1 VID0
0.0A
Nominal Output*
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1.34V
1.39V
1.44V
1.49V
1.54V
1.59V
1.64V
1.69V
1.74V
1.79V
1.84V
1.89V
1.94
1.99
2.04V
2.09V
4V
2.2
2.34V
2.44V
.54V
.64V
2.74V
2.84V
2.94V
3.04V
3.14V
3.24V
3.34V
3.44V
3.54V
1.30V
1.35V
1.40V
1.45V
1.50V
1.55V
0V
5V
1.
1.80
1.85V
1.90V
5V
0V
05V
2.00V
2.10V
2.20V
2.30V
2.40V
2.50V
2.60V
2.70V
2.80V
2.90V
3.00V
3.10V
3.20V
3.30V
3.40V
3.50V
* Nomoltage with no adaptive output voltage positioning.
Note:
Adaptive Te Out
In order tesponse a 40mV
offset is bunse comparator.
At high currut voltage will be
lower than the point, as shown in
Figure 1. The actual output voltage will be a
function of the sense resistor, the output current
and output ripple.
Time - 100µs/Div.
FIGURE 1 — Output Transient Response
(using 5mΩ sense resistor and 5µH output inductor)
Copyright © 1999
Rev. 1.3a 11/04
4
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
CHARACTERISTICS CURVES
95
90
85
80
75
70
100
95
90
85
80
Output Set Point
Output nt
EFFICIENCY AT 3.1V
V
EFFICIENCY AT 2.8V
EFFICIENCY AT 1.8V
2.8V
75
AT 1.8V
70
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
3
6
7
8
9
10
11
12
13
14
IOUT (A)
IOUT (A)
FIGURE 2 — Efficiency Test Results:
URE 3 — Efficiency Test Results:
Non-Synchronous Operation, VIN = 5V
Synchronous Operation, VIN = 5V
90
85
5
60
Output Set Point
1.8V EFFICIENCY
2.8V EFFICIENCY
3.3V EFFICIENCY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IOUT (A)
FIGURE 4 — Efficiency Test Results: Synchronous Operation, VIN = 12V.
Note: Non-synchronous operation not recommended for 12V operation, due to power loss in Schottky diode.
Copyright © 1999
Rev. 1.3a 11/04
5
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
BLOCK DIAGRAM
VCC
VC1
18
1
SS
PWM Latch
Trimmed
2V REF
2V Out
UVLO
S
Q
TDRV
GND
BDRV
17
16
15
R DOM
10.6/10.1
R
Q
Internal
VCC
VREG
Break
40mV
Be
M
2
INV
0.7V
Error Comp
CS Comp
Off-Time
Controller
SYNC EN
Comp
VCC
14
100mV **
3
VCC_CORE
OV Cp
13
CT
OV*
12
10
PWRGD*
UV Comp
10k
DAC OUT
LX1665/1665A ONLY
Linear Op Amp
1.5V
DAC
LDRV
11
9
LFB
4
5
ID4
Note: Pin numbers are correct for LX1665/1665A, 18-pin package.
* Not connected on LX1664/1664A.
VID1
** 60mV in LX1664A/1665A.
FIGURE 5 — LX1664/1665 Block Diagram
Copyright © 1999
Rev. 1.3a 11/04
6
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
FUNCTIONAL PIN DESCRIPTION
Pin
Name
LX1664
Pin #
LX1665
Pin #
Description
SS
INV
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Soft-Start pin, internally connected to the non-inverting input of the error comparator.
Inverting input of the error comparator.
VCC_CORE
VID0
VID1
VID2
VID3
VID4
Output voltage. Connected to non-inverting input of the current-sense comparator.
Voltage Identification pin (LSB) input used to set output voltage.
Voltage Identification pin (2nd SB) input.
Voltage Identification pin (3rd SB) input.
Voltage Identification pin (4th SB) input.
Voltage Identification pin (MSB) input. This pin is also tange select pin — when low
(CLOSED), output voltage is set to between 1.2.05V in increments. When high
(OPEN), output is adjusted from 2.0 to 3.5V ements.
LFB
9
9
Linear regulator feedback pin. referennnecto a resistor divider to set desired
output voltage.
PWRGD
LDRV
N.C.
10
10
11
12
13
14
15
Open collector output pulls low when output voltage is out of limits.
Linear regulator drive pin. Cto gate MOSFET for linear regulator function.
SCR driver goes high whor's supply is over specified voltage limits.
The off-time is programng a timing capacitor to this pin.
This is the (12V) pply to well as gate drive to the bottom FET.
OV
N.C.
11
CT
VCC
12
BDRV
13
This is the gdrive to e bottom FET. Leave open in non-synchronous operation (when bottom
FET is reped ky diode).
GND
TDRV
VC1
14
15
16
16
1
18
Both power and signal und of the device.
or toOSFET.
parate power supply input for the top drive. Can be connected to a charge pump
V is available.
Copyright © 1999
Rev. 1.3a 11/04
7
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
THEORY OF OPERATION
IC OPERATION
PROGRAMMING THE OUTPUT VOLTAGE
Referring to the block diagram and typical application circuit, the
output turns ON the top MOSFET, allowing the inductor current to
increase. At the error comparator threshold, the PWM latch is reset,
the top MOSFET turns OFF and the synchronous MOSFET turns ON.
The OFF-time capacitor CT is now allowed to discharge. At the
valley voltage, the synchronous MOSFET turns OFF and the top
MOSFET turns on. A special break-before-make circuit prevents
simultaneous conduction of the two MOSFETS.
The VCC_CORE pin is offset by +40mV to enhance transient
response. The INV pin is connected to the positive side of the
current sense resistor, so the controller regulates the positive side
of the sense resistor. At light loads, the output voltage will be
regulated above the nominal setpoint voltage. At heavy loads, the
output voltage will drop below the nominal setpoint voltage. To
minimize frequency variation with varying output voltage, the OFF-
time is modulated as a function of the voltage at the VCC_CORE pin.
The output voltage is set by means of a 5-bit digital Voltage
Identification (VID) word (See Table 1). The VID code may be hard-
wired into the package of the processor which do not have a VID
code, the output voltage can be set by means of a DIP switch or
jumpers. For a low or '0' signal, connect the VID pin to ground (DIP
switch ON); for a high or '1' signal, lehe VID pin open (DIP
switch OFF).
The five VID pins on the LX166designed to interface
directly with a Pentium Pro or Penprocer. Therefore, all
inputs are expected ther gror flng. Any floating
input will be pulled higternal cons. If using a Socket
7 processor, or other load, VID code can be set directly by
connecting jumpers or DIP sws the VID[0:4] pins.
The VID pt desigto take TTL inputs, and
should not ted high. Unpredictable output voltages
result. I66x vices are to be connected to a logic
cirsuch aS, forogramming of output voltage, they
shoulbufferCMOS gate with open-drain, such as a
74HC125 4C906.
ERROR VOLTAGE COMPARATOR
The error voltage comparator compares the voltage at the positive
side of the sense resistor to the set voltage plus 40mV. An external
filter is recommended for high-frequency noise.
GOOD IGNAL (LX1665 only)
collector output is provided which presents high imped-
n the output voltage is between 90% and 117% of the
med VID voltage, measured at the SS pin. Outside this
dow the output presents a low impedance path to ground. The
Power Good function also toggles low during OVP operation.
CURRENT LIMIT
Current limiting is done by sensing the inductor currenteeding
the current sense threshold turns the output drive Oand latches
it OFF until the PWM latch Set input goes high ag. See
Limit Section in "Using The LX1664/65 Devices" his da
sheet.
OVER-VOLTAGE PROTECTION
The controller is inherently protected from an over-voltage condi-
tion due to its constant OFF-time architecture. However, should a
failure occur at the power switch, an over-voltage drive pin is
provided (on the LX1665 only) which can drive an external SCR
crowbar (Q3), and so blow a fuse (F1). the fault condition must be
removed and power recycled for the LX1665 to resume normal
operation (See Figure 9).
OFF-TIME CONTROL TIMING
The timing capacitor CT allows proFF-time. The
timing capacitor is quarged dme of the top
MOSFET and alloe when p MOSFET is OFF.
In order to mintions wproviding different
supply voltageis modulated by the voltage
at the VCC_CORE nversely proportional to the
VCC_CORE voltage
LINEAR REGULATOR
The product highlight application shows an application schematic
using a MOSFET as the pass element for a linear regulator. this
output is suitable for converting the 5V system supply to 3.3V for
processor I/O buffers, memory, chipset and other components. The
output can be adjusted to any voltage between 1.5V and 3.6V in
order to supply other (lower) power requirements on a mother-
board. See section "Using the LX1664/1665 Devices" at the end of
this data sheet.
UNDER VOLTAGE LO
The purpose of the UVLO is to keep the output drive off until the
input voltage reaches the start-up threshold. At voltages below the
start-up voltage, the UVLO comparator disables the internal biasing,
and turns off the output drives. The SS (Soft-Start) pin is pulled low.
SYNCHRONOUS CONTROL
The synchronous control section incorporates a unique break-
before-make function to ensure that the primary switch and the
synchronous switch are not turned on at the same time. Approxi-
mately 100 nanoseconds of deadtime is provided by the break-
before-make circuitry to protect the MOSFET switches.
Copyright © 1999
Rev. 1.3a 11/04
8
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
APPLICATION INFORMATION
12V
5V
C3
0.1µF
6.3V
C5
1500µF x3
U1
LX1664
1µF
C2
1
2
3
4
5
6
7
8
16
SS
VC1
TDRV
GND
BDRV
VCC
Q1
15
14
13
12
11
10
9
INV
R1
2.5m
IRL3102
Supply age
or Core
VCC_CORE
VID0
VID1
VID2
VID3
VID4
L1, 2.5µ
W
VID0
VID1
VID2
VID3
VID4
VOUT
Q2
IRL3303
C1
CT
C8
680pF
6.3V, 1500µF x 3**
** Three capacitors for Pentium
Four capacitors for Pentium II
LDRV
9
LFB
30µF
16-pin
Narrow Body SOIC
Q4
IRLZ44
R5
Supply Voltage
For I/O Chipset or GTL+ Bus
C7
330µF
R6
FIGURE 6 — LX1664 In A Pentium / S7 Single-Cower Supply Controller Solution (Synchronous)
12V
5V
C3
0.1µF
6.3V
1500µF x3
LX
C5
C2
6
7
8
16
1µF
VC1
TDRV
GND
BDRV
VCC
15
14
13
12
11
10
9
R1
0.005
Supply Voltage
for CPU Core
Q1
IRL3102
ORE
D0
VID1
VID2
VID3
VID4
L1, 5µH
VID0
VOUT
D1
VID1
VID2
VID3
VID4
C1
6.3V, 1500µF x 3**
CT
C9
330µF
** Three capacitors for Pentium
Four capacitors for Pentium II
LDRV
Q4
IRLZ44
C8
680pF
Supply Voltage
For I/O Chipset or GTL+ Bus
LFB
16-pin
Narrow Body SOIC
C7
330µF
R5
R6
FIGURE 7 — LX1664 In A Non-Synchronous / Socket 7 Power Supply Application
Copyright © 1999
Rev. 1.3a 11/04
9
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
APPLICATION INFORMATION
CS
F1 15A
12V
5V
L2
1µH
C3
0.1µF
RS
C5
1µF
C2
U1
LX1665
6.3V
1500µF x3
Q1
IRL3102
1
2
3
4
5
6
7
8
9
18
SS
VC1
TDRV
GND
BDRV
VCC
y Voltage
CPU e
17
16
15
14
13
12
11
10
L
INV
VCC_CORE
VID0
VID1
VID2
VID3
VID4
LFB
2.5µ
UT
Q2
IRL3303
VID0
VID1
VID2
VID3
VID4
or 3.3V
S
C1
CT
6.3V, 1500µF x 3
** Three capacitors for Pentium
Four capacitors for Pentium II
C8
680pF
OV
C9
330µF
LDRV
PWRGD
1.5V for
GTL+ Bus Supply
18-pin
Wide Body SOIC
OV
PWRGD
IRL
R5
C7
330µF
R6
FIGURE 8 — VRM 8.2 (Pentium II / DeschuteDesign With Loss-Less Current Sensing
D2
D3
12V 5V
6.3V
F1 20A
1N414
1N4148
C10
0.1µF
C3
0.1µF
C5
1500µF x3
R7
10
C2
1
6
7
8
9
18
17
16
15
14
13
12
11
10
Q1
IRL3303
R1
SS
VC1
TDRV
GND
BDRV
VCC
Supply Voltage
for CPU Core
L1 2.5µH
0.0025
INV
CC_CORE
ID0
VID1
VID2
VID3
VID4
LFB
VOUT
Q2
IRL3102
VID0
C9
330µF
VID1
VID2
VID3
VID4
CT
Q3
D4
C1
C8
1500µF
SCR
2N6504
1N5817
OV
LDRV
PWRGD
Q4
IRLZ44
R2, 10k
18-pin
Wide-Body SOIC
Supply Voltage
PWRGD
For I/O Chipset or GTL+ Bus
C7
330µF
R5
R6
FIGURE 9 — Full-Featured Pentium II Processor Supply With 12V Power Input
Copyright © 1999
Rev. 1.3a 11/04
10
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
BILL OF MATERIALS
LX1665 Bill of Materials (Refer to Product Highlight)
Ref
Description
Part Number / Manufacturer
Qty.
C1
1500µF, 6.3V capacitor
1500µF, 6.3V capacitor
330µF, Electrolytic
0.1µF
MV-GX Sanyo
MV-GX Sanyo
MV-GX Sanyo
SMD Cap
4
2
2
1
1
1
1
1
1
1
1
1
2
1
1
C2
C7, C9
C3
C4
390pF
SMD Cap
C8
680pF
SMD Cap
C5
1µF, 16V
SMD Ceramic
HM0096832 BI or equivalent
L1
2.5µH Inductor
1µH Inductor
L2
Q1
Q2
Q3
R5, R6
R1
MOSFET
IRL3102 International Rectifier or equi
IRL3303 International Requivale
IRLZ44 International uivalent
SMD Rtor
MOSFET
MOSFET
Resistor (See Table 6 for values)
2.5mΩ Sense Resistor
Controller IC
IRC OARr PCB t
U1
LX1665CDW finity
Total
21
USING THE LX5 DEVICES
The LX1664/65 devices are very easy to design with, requiri
only a few simple calculations to implement a given degn. The
following procedures and considerations should vide effec-
tive operation for virtually all applications. Refto the
cation Information section for component resign
tors.
using a 5V input voltage, the switching frequency (fS)
approximated as follows:
IDIS
C = 0.621
*
T
fS
Choosing a 680pF capacitor will result in an operating
frequency of 183kHz at VOUT = 2.8V. When a 12V power input
is used, he capacitor value must be changed (the optimal timing
capacitor for 12V input will be in the range of 1000-1500pF).
TIMING CAPACITOR SELECTI
The frequency of operation of thtion of duty
cycle and OFF-time. TFF-time to the timing
capacitor (which in all n schematics in
this data sheeted to nimize frequency
variations witquency is constant, during
steady-state oodulation of the OFF-time.
The timing ld be selected using the
following equat
L1 OUTPUT INDUCTOR SELECTION
The inductance value chosen determines the ripple current
present at the output of the power supply. Size the inductance
to allow a nominal ±10% swing above and below the nominal DC
load current, using the equation L = VL ∆T/∆I, where ∆T is the
*
OFF-time, VL is the voltage across the inductor during the OFF-
time, and ∆I is peak-to-peak ripple current in the inductor. Be
sure to select a high-frequency core material which can handle
the DC current, such as 3C8, which is sized for the correct power
level. Typical inductance values can range from 2 to 10µH.
Note that ripple current will increase with a smaller inductor.
Exceeding the ripple current rating of the capacitors could cause
reliability problems.
(1 - VOU
DIS
CT =
f (1.52 - 0.29
V
)
*
S
OUT
Where IDIS is fixed at 200µA and fS is the switching frequency
(recommended to be around 200kHz for optimal operation and
component selection).
Copyright © 1999
Rev. 1.3a 11/04
11
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
INPUT INDUCTOR SELECTION
C1 FILTER CAPACITOR SELECTION (continued)
In order to cope with faster transient load changes, a smaller
output inductor is needed. However, reducing the size of the
output inductor will result in a higher ripple voltage on the input
supply. This noise on the 5V rail can affect other loads, such as
graphics cards. It is recommended that a smaller input inductor,
aluminum electrolytic, and have demonstrated reliability. The
Oscon series from Sanyo generally provides the very best
performance in terms of long term ESR stability and general
reliability, but at a substantial cost penalty. The MV-GX series
provides excellent ESR performance, meeting all Intel transient
specifications, at a reasonable cost. Beof off-brand, very-low
cost filter capacitors, which have bto degrade in both
ESR and general electrolyte charover ime.
L (1 - 1.5µH), is used on the 5V rail to filter out the ripple. Ensure
2
that this inductor has the same current rating as the output
inductor.
C1 FILTER CAPACITOR SELECTION
CURRENT LIMIT
The capacitors on the output of the PWM section are used to filter
the output current ripple, as well as help during transient load
conditions, and the capacitor bank should be sized to meet ripple
and transient performance specifications.
Current limiting occura sensed voltage, proportional to
load current, exceeds the nt-sense comparator threshold
value. The currbe senser by using a fixed sense
resistor in she inductor to cause a voltage drop
pportional t, or y using a resistor and capacitor in
pel with ductosense the voltage drop across the
pararesistaof thnductor.
The 66x famiffers two different comparator thresholds.
The LX161665 have a threshold of 100mV, while the LX1664A
X1665e a threshold of 60mV. The 60mV threshold is
ited to higher current loads, such as a Pentium II or
s processor.
When a transient (step) load current change occurs, the output
voltage will have a step which equals the product of the Effective
Series Resistance (ESR) of the capacitor and the current step (∆I).
when current increases from low (in sleep mode) to high, the
output voltage will drop below its steady state value. In the
advanced microprocessor power supply, the capacitor should
usually be selected on the basis of its ESR value, rather than th
capacitance or RMS current capability. Capacitors that satisfy
ESR requirement usually have a larger capacitance and curre
capability than needed for the application. The allowable ESR can
be found by:
Resistor
current sense resistor, R , is selected according to the formula:
1
ESR * (IRIPPLE + ∆I) < VEX
R1 = VTRIP / ITRIP
Where VEX is the allowable output e excursion ie
transient and IRIPPLE is the indurippegulatrs such
as the LX166x series, have adapositioning,
which adds 40mV to the DC set-pis therefore
the difference betwow load he minimum
dynamic voltage microsor.
Where VTRIP is the current sense comparator threshold (100mV
for LX1664/65 and 60mV for LX1664A/65A) and ITRIPis the desired
current limit. Typical choices are shown below.
TABLE 2 - Current Sense Resistor Selection Guide
Sense Resistor
Value
Recommended
Controller
Load
Ripple curreoutput ductor value (LOUT),
and can be ap:
Pentium-Class Processor (<10A)
Pentium II Class (>10A)
5mΩ
2.5mΩ
LX1664 or LX1665
LX1664A or LX1665A
IRIPPLE
=
A smaller sense resistor will result in lower heat dissipation (I²R)
and also a smaller output voltage droop at higher currents.
There are several alternative types of sense resistor. The
surface-mount metal “staple” form of resistor has the advantage of
exposure to free air to dissipate heat and its value can be
controlled very tightly. Its main drawback, however, is cost. An
alternative is to construct the sense resistor using a copper PCB
trace. Although the resistance cannot be controlled as tightly, the
PCB trace is very low cost.
Where fS is the swquency.
Electrolytic capacitors can be used for the output filter capaci-
tor bank, but are less stable with age than tantalum capacitors. As
they age, their ESR degrades, reducing the system performance
and increasing the risk of failure. It is recommended that multiple
parallel capacitors are used so that, as ESR increases with age,
overall performance will still meet the processor's requirements.
There is frequently strong pressure to use the least expensive
components possible, however, this could lead to degraded long-
term reliability, especially in the case of filter capacitors. Linfinity's
demo boards use Sanyo MV-GX filter capacitors, which are
Copyright © 1999
Rev. 1.3a 11/04
12
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
CURRENT LIMIT (continued)
CURRENT LIMIT (continued)
The current flowing through the inductor is a triangle wave. If the
sensor components are selected such that:
PCB Sense Resistor
A PCB sense resistor should be constructed as shown in Figure
10. By attaching directly to the large pads for the capacitor and
inductor, heat is dissipated efficiently by the larger copper masses.
Connect the current sense lines as shown to avoid any errors.
L/RL = RS CS
*
The voltage across the capacitor will be equal to the current
flowing through the resistor, i.e.
2.5m
W
Sense Resistor
VCS = ILRL
100mil Wide, 850mil Long
2.5mm x 22mm (2 oz/ft2 copper)
Since VCS reflects the inducrent, selecting the
appropriate RS and CSn be to rethe comparator
voltage (60mV for LXor 100he LX166x) at the
desired trip current.
Inductor
Design Examp
(Pentium II ca maximum static current of 14.2A)
gain of r cae characterized as:
Output
Capacitor Pad
|T
j
w
Sense Lines
FIGURE 10 — Sense Resistor Construction Diagram
Recommended sense resistor sizes are given in the followin
table:
/RSCS
TABLE 3 - PCB Sense Resistor Selection Guide
Copper Copper Desired Resistor Dimensionx l)
Weight Thickness Value
2 oz/ft2
68µm 2.5m
5m
w
mm
inches
1/RSCS RL/L
FIGURE 12 — Sensor Gain
Ω
2.5 x 2
2.5 x 43
.8
0.1 x 1.7
Ω
The dc/static tripping current Itrip,S satisfies:
Loss-Less Current Sensing UsReductor
Any inductor has a parasitic rescauses a DC
voltage drop when current flows thor. Figure 11
shows a sensor cirg of a unt resistor, RS,
and capacitor, the inor, eliminating the
current sense
Vtrip
Itrip,S
=
RL
Select L/RSCS ≤ RL to have higher dynamic tripping current
than the static one. The dynamic tripping current Itrip,d satisfies:
Vtrip
Itrip,d
=
L/(RSCS)
RL
Load
General Guidelines for Selecting RS , CS , and RL
Vtrip
RL =
Select: RS ≤ 10 kΩ
Itrip,S
RS
Ln
CS
RS2
and CS according to:
CS n
=
RL RS
Current
Sense
Comparator
The above equation has taken into account the current-de-
pendency of the inductance.
VCS
The test circuit (Figure 6) used the following parameters:
RL = 3mΩ, RS = 9kΩ, CS = 0.1µF, and L is 2.5µH at 0A current.
FIGURE 11 — Current Sense Circuit
Copyright © 1999
Rev. 1.3a 11/04
13
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
CURRENT LIMIT (continued)
FET SELECTION (continued)
In cases where RL is so large that the trip point current would
be lower than the desired short-circuit current limit, a resistor (RS2)
can be put in parallel with CS, as shown in Figure 11. The selection
of components is as follows:
For the IRL3102 (13mΩ RDS(ON)), converting 5V to 2.8V at 14A
will result in typical heat dissipation of 1.48W.
Synchronous Rectification – Lower MOSFET
The lower pass element can be either a MOSFET or a Schottky
diode. The use of a MOSFET (synchronectification) will result
in higher efficiency, but at higher cg a Schottky diode
(non-synchronous).
RL (Required)
RL (Actual)
RS2
=
RS2 + RS
L
L
RS + RS2
RS2
Power dissipated ithe bottoFET wbe:
CS =
=
*
RL (Actual) (RS2 // RS)
RL (Actual)
R
*
S
*
PD = I2
R
uty Cycle] 4W
*
*
DS(ON)
[IRL3303 or 1.12W for t3102]
Again, select (RS2//RS) < 10kΩ.
Catch Diode SFET
FET SELECTION
A low-poweiode, such as a 1N5817, is recommended
e connetweehe gate and source of the lower
MOT wheating m a 12V-power supply (see Figure 9).
This welp proontroller IC against latch-up due to the
inductor ge going negative. Although latch-up is unlikely, the
of such atch diode will improve reliability and is highly
ended
To insure reliable operation, the operating junction temperature
of the FET switches must be kept below certain limits. The Intel
specification states that 115°C maximum junction temperature
should be maintained with an ambient of 50°C. This is achieved
by properly derating the part, and by adequate heat sinking. One
of the most critical parameters for FET selection is the RDS ON
resistance. This parameter directly contributes to the pow
dissipation of the FET devices, and thus impacts heat sink desi
mechanical layout, and reliability. In general, the larger t
current handling capability of the FET, the lower the RON will
be, since more die area is available.
chronous Operation - Schottky Diode
Schottky diode, with a forward drop of 0.6V will dissipate
4 [1 – 2.8/5] = 3.7W (compared to the 1.1 to 2.2W dissipated
*
by a MOSFET under the same conditions). This power loss
becomes much more significant at lower duty cycles – synchro-
nous rectification is recommended especially when a 12V-power
input is used. The use of a dual Schottky diode in a single TO-220
package (e.g. the MBR2535) helps improve thermal dissipation.
TABLE 4 - FET Selection Guide
This table gives selection of suitable FETs from Interectifie
Device
RDS(ON)
@
ID @
Max. Brea
10V (mΩ)
TC =
down age
IRL3803
IRL22203N
IRL3103
IRL3102
IRL3303
IRL2703
6
56
24
17
30
30
30
20
30
30
MOSFET GATE BIAS
7
The power MOSFETs can be biased by one of two methods:
charge pump or 12V supply connected to VC1.
1) Charge Pump (Bootstrap)
When 12V is supplied to the drain of the MOSFET, as in
Figure 9, the gate drive needs to be higher than 12V in order
to turn the MOSFET on. Capacitor C10 and diodes D2 & D3
are used as a charge pump voltage doubling circuit to raise
the voltage of VC1 so that the TDRV pin always provides a
high enough voltage to turn on Q1. The 12V supply must
always be connected to VCC to provide power for the IC
itself, as well as gate drive for the bottom MOSFET.
All devices in Tface mount devices (TO-263 /
D2-Pak), add 'S' tRL3103S.
The recommended n is to use IRL3102 for the high side
and IRL3303 for the low side FET, for the best combination of cost
and performance. Alternative FET’s from any manufacturer could
be used, provided they meet the same criteria for RDS(ON)
.
Heat Dissipated In Upper MOSFET
The heat dissipated in the top MOSFET will be:
2) 12V Supply
When 5V is supplied to the drain of Q1, a 12V supply should
be connected to both VCC and VC1.
PD = (I2
R
Duty Cycle) + (0.51
V
t
f )
*
S
*
*
*
*
DS(ON)
IN
SW
Where tSW is switching transition line for body diode (~100ns)
and fS is the switching frequency.
Copyright © 1999
Rev. 1.3a 11/04
14
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
LINEAR REGULATOR
LINEAR REGULATOR (continued)
Referring to the front page Product Highlight, a schematic is
presented which uses a MOSFET as a series pass element for a
linear regulator. The MOSFET is driven by the LX1664 controller,
and down-converts a +5V or +3.3V supply to the desired VOUT
level, between 1.5 & 3.5V, as determined by the feedback
resistors.
The current available from the Linear regulator is dictated by
the supply capability, as well as the MOSFET ratings, and will
typically lie in the 3-5 ampere range. This output is well suited
for I/O buffers, memory, chipset and other components. Using
3.3V supply to convert to 1.5V for GTL+ Bus will significantly
reduce heat dissipation in the MOSFET.
MOSFET Comments
Heatsinking the MOSFET becomes important, since the linear
stage output current could approach 5 amperes in some applica-
tions. Since there are no switching losses, power dissipation in
the MOSFET is simply defined by PD = (VIN - VOUT
)
I output
*
current. This means that a +5V to +3.3VOUT at 5A will require that
IN
the MOSFET dissipate (5-3.3) 5 = 8.5 watts. This amount of
*
FE 13 — Typical Transient Response
power in a MOSFET calls for a heatsink, which will be the sam
physical size as that required for a monolithic LDO, such as t
LX8384 device.
annel 2 = Linear Regulator Output.
Set point = 3.3V @ 2A (20mV/div.)
hannel 4 = Switching Regulator Output.
VCC_CORE set point = 2.8V
The dropout voltage for the linear regulator stage is the produ
of RDS ON
I
. Using a 2SK1388 device at 5A, tropout
*
OUT
voltage will be (worst case) 37 milliohms x 5A = 5mV.
Note that the RDS ON of the (linear regulator) MSFET
affect heat dissipation, only dropout voltage. sons
economy, a FET with a higher resistance can be chosen for
linear regulator, e.g. 2SK1388 r IRLZ
Channel 3 = Switching Regulator Load Current
Transient 0 - 13A
Output Voltage Setting
As shown in Application Information Figures 6-9, two resistors (R5
& R6) set the linear regulator stage output voltage:
TABLE 5 - Linear RegulatoGuide
VOUT = 1.5 (R + R ) / R
*
6
Device
RD
@
ax. Break-
5
6
1
TC =
own Voltage
As an example, to set resistor magnitudes, assume a desired
VOUT of 3.3 volts:
IRFZ24N
IRL2703
IRLZ44N
12
17
29
55
30
55
1.5 (12.1k + 10k) / 10k = 3.3 volts (approximately)
*
In general, the divider resistor values should be in the vicinity
of 10-12k ohm for optimal noise performance. Please refer to
Table 6.
Avoiding Crosstalk
To avoid a load transien the switching output affecting the
linear regulator, follow these guidelines:
1) Separate 5V supply traces to switching & linear FETs as
much as possible.
2) Place capacitor C9 as close to drain of Q4 as possible.
Typical transient response is shown in Figure 13.
Copyright © 1999
Rev. 1.3a 11/04
15
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/64A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
LINEAR REGULATOR (continued)
TABLE 6 -
LAYOUT GUIDELINES - THERMAL DESIGN
A great deal of time and effort were spent optimizing the thermal
design of the demo boards. Any user who intends to implement
an embedded motherboard would be well advised to carefully
read and follow these guidelines. If the FET switches have been
carefully selected, external heatsinking is generally not required.
However, this means that copper trace he PC board must now
be used. This is a potential troublch copper area as
possible must be dedicated to hehe FET switches, and
the diode as well if a on-synchsolutiis used.
In our VRM modutsink was tn from internal
ground and VCC planeh were acplit and connected
with VIAS to the power dtabs. The TO-220 and TO-263
cases are well suited for this icon, and are the preferred
packages. Reemove conformal coating from all
exposed PC h are involved in heatsinking.
Resistors Settings for Linear Regulator Output Voltage
Nominal
Set Point (V)
R5 (kΩ)
R6 (kΩ)
VOUT (V)
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
12
10
10
10.7
11
3.30
3.20
3.08
3.00
2.90
2.80
2.71
2.59
2.50
2.41
2.31
2.21
2.10
2.00
2.13
1.80
1.70
1.61
1.50
11.3
11.3
11
10.3
10
11
11.5
12.4
13.7
14.7
14.7
16.5
18.7
22.1
26.7
21
35.7
53.6
100
∞
10
10
9.76
8.87
8.87
8.87
8.87
8.87
8.87
7.15
7.15
7.15
7.15
Gel Note
As alwbe suride local capacitive decoupling close to
the chipsure use ground plane construction for all high-
quency . Use low ESR capacitors where justified, but be
dampand ringing problems. High-frequency designs
careful routing and layout, and may require several
to achieve desired performance levels.
Capacitor Selection
Referring to the Product Highlight schematic on the front page, t
standard value to use as the linear regulator stage output capaci
is on the order of 330µF. This provides sufficient hold-up for a
expected transient load events in memory and I/O itry.
r Traces
To reduce power losses due to ohmic resistance, careful consid-
eration should be given to the layout of traces that carry high
currents. The main paths to consider are:
Disabling Linear Output
Linear regulator output can be disabled by pullinback p
(L ) up to 5V as shown in Figure 14.
FB
I Input power from 5V supply to drain of top MOSFET.
I Trace between top MOSFET and lower MOSFET or Schottky
diode.
TABLE 7 - Linear EnabIN Table
LIN EN
I Trace between lower MOSFET or Schottky diode and
ground.
I Trace between source of top MOSFET and inductor, sense
resistor and load.
En
Input
5V or 12V
LX166
C9
330µF
C10
0.1µF
10
9
LDRV
LFB
Q4
IRLZ44
Supply Voltage
For I/O Chipset
C7
330µF
LX166x
Output
R5
R6
10k
10k
LIN EN
2N2222
FIGURE 14 — Enabling Linear Regulator
FIGURE 15 — Power Traces
Copyright © 1999
Rev. 1.3a 11/04
16
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
LX1664/1664A, LX1665/65A
DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC
P R O D U C T I O N D A T A S H E E T
USING THE LX1664/65 DEVICES
LAYOUT GUIDELINES - THERMAL DESIGN (continued)
All of these traces should be made as wide and thick as
possible, in order to minimize resistance and hence power losses.
It is also recommended that, whenever possible, the ground, input
and output power signals should be on separate planes (PCB
layers). See Figure 15 – bold traces are power traces.
Layout Assistance
Please contact Linfinity’s Applications Engineers for assistance
with any layout or component selection issues. A Gerber file
with layout for the most popular devices is available upon re-
quest.
Evaluation boards are also availapon request. Please
check Linfinity's web site for furton notes.
C5 Input Decoupling (VCC) Capacitor
Ensure that this 1µF capacitor is placed as close to the IC as
possible to minimize the effects of noise on the device.
RELATED DEVICES
LX1662/1663 - Single Output PWM C
LX1553 - PWM Controller for V - 3.3V ion
LX1668 - Triple Output M Cont
Pentium is a registered trademark of Intel Corporation.
Cyrix is a registered trademark and 6x86 and Gx86 are trademarks of Cyrix Corporation. K6 is a trademark of AMD.
Power PC is a trademark of International Business Machines Corporation. Alpha is a trademark of Digital Equipment Corporation.
PRODUCTION DATA - Information contained in this document is proprietary to LinFinity, and is current as of publication date. This document
may not be modified in any way without the express written consent of LinFinity. Product processing does not necessarily include testing of
all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright © 1999
Rev. 1.3a 11/04
17
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