5962-9761003HXX [MICROSEMI]
Flash Module, 2MX16, 90ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56;
| 型号： | 5962-9761003HXX |
| 厂家： | 
Microsemi |
| 描述： | Flash Module, 2MX16, 90ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56 CD |
| 文件： | 总12页 (文件大小：217K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WF2M16-XXX5
HI-RELIABILITY PRODUCT
2Mx16 FLASH MODULE, SMD 5962-97610 PRELIMINARY*
FEATURES
■ Access Times of 90, 120, 150ns
■ Packaging:
■ Data Polling and Toggle Bit feature for detection of program
or erase cycle completion.
■ Supports reading or programming data to a sector not being
• 56 lead, Hermetic Ceramic, 0.520" CSOP (Package 207).
Fits standard 56 SSOP footprint.
erased.
■ Built-in Decoupling Caps and Multiple Ground Pins for Low
• 44 pin Ceramic SOJ (Package 102)**
Noise Operation.
• 44 lead Ceramic Flatpack (Package 208)**
■ Sector Architecture
■ RESET pin resets internal state machine to the read mode.
■ Ready/Busy (RY/BY) output for detection of program or
• 32 equal size sectors of 64KBytes each
• Any combination of sectors can be erased. Also supports
full chip erase.
erase cycle completion.
■ Multiple Ground Pins for Low Noise Operation
■ Minimum 100,000 Write/Erase Cycles Minimum
■ Organized as 2Mx16; User Configurable as 2 x 2Mx8
■ Commercial, Industrial, and Military Temperature Ranges
■ 5 Volt Read and Write. 5V ± 10% Supply.
■ Low Power CMOS
* This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
* * Package to be developed.
Note: For programming information refer to Flash Programming 16M5
Application Notes.
FIG. 1 PIN CONFIGURATIONS
PIN DESCRIPTION
WF2M16-XDAX5
56 CSOP
WF2M16-XXX5
44 CSOJ (DL)**
44 FLATPACK (FL)**
I/O0-15 Data Inputs/Outputs
TOP VIEW
A0-20
WE
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
CS1
A12
A13
A14
A15
NC
1
2
3
4
5
6
7
8
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
TOP VIEW
NC
RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
A15
A14
A16
A17
A18
A19
A20
OE
CS1-2
OE
2
3
A13
4
A12
CS2
NC
VCC
5
A11
6
A20
A19
A18
A17
A16
9
A10
VSS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
7
A9
I/O7
I/O6
I/O5
I/O4
8
A8
RY/BY
RESET
Ready/Busy
Reset
9
RESET
CS1
10
11
12
13
14
15
16
17
18
19
20
21
22
V
CC
V
CC
VSS
GND
I/O6
I/O14
I/O7
I/O15
RY/BY
OE
WE
NC
I/O13
I/O5
I/O12
I/O4
V
CC
V
SS
V
CC
I/O9
I/O1
CS2
RY/BY
A7
I/O3
I/O2
I/O1
I/O0
WE
NC
BLOCK DIAGRAM
39 I/O8
38 I/O0
37 A0
36 NC
35 NC
34 NC
33 I/O2
32
31
30
29
I/O0-7
I/O8-15
A6
RESET
WE
A5
A4
OE
0-20
A
A3
NC
RY/BY
I/O10
I/O3
I/O11
GND
A2
NC
A1
NC
A0
NC
V
CC
2M x 8
2M x 8
** Package to be developed.
CS
CS
1
2
NOTE:
1. RY/BY is an open drain output and should be pulled up to Vcc
with an external resistor.
2. Address compatible with Intel 2M8 56 SSOP.
1
August 2001 Rev. 4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
CAPACITANCE
(TA = +25°C)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Ratings
Unit
Parameter
Symbol
Conditions
Max Unit
Voltage on Any Pin Relative to VSS
Power Dissipation
Storage Temperature
Short Circuit Output Current
Data Retention (Mil Temp)
VT
PT
Tstg
IOS
-2.0 to +7.0
V
W
°C
mA
years
cycles
OE capacitance
COE
V
V
V
V
V
IN = 0 V, f = 1.0 MHz
IN = 0 V, f = 1.0 MHz
IN = 0 V, f = 1.0 MHz
I/O = 0 V, f = 1.0 MHz
IN = 0 V, f = 1.0 MHz
25
25
15
15
25
pF
pF
pF
pF
pF
8
-65 to +125
100
WE capacitance
CWE
CCS
CI/O
CAD
CS capacitance
Data I/O capacitance
Address input capacitance
20
Endurance - write/erase cycles
(Mil Temp)
100,000 min.
This parameter is guaranteed by design but not tested.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Symbol
VCC
VSS
VIH
Min
4.5
0
Typ
Max
5.5
Unit
V
Supply Voltage
5.0
Ground
0
-
0
V
Input High Voltage
Input Low Voltage
Operating Temperature (Mil.)
Operating Temperature (Ind.)
2.0
-0.5
-55
-40
VCC + 0.5
+0.8
+125
+85
V
VIL
-
V
TA
-
°C
°C
TA
-
DC CHARACTERISTICS - CMOS COMPATIBLE
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
Parameter
Symbol
ILI
Conditions
VCC = 5.5, VIN = GND to VCC
Min
Max
10
Unit
µA
µA
mA
mA
mA
V
Input Leakage Current
Output Leakage Current
VCC Active Current for Read (1)
ILO
VCC = 5.5, VIN = GND to VCC
CS = VIL, OE = VIH, f = 5MHz
CS = VIL, OE = VIH
10
ICC1
80
VCC Active Current for Program or Erase (2)
VCC Standby Current
ICC2
ICC3
VOL
120
4.0
0.45
VCC = 5.5, CS = VIH, f = 5MHz, RESET = Vcc ± 0.3V
IOL = 12.0 mA, VCC = 4.5
Output Low Voltage
Output High Voltage
VOH
VLKO
IOH = -2.5 mA, VCC = 4.5
0.85xVcc
3.2
V
Low VCC Lock-Out Voltage
NOTES:
4.2
V
1. The Icc current listed includes both the DC operating current and the frequency dependent component (@ 5MHz). The frequency component typically is less than
2mA/MHz, with OE at VIH.
2. Icc active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions VIL = 0.3V, VIH = VCC - 0.3V
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
WF2M16-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS - WE CONTROLLED
(VCC = 5.0V, TA = -55°C to +125°C)
Parameter
Symbol
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tELWL
tWC
tCS
90
120
150
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
µs
µs
sec
sec
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
0
45
0
0
50
0
0
50
0
tWLWH
tAVWL
tWP
tAS
Data Setup Time
tDVWH
tWHDX
tWLAX
tDS
45
0
50
0
50
0
Data Hold Time
tDH
tAH
Address Hold Time
45
20
50
20
50
20
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase (2)
tWHWL
tWHWH1
tWHWH2
tWPH
300
15
300
15
300
15
Read Recovery Time before Write
VCC Setup Time
tGH
W
L
0
0
0
tVCS
50
50
50
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
RESET Pulse Width
tOEH
10
10
10
tRP
500
500
500
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
(VCC = 5.0V, TA = -55°C to +125°C)
Parameter
Symbol
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
tAVAV
tRC
tACC
tCE
tOE
tDF
tDF
tOH
90
120
150
ns
ns
ns
ns
ns
ns
ns
Address Access Time
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
90
90
40
20
20
120
120
50
150
150
55
Chip Select Access Time
Output Enable to Output Valid
Chip Select High to Output High Z (1)
Output Enable High to Output High Z (1)
30
35
30
35
Output Hold from Addresses, CS or OE Change,
whichever is First
0
0
0
RESET Low to Read Mode (1)
tReady
20
20
20
µs
1. Guaranteed by design, not tested.
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWC
tWS
tCP
ns
ns
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
tWLEL
tELEH
45
0
50
0
50
0
ns
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
tDH
tAH
tCPH
45
0
50
0
50
0
ns
Data Hold Time
ns
Address Hold Time
45
20
50
20
50
20
ns
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
tEHEL
ns
tWHWH1
tWHWH2
tGHEL
300
15
300
15
300
15
µs
sec
µs
0
0
0
Chip Programming Time
Chip Erase Time (3)
44
44
44
sec
sec
ns
256
256
256
Output Enable Hold Time (4)
tOEH
10
10
10
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
AC TEST CONDITIONS
FIG. 2
AC TEST CIRCUIT
IOL
Parameter
Typ
Unit
V
Current Source
Input Pulse Levels
VIL = 0, VIH = 3.0
Input Rise and Fall
5
ns
V
Input and Output Reference Level
Output Timing Reference Level
1.5
1.5
D.U.T.
VZ
≈
1.5V
V
(Bipolar Supply)
Ceff = 50 pf
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOH
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE testerincludes jigcapacitance.
Current Source
FIG. 3
RESET TIMING DIAGRAM
Ready
RESET
t
RP
t
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4
WF2M16-XXX5
FIG. 3
AC WAVEFORMS FOR READ OPERATIONS
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
FIG. 4
WRITE/ERASE/PROGRAM
OPERATION, WE CONTROLLED
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
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6
WF2M16-XXX5
FIG. 5
AC WAVEFORMS CHIP/SECTOR
ERASE OPERATIONS
NOTE:
1. SA is the sector address for Sector Erase.
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
FIG. 6
AC WAVEFORMS FOR DATA POLLING
DURING EMBEDDED ALGORITHM OPERATIONS
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8
WF2M16-XXX5
FIG. 7
ALTERNATE CS CONTROLLED
PROGRAMMING OPERATION TIMINGS
NOTES:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7 is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
9
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
PACKAGE 102: 44 LEAD, CERAMIC SOJ**
28.70 (1.13) ± 0.25 (0.010)
3.96 (0.156) MAX
0.89 (0.035)
Radius TYP
0.2 (0.008)
± 0.05 (0.002)
11.3 (0.446)
± 0.2 (0.009)
9.55 (0.376) ± 0.25 (0.010)
1.27 (0.050) ± 0.25 (0.010)
PIN 1 IDENTIFIER
1.27 (0.050) TYP
26.7 (1.050) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
** Package to be developed.
PACKAGE 208: 44 LEAD, CERAMIC FLAT PACK**
28.45 (1.120)
± 0.26 (0.010)
PIN 1
IDENTIFIER
3.18 (0.125)
MAX
12.95 (0.510)
± 0.13 (0.005)
9.90 (0.390)
± 0.13 (0.005)
12.70 (0.500)
± 0.51 (0.020)
5.08 (0.200)
± 0.25 (0.010)
0.43 (0.017)
± 0.05 (0.002)
1.27 (0.050) TYP
26.67 (1.050) TYP
0.13 (0.005)
± 0.05 (0.002)
3.81 (0.150)
TYP
32.64 (1.285) TYP
43.17 (1.699) ± 0.39 (0.015)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
** Package to be developed.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
10
WF2M16-XXX5
PACKAGE 207: 56 LEAD, CERAMIC SOP*
23.63 (0.930) ± 0.25 (0.010)
0.18 (0.007)
± 0.05 (0.002)
21.59 (0.850) TYP
2.87 (0.113)
MAX
1.02 (0.040)
± 0.18 (0.007)
12.96 (0.510)
16.13 (0.635)
± 0.15 (0.006)
± 0.13 (0.005)
1.60 (0.063) TYP
+
+
0.51 (0.020) TYP
0.25 (0.010)
± 0.05 (0.002)
PIN 1 IDENTIFIER
R = 0.18 (0.007) TYP
0.80 (0.031) TYP
0° / -4°
4.06 (0.160)
MAX
SEE DETAIL "A"
DETAIL "A"
* Package Dimensions subject to change
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
FIG. 8 ALTERNATE PIN CONFIGURATION FOR WF2M16W-XDAX5
56 CSOP
PIN DESCRIPTION
TOP VIEW
BLOCK DIAGRAM
I/O0-15 Data Inputs/Outputs
CS1
A12
A13
A14
A15
NC
CS2
A21
A20
A19
A18
A17
A16
1
2
3
4
5
6
7
8
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
NC
RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
I/O0-7
I/O8-15
A1-21
WE
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
RESET
WE
OE
1-21
CS1-2
OE
A
RY/BY
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VCC
2M x 8
2M x 8
VSS
VCC
RY/BY
RESET
Ready/Busy
Reset
GND
I/O6
I/O14
I/O7
I/O15
RY/BY
OE
WE
NC
I/O13
I/O5
I/O12
I/O4
VCC
I/O9
I/O1
I/O8
CS
CS
1
2
NOTE:
38 I/O0
37 NC
36 NC
35 NC
34 NC
33 I/O2
32 I/O10
31
30
29
1. RY/BY is an open drain output and should be pulled up to Vcc with
an external resistor.
2. Address compatible with Intel 1M16 56 SSOP.
I/O3
I/O11
GND
VCC
11
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF2M16-XXX5
ORDERING INFORMATION
W F 2M16 X - XXX X X 5 X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
VPP PROGRAMMING VOLTAGE
5 = 5V
DEVICE GRADE:
M = Military, 883 Screened -55°C to +125°C
I
= Industrial
-40°C to +85°C
0°C to +70°C
C = Commercial
PACKAGE TYPE:
DA = 56 Lead CSOP (Package 207)
fits standard 56 SSOP footprint
DL = 44 Lead Ceramic SOJ (Package 102)*
FL = 44 Lead Ceramic Flatpack (Package 208)*
ACCESS TIME (ns)
IMPROVEMENT MARK:
• Address Pinout for 56 CSOP Package
W = Word Wide Applications
ORGANIZATION of 2M x 16
User configurable as 2 x 2M x 8
Flash
WHITE ELECTRONIC DESIGNS CORP.
* Package to be developed.
DEVICE TYPE
SECTOR SIZE SPEED
PACKAGE
SMD NO.
2M x 16 5V Flash Module
2M x 16 5V Flash Module
2M x 16 5V Flash Module
64KByte
64KByte
64KByte
150ns
120ns
90ns
56 lead CSOP (DA)
56 lead CSOP (DA)
56 lead CSOP (DA)
5962-97610 01HXX
5962-97610 02HXX
5962-97610 03HXX
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
12
相关型号：
5962-9761005HXX
Flash Module, 2MX16, 120ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56
WEDC
5962-9761005HXX
Flash Module, 2MX16, 120ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56
MICROSEMI
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