WF1M32B-100G2UI3 [MERCURY]
Flash Module, 1MX32, 100ns, CQFP68, 0.140 X 0.140 INCH, 3.50 MM HEIGHT, CERAMIC, QFP-68;
| 型号： | WF1M32B-100G2UI3 |
| 厂家： | 
MERCURY UNITED ELECTRONICS INC |
| 描述： | Flash Module, 1MX32, 100ns, CQFP68, 0.140 X 0.140 INCH, 3.50 MM HEIGHT, CERAMIC, QFP-68 内存集成电路 |
| 文件： | 总14页 (文件大小：992K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WF1M32B-XXX3
1Mx32 3.3V NOR FLASH MODULE
FEATURES
Access Times of 100, 120, 150ns
Low Power CMOS
Packaging
Embedded Erase and Program Algorithms
Built-in Decoupling Caps for Low Noise Operation
Erase Suspend/Resume
• 66 pin, PGA Type (H1), 1.075" square, Hermetic Ceramic
HIP (Package 404)
• 68 lead, Low Profile CQFP (G2U), 3.5mm (0.140") square
(Package 510)
• Supports reading data from or programing data to a
sector not being erased
1,000,000 Erase/Program Cycles
Sector Architecture
Low Current Consumption
Typical values at 5MHz:
• One 16KByte, two 8KBytes, one 32KByte, and fifteen
64kBytes (each chip)
• 40mA Active Read Current
• 80mA Program/Erase Current
Weight
• Any combination of sectors can be concurrently erased.
Also supports full chip erase
• WF1M32B-XG2UX3 -8 grams typical
• WF1M32B-XH1X3 -13 grams typical
Note: For programming information refer to Flash Programming 8M3 Application Note.
Organized as 1Mx32
Commercial, Industrial and Military Temperature Ranges
3.3 Volt for Read and Write Operations
Boot Code Sector Architecture (Bottom)
This product is subject to change without notice.
PIN CONFIGURATION FOR WF1M32B-XH1X3
TOP VIEW
PIN DESCRIPTION
I/O0-31
A0-19
WE#
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
Output Enable
Reset
1
12
23
34
45
56
I/O8
I/O9
I/O10
A14
A16
A11
A0
RESET#
CS2#
GND
I/O11
A10
I/O15
I/O14
I/O13
I/O12
OE#
A17
I/O24
I/O25
I/O26
A7
VCC
CS4#
NC
I/O31
I/O30
I/O29
I/O28
A1
CS1-4#
OE#
RESET#
VCC
I/O27
A4
Power Supply
Ground
GND
A12
NC
Not Connected
A9
NC
A5
A2
A15
WE#
I/O7
A13
A6
A3
BLOCK DIAGRAM
A18
I/O0
I/O1
I/O2
VCC
A8
NC
I/O23
I/O22
I/O21
I/O20
CS1#
CS2#
CS3#
CS4#
CS1#
A19
I/O6
I/O16
I/O17
I/O18
CS3#
GND
I/O19
RESET#
WE#
OE#
I/O5
A0-19
I/O3
I/O4
1M x 8
1M x 8
1M x 8
1M x 8
8
11
22
33
44
55
66
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF1M32B-XXX3
PIN CONFIGURATION FOR WF1M32B-XG2UX3
TOP VIEW PIN DESCRIPTION
I/O0-31
A0-19
WE1-4#
CS1-4#
OE#
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
Output Enable
Reset/Powerdown
Power Supply
Ground
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
RESET#
VCC
GND
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
BLOCK DIAGRAM
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
RESET#
OE#
A0-19
1M x 8
1M x 8
1M x 8
1M x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
The Microsemi 68 lead G2U CQFP fills the same fit and function as
the JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE
and lead inspection advantage of the CQFP form.
23.876 (0.940)
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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WF1M32B-XXX3
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
TA = +25°C
Parameter
Unit
°C
Operating Temperature (M, Q)
Supply Voltage Range (VCC)
Signal Voltage Range
-55 to +125
-0.5 to +4.0
-0.5 to Vcc +0.5
-65 to +150
+300
Parameter
Symbol
Conditions
Max Unit
V
OE# capacitance
COE
CWE
CCS
CI/O
CAD
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
VI/O = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
50
20
20
20
50
pF
pF
pF
pF
pF
V
WE1-4# capacitance
CS1-4# capacitance
Data I/O capacitance
Address input capacitance
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Endurance (write/erase cycles)
NOTES:
°C
°C
1,000,000 min.
cycles
This parameter is guaranteed by design but not tested.
1. Stresses above the absolute maximum rating may cause permanent damage to the device.
Extended operation at the maximum levels may degrade performance and affect reliability.
RECOMMENDED OPERATING CONDITIONS
DATA RETENTION
Parameter
Symbol
VCC
VIH
Min
Max
Unit
V
Parameter
Test Conditions
150°C
Min
10
Unit
Supply Voltage
3.0
3.6
Years
Years
Minimum Pattern Data Retention
Time
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
Operating Temp. (Ind.)
Operating Temp. (Com.)
0.7 x VCC VCC + 0.3
V
125°C
20
VIL
-0.5
-55
-40
0
+0.8
+125
+85
V
TA
°C
°C
°C
TA
TA
+70
DC CHARACTERISTICS – CMOS COMPATIBLE
Parameter
Symbol
ILI
Conditions
Min
Max
10
Unit
Input Leakage Current
Output Leakage Current
VCC Active Current for Read (1)
VCC = VCC MAX, VIN = GND or VCC
VCC = VCC MAX, VOUT = GND or VCC
CS# = VIL, OE# = VIH, f = 5MHz
CS# = VIL, OE# = VIH
μA
μA
mA
mA
μA
V
ILOx32
ICC1
10
120
140
200
0.45
VCC Active Current for Program or Erase (2)
CC Standby Current
ICC2
V
ICC3
CS#, RESET# = VCC ± 0.3V
IOL =4.0 mA, VCC = VCC MIN
IOH = -2.0 mA, VCC = VCC MIN
Output Low Voltage
VOL
Output High Voltage
VOH1
VLKO
2.4
2.3
V
Low VCC Lock-Out Voltage (3)
2.5
V
NOTES:
1. The current listed as typically less than 8 mA/MHz, with OE# at VIH
.
2.
ICC active while Embedded Algorithm (program or erase) is in progress.
3. Guaranteed by design, but not tested.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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WF1M32B-XXX3
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS – CS# CONTROLLED
Parameter
Symbol
-100
-120
-150
Unit
Min
100
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWLEL
tELEH
tWC
tWS
tCP
ns
ns
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
50
0
50
0
50
0
ns
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
50
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
50
20
50
20
50
20
ns
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time
tEHEL
tCPH
ns
tWHWH1
tWHWH2
tGHEL
300
21
300
21
300
21
μs
sec
μs
sec
Read Recovery Time (2)
Chip Programming Time
0
0
0
50
50
50
NOTES:
1. Typical value for tWHWH1 is 9μs.
2. Guaranteed by design, but not tested.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
V
Input Pulse Levels
Input Rise and Fall
V
IL = 0, VIH = 2.5
IOL
5
ns
V
Current Source
Input and Output Reference Level
Output Timing Reference Level
NOTES:
1.5
1.5
V
VZ
≈ 1.5V
D.U.T.
V
I
Z is programmable from -2V to +7V.
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
(Bipolar Supply)
Ceff = 50 pf
V
I
.
IOH
Current Source
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF1M32B-XXX3
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS – WE# CONTROLLED
Parameter
Symbol
-100
-120
-150
Unit
Min
100
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tELWL
tWC
tCS
tWP
tAS
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGH
50
0
50
0
65
0
ns
ns
Data Setup Time
tDS
50
0
50
0
65
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
50
30
50
30
65
35
ns
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase
tWPH
ns
300
15
300
15
300
15
μs
sec
μs
μs
sec
ns
Read Recovery Time before Write (3)
0
0
0
W
L
VCC Setup Time
tVCS
50
50
50
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (2)
50
50
50
tOES
tOEH
0
0
0
10
10
10
ns
NOTES:
1. Typical value for tWHWH1 is 9μs.
2. For Toggle and Data Polling.
3. Guaranteed by design, but not tested.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
100
120
150
ns
ns
ns
ns
ns
ns
ns
Address Access Time
100
100
40
120
120
50
150
150
55
Chip Select Access Time
Output Enable to Output Valid
Chip Select High to Output High Z (1)
Output Enable High to Output High Z (1)
30
30
40
tDF
30
30
40
Output Hold from Addresses, CS# or OE# Change,
whichever is First (1)
tOH
0
0
0
1. Guaranteed by design, not tested.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
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WF1M32B-XXX3
AC WAVEFORMS FOR READ OPERATIONS
tRC
Addresses Stable
tACC
Addresses
CS#
tDF
tOE
OE#
tSR/W
tOEH
WE#
tCE
tOH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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WF1M32B-XXX3
WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED
Program Command Sequence (last two cycles)
Read Status Data (last two cycles)
tAS
PA
tWC
Addresses
555h
PA
PA
tAH
CS#
OE#
tCH
tWHWH1
tWP
WE#
Data
tWPH
tCS
tDS
tD
PD
DOUT
Status
A0h
tBUSY
tRB
RY/BY#
VCC
tVCS
NOTE: PA = program address, PD = program data, DOUT is the true data at the program address.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
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WF1M32B-XXX3
AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS
Erase Command Sequence (last two cycles)
Read Status Data
tWC
tAS
SA
555h for chip erase
Addresses
CS#
2AAh
VA
VA
tAH
tCH
OE#
tWP
WE#
tWPH
tWHWH2
tCS
tDS
tDH
55h
In
Progress
Data
Complete
tRB
30h
10 for Chip Erase
tBUSY
RY/BY#
VCC
tVCS
NOTE: SA = sector address (for Sector Erase), VA = Valid Address for reading status data
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
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WF1M32B-XXX3
AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM OPERATIONS
tRC
VA
Addresses
CS#
VA
VA
tACC
tCE
tCH
tOE
OE#
WE#
tDF
tOEH
tOH
High Z
High Z
DQ7
Complement
Complement
True
Valid Data
Valid Data
DQ0–DQ6
Status Data
Status Data
True
tBUS
RY/BY#
NOTE: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
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WF1M32B-XXX3
ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS
555 for program PA for program
2AA for erase
SA for sector erase
555 for chip erase
Data # Polling
Addresses
PA
tWC
tAS
tAH
tWH
WE#
OE#
tGHEL
tWHWH1 or 2
tCP
CS#
Data
tWS
tCPH
tDS
tBUSY
tDH
DOUT
DQ7#
A0 for program PD for program
55 for erase
30 for sector erase
10 for chip erase
tRH
RESET#
RY/BY#
NOTES:
1. PA = program address, PD = program data, DQ7# = complement of the data written to the device, DOUT = data written to the device.
2. Figure indicates the last two bus cycles of command sequence.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF1M32B-XXX3
PACKAGE 510 – 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) Sꢀ
22.36 (0.880) 0.25 (0.010) Sꢀ
3.56 (0.140) MAX
0.254 (0.010) + 0.051 (0.002)
- 0.025 (0.001)
Pin 1
0.254 (0.010) TYP
R 0.127
(0.005)
MIN
24.0 (0.946)
0.25 (0.010)
0.53 (0.021)
0.18 (0.007)
1° / 7°
1.01 (0.040)
0.13 (0.005)
23.87
(0.940) REF
DETAIL A
1.27 (0.050) TYP
0.38 (0.015)
0.05 (0.002)
SEE DETAIL "A"
20.3 (0.800) REF
The Microsemi 68 lead G2U CQFP fills the same fit and function as
the JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE
and lead inspection advantage of the CQFP form.
23.88 (0.940) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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WF1M32B-XXX3
PACKAGE 404: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) 0.25 (0.010) Sꢀ
PIN 1 IDENTIFIER
SꢀUARE PAD
ON BOTTOM
25.4 (1.0) TYP
4.60 (0.181)
MAX
3.81 (0.150)
0.13 (0.005)
0.76 (0.030) 0.13 (0.005)
2.54 (0.100)
TYP
15.24 (0.600) TYP
25.4 (1.0) TYP
1.27 (0.050) TYP DIA
0.46 (0.018) 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
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Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF1M32B-XXX3
ORDERING INFORMATION
W F 1M32 B - XXX X X 3 X
MICROSEMI CORPORATION
FLASH
ORGANIZATION, 1M x 32
User configurable as 2M x 16 or 4M x 8
IMPROVEMENT MARK
B = Boot Block (Bottom Sector)
ACCESS TIME (ns)
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex In line Package, HIP (Package 404)
G2U = Ceramic Quad Flat Pack, Low Profile CQFP (Package 510)
DEVICE GRADE:
Q = Military Grade*
M = Military Screened -55°C to +125°C
I = Industrial
-40°C to +85°C
0°C to +70°C
C = Commercial
PROGRAMMING VOLTAGE
3 = 3.3V
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
* This product is processed the same as the 5962-XXXXXHXX product but all
test and mechanical requirements are per the Microsemi data sheet.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
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WF1M32B-XXX3
Document Title
1Mx32 3.3V NOR FLASH MODULE
Revision History
Rev # History
Release Date Status
Rev 8
Changes (Pg. 1-14)
June 2011
Final
8.1 Change document layout from White Electronic Designs to Microsemi
8.2 Add document Revision History page
Rev 9
Changes (Pg. 1, 14)
August 2011
April 2012
Final
Final
9.1 Add "NOR" to headline
Rev 10
Changes (Pg. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10)
10.1 Change "in byte mote" to "each chip" in the first sub-bullet under Sector Architecture
10.2 Add "#" to WE1-4, CS1-4, OE and RESET in Pin Description on page 2
10.3 Add (M, Q) to Operation Temperature in Absolute Maximum Ratings chart
10.4 Add "#" to CS1-4 in Capacitance chart on page 3
10.5 Delete subhead from DC Characteristics – CMOS Compatible chart
10.6 Update DC Characteristics – CMOS Compatible chart
10.7 Update AC Characteristics chart...CS# Controlled
10.8 Update AC Characteristics chart...WE# Controlled
10.9 Update AC Characteristics chart...Read-Only Operations
10.10 Update AC Waveforms For Read Operations diagram
10.11 Update Write/Erase/Program Operation, WE# Controlled diagram
10.12 Update AC Waveforms Chip/Sector Erase Operations diagram
10.13 Update AC Waveforms For Data# Polling During Embedded Algorithm Operations diagram
10.14 Alternate CS# Controlled Programming Operation Timings
Rev 11
Changes (Pg. 1, 3, 12, 13)
June 2012
Final
11.1 Change 66 pin package type from 400 (H1) to 401 (H)
11.2 Add commercial operating temperature to Recommended Operating Conditions chart
Rev 12
Rev 13
Changes (Pg. 1)
December 2012
May 2014
Final
Final
12.1 Delete 1.0mA standby
Change (Pg. 13)
13.1 Changed Device Grade "Q" description from "MIL-STD-883 Compliant" to "MIL-PRF-38534 Class H
Compliant."
Rev 14
Change (Pg. 13)
August 2014
Final
14.1 Changed Device Grade "Q" description from "MIL-PRF-38534 Class H
Compliant" to "Military Grade."
Rev 15
Rev 16
Change (Pg. 12)
December 2014
April 2016
Final
Final
15.1 Change 66 pin package type from 401 (H) to 404 (H1)
Change (Pg. 11) (ECN 9936)
16.1 Update package dimensions
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 16
14
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
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WEDC
WF1M32B-100H1I3
Flash Module, 1MX32, 100ns, CPGA66, 1.075 X 1.075 INCH, HERMETIC SEALED, CERAMIC, HIP-66
MERCURY
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