MAX2820AETM+TD [MAXIM]
2.4GHz 802.11b Zero-IF Transceivers; 2.4GHz的802.11b的零中频收发器
| 型号： | MAX2820AETM+TD |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 2.4GHz 802.11b Zero-IF Transceivers |
| 文件： | 总26页 (文件大小：605K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2493; Rev 5; 5/05
2.4GHz 802.11b Zero-IF Transceivers
General Description
Features
The MAX2820/MAX2820A and MAX2821/MAX2821A
single-chip zero-IF transceivers are designed for the
802.11b (11Mbps) applications operating in the
2.4GHz to 2.5GHz ISM band. The transceivers are
nearly identical, except the MAX2821 and MAX2821A
also provide a low-power shutdown mode and an ana-
log voltage reference output. The MAX2820A/
MAX2821A are cost-reduced versions, virtually identi-
cal in pinout and performance to the MAX2820/
MAX2821. The transceivers include all the circuitry
required to implement an 802.11b RF-to-baseband
transceiver solution, providing a fully integrated
receive path, transmit path, VCO, frequency synthesis,
and baseband/control interface. Only a PA, RF switch,
RF BPF, and a small number of passive components are
needed to form the complete radio front-end solution.
ꢀ 2.4GHz to 2.5GHz ISM Band Operation
ꢀ 802.11b (11Mbps CCK and 22Mbps PBCC) PHY
Compatible
ꢀ Complete RF-to-Baseband Transceiver
Direct-Conversion Upconverters and
Downconverters
Monolithic Low-Phase-Noise VCO
Integrated Baseband Lowpass Filters
Integrated PLL with 3-Wire Serial Interface
Digital Bias Control for External PA
Transmit Power Control (Range > 25dB)
Receive Baseband AGC (Range > 65dB)
Complete Baseband Interface
Digital Tx/Rx Mode Control
Analog Receive Level Detection
The ICs eliminate the need for external IF and base-
band filters by utilizing a direct-conversion radio archi-
tecture and monolithic baseband filters for both
receiver and transmitter. They are specifically opti-
mized for 802.11b (11Mbps CCK) applications. The
baseband filtering and Rx and Tx signal paths support
the CCK modulation scheme for BER = 10-5 at the
required sensitivity levels.
ꢀ -97dBm Rx Sensitivity at 1Mbps
ꢀ -87dBm Rx Sensitivity at 11Mbps
ꢀ +2dBm Transmit Power (11Mbps CCK)
ꢀ Single +2.7V to +3.6V Supply
The devices are suitable for the full range of 802.11b
data rates (1Mbps, 2Mbps, 5.5Mbps, and 11Mbps) and
also the higher-rate 22Mbps PBCCTM standard. The
MAX2820 and MAX2821 are available in a 7mm × 7mm
48-lead QFN package. The MAX2820, MAX2821,
MAX2820A, and MAX2821A are available in a 48-lead
thin QFN package.
ꢀ Low-Current Shutdown Mode (MAX2821 only)
ꢀ Very Small 48-Pin QFN Package(s)
Ordering Information
Applications
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 Thin QFN
Lead Free
802.11b 11Mbps WLAN
MAX2820ETM-TD
MAX2820ETM+TD
MAX2820AETM-TD
MAX2820AETM+TD
MAX2821ETM-TD
MAX2821ETM+TD
MAX2821AETM-TD
MAX2821AETM+TD
+
802.11b 22Mbps PBCC High-Data-Rate WLAN
802.11a + b Dual-Band WLAN
2.4GHz ISM Band Radios
48 Thin QFN
Lead Free
48 Thin QFN
Lead Free
48 Thin QFN
Lead Free
PBCC is a trademark of Texas Instruments, Inc.
Pin Configuration/Functional Diagram and Typical
Application Circuit appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
2.4GHz 802.11b Zero-IF Transceivers
ABSOLUTE MAXIMUM RATINGS
CC
V
Pins to GND ...................................................-0.3V to +4.2V
DIN, RF_GAIN, RX_1K to GND................-0.3V to (V
+ 0.3V)
CC
RF Inputs: RX_RFP, RX_RFN to GND.........-0.3V to (V
RF Outputs: TX_RFP, TX_RFN to GND..................-0.3V to +4.2V
Baseband Inputs: TX_BBIP, TX_BBIN, TX_BBQP,
+ 0.3V)
Bias Voltages: RBIAS, BYP ..................................+0.9V to +1.5V
Short-Circuit Duration Digital Outputs: DOUT, RX_DET.........10s
RF Input Power: RX_RFN, RX_RFP.................................+10dBm
CC
TX_BBQN to GND ...................................-0.3V to (V + 0.3V)
Continuous Power Dissipation (T = +70°C)
CC
A
Baseband Outputs: RX_BBIP, RX_BBIN, RX_BBQP,
48-Lead QFN (derate 27.0mW/°C above +70°C)...........2162mW
48-Lead Thin QFN (derate 38.5mW/°C
RX_BBQN to GND...................................-0.3V to (V
Analog Inputs: RX_AGC, TX_GC, TUNE, ROSCN,
ROSCP to GND .......................................-0.3V to (V
Analog Outputs: PA_BIAS, CP_OUT, VREF
to GND.....................................................-0.3V to (V
Digital Inputs: RX_ON, TX_ON, SHDNB, CSB, SCLK,
+ 0.3V)
+ 0.3V)
+ 0.3V)
CC
CC
CC
above +70°C)...................................................................3077mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION! ESD SENSITIVE DEVICE
DC ELECTRICAL CHARACTERISTICS
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, RF_GAIN = V , 0V ≤ V
≤ +2.0V, 0V ≤ V
≤ +2.0V, RBIAS = 12kΩ, no
CC
IH
TX_GC
RX_AGC
input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50Ω, receiver baseband outputs are open, trans-
mitter baseband inputs biased at +1.2V, registers set to default power-up settings, T = -40°C to +85°C, unless otherwise noted.
A
Typical values are at V
= +2.7V, T = +25°C, unless otherwise noted.) (Note 1)
CC
A
PARAMETERS
Supply Voltage
CONDITIONS
MIN
TYP
MAX
UNITS
2.7
3.6
V
Shutdown-Mode Supply Current
(MAX2821 and MAX2821A)
SHDNB = V , RX_ON = V ,
IL IL
T
= -40°C to +85°C
2
50
µA
mA
mA
mA
A
TX_ON = V
IL
T
A
T
A
T
A
T
A
T
A
T
A
= +25°C
25
35
40
SHDNB = V , RX_ON = V ,
IH
IL
Standby-Mode Supply Current
Receive-Mode Supply Current
Transmit-Mode Supply Current
TX_ON = V
IL
= -40°C to +85°C
= +25°C
80
70
100
110
85
SHDNB = V , RX_ON = V
,
IH
IH
TX_ON = V
IL
= -40°C to +85°C
= +25°C
SHDNB = V , RX_ON = V ,
IH
IL
TX_ON = V
IH
= -40°C to +85°C
90
LOGIC INPUTS: SHDNB, RX_ON, TX_ON, SCLK, DIN, CSB, RF_GAIN
Digital Input Voltage High (V
)
V
V
- 0.5
CC
V
IH
Digital Input Voltage Low (V )
0.5
+5
+5
V
IL
Digital Input Current High (I
)
-5
-5
µA
µA
IH
Digital Input Current Low (I )
IL
LOGIC OUTPUTS: DOUT, RX_DET
Digital Output Voltage High (V
)
Sourcing 100µA
Sinking 100µA
- 0.5
CC
V
V
OH
Digital Output Voltage Low (V
RX BASEBAND I/O
)
OL
0.5
RX_AGC Input Resistance
0V ≤ V
≤ +2.0V
50
kΩ
V
RX_AGC
RX I/Q Common-Mode Voltage
RX I/Q Output DC Offsets
1.25
15
mV
VOLTAGE REFERENCE (MAX2821/MAX2821A)
Reference Voltage Output
Output Impedance
T
= -40°C to +85°C, I
=
LOAD
2mA
1.1
1.2
25
1.3
V
A
Ω
2
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
DC ELECTRICAL CHARACTERISTICS (continued)
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, RF_GAIN = V , 0V ≤ V
≤ +2.0V, 0V ≤ V
≤ +2.0V, RBIAS = 12kΩ, no
CC
IH
TX_GC
RX_AGC
input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50Ω, receiver baseband outputs are open, trans-
mitter baseband inputs biased at +1.2V, registers set to default power-up settings, T = -40°C to +85°C, unless otherwise noted.
A
Typical values are at V
= +2.7V, T = +25°C, unless otherwise noted.) (Note 1)
CC
A
PARAMETERS
TX BASEBAND I/O
CONDITIONS
MIN
TYP
MAX
UNITS
TX BB Input Common-Mode
Range
1.0
1.2
-10
1.4
V
TX BBI and BBQ Input Bias
Current
µA
TX BB Input Impedance
Differential resistance
0V ≤ V ≤ +2.0V
100
10
kΩ
µA
kΩ
TX_GC Input Bias Current
TX_GC Input Impedance
TX_GC
Resistance
250
REFERENCE OSCILLATOR INPUT
Reference Oscillator Input
Impedance
20
kΩ
AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, f and f = 2400MHz to 2499MHz, f
= 22MHz or 44MHz, receive baseband
CC
RF
LO
OSC
outputs = 500mV , SHDNB = RX_ON = V , TX_ON = V , CSB = V , SCLK = DIN = V , RF_GAIN = V , 0V ≤ V ≤ +2.0V,
P-P
IH
IL
IH
IL
IH
RX_AGC
RBIAS = 12kΩ, I = +2mA, BW
= 45kHz, differential RF input matched to 50Ω, registers set to default power-up settings, T =
CP
PLL
A
+25°C, unless otherwise noted. Typical values are at V
= +2.7V, f = 2437MHz, f
= 22MHz, unless otherwise noted.) (Note 1)
OSC
CC
LO
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RECEIVER CASCADE PERFORMANCE (RF INPUT TO BASEBAND OUTPUT)
RF Frequency Range
LO Frequency Range
2400
2400
97
2499
2499
MHz
MHz
T
T
= +25°C
105
RF_GAIN = V
,
,
A
IH
IH
V
= 0V
RX_AGC
= -40°C to +85°C
95
A
RF_GAIN = V
T
T
T
= +25°C
33
75
2
A
A
A
V
= +2.0V
RX_AGC
Voltage Gain (Note 2)
dB
RF_GAIN = V ,
IL
= +25°C
= +25°C
V
= 0V
RX_AGC
RF_GAIN = V ,
IL
V
= +2.0V
RX_AGC
RF Gain Step
From RF_GAIN = V to RF_GAIN =V
30
3.5
4.5
34
dB
dB
IH
IL
RF_GAIN = V , RX gain ≥ 80dB
IH
DSB Noise Figure (Note 3)
RF_GAIN = V , RX gain = 50dB
IH
RF_GAIN = V , RX gain = 50dB
IL
Adjacent Channel Rejection
RX gain = 70dB (Note 4)
49
dB
RF_GAIN = V , RX gain = 80dB
-14
18
IH
Input Third-Order Intercept Point (Note 5)
dBm
RF_GAIN = V , RX gain = 50dB
IL
RF_GAIN = V , RX gain = 80dB
22
IH
Input Second-Order Intercept Point (Note 6)
dBm
RF_GAIN = V , RX gain = 50dB
60
IL
_______________________________________________________________________________________
3
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—RECEIVE MODE (continued)
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, f and f = 2400MHz to 2499MHz, f
= 22MHz or 44MHz, receive baseband
CC
RF
LO
OSC
outputs = 500mV , SHDNB = RX_ON = V , TX_ON = V , CSB = V , SCLK = DIN = V , RF_GAIN = V , 0V ≤ V ≤ +2.0V,
P-P
IH
IL
IH
IL
IH
RX_AGC
RBIAS = 12kΩ, I = +2mA, BW
= 45kHz, differential RF input matched to 50Ω, registers set to default power-up settings, T =
CP
PLL
A
+25°C, unless otherwise noted. Typical values are at V
= +2.7V, f = 2437MHz, f
= 22MHz, unless otherwise noted.) (Note 1)
OSC
CC
LO
PARAMETER
CONDITIONS
MIN
TYP
-65
15
MAX
UNITS
dBm
dB
LO Leakage
Input Return Loss
With external match
RECEIVER BASEBAND
BASEBAND FILTER RESPONSE
MAX2820/
MAX2821
Default bandwidth setting
BW (2:0) = (010)
7
8
-3dB Frequency
MHz
MAX2820A/
MAX2821A
At 12.5MHz
At 16MHz
At 20MHz
At 30MHz
At 12.5MHz
At 16MHz
At 20MHz
At 30MHz
40
65
70
85
28
52
70
85
MAX2820/
MAX2821
Attenuation Relative to Passband
dB
MAX2820A/
MAX2821A
BASEBAND OUTPUT CHARACTERISTICS
RX I/Q Gain Imbalance
-1
-5
+1
+5
dB
RX I/Q Phase Quadrature Imbalance
RX I/Q Output 1dB Compression
RX I/Q Output THD
Degrees
Differential voltage into 5kΩ
1
V
P-P
V
= 500mV
at 5.5MHz, Z = 5kΩ||5pF
-35
dBc
OUT
P-P
L
BASEBAND AGC AMPLIFIER
AGC Range
V
= 0 to +2.0V
70
60
dB
RX_AGC
AGC Slope
Peak gain slope
dB/V
20dB gain step, 80dB to 60dB,
settling to 1dB
AGC Response Time
2
µs
BASEBAND RX PEAK LEVEL DETECTION (MAX2820/MAX2821 ONLY)
RF_GAIN = V
,
IH
-49
-54
RX_DET = V to V
OL
OH
RX Detector Trip Point (at RX_RF)
CW signal
dBm
RF_GAIN = V ,
IL
RX_DET = V
to V
OL
OH
RX Detector Hysteresis
RX Detector Rise Time
5
1
dB
µs
With 3dB overdrive
4
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—TRANSMIT MODE
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, f and f = 2400MHz to 2499MHz, f
= 22MHz or 44MHz, transmit baseband
CC
RF
LO
OSC
inputs = 400mV , SHDNB = TX_ON = V , RX_ON = V , CSB = V , 0V ≤ V
≤ +2.0V, RBIAS = 12kΩ, I = +2mA, BW
=
P-P
IH
IL
IH
TX_GC
CP
PLL
45kHz, differential RF output matched to 50Ω through a balun, baseband input biased at +1.2V, registers set to default power-up set-
tings, T = +25°C, unless otherwise noted. Typical values are at V
= +2.7V, f = 2437MHz, f
= 22MHz, unless otherwise noted.)
A
CC
LO
OSC
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TRANSMIT SIGNAL PATH: BASEBAND INPUT TO RF OUTPUT
RF Output Frequency Range
2400
2400
2499
2499
MHz
MHz
LO Output Frequency Range
V
= 400mV at
P-P
IN
T
T
= +25°C
-1
-2
+3
A
5.5MHz,
= 0V,
TX RF Output Power
TX RF ACPR (Note 8)
dBm
dBc
V
TX_GC
= -40°C to
A
I/Q CW signal (Note 7)
+85°C
-22MHz ≤ f
11MHz ≤ f
≤ -11MHz,
≤ 22MHz
OFFSET
OFFSET
-37
-59
-33MHz ≤ f
< -22MHz,
≤ 33MHz
OFFSET
OFFSET
22MHz < f
Unwanted sideband
-40
-30
-80
-40
-55
-60
-43
-45
-135
15
In-Band Spurious Signals Relative to
Modulated Carrier
f
= 2400MHz to
RF
dBc
dBm
dBm
LO signal
2483MHz
Spurs > 22MHz
2 × f
3 × f
LO
TX RF Harmonics
LO
f
f
f
f
< 2400MHz
RF
TX RF Spurious Signal Emissions
(Outside 2400MHz to 2483.5MHz)
Nonharmonic Signals
= 2500MHz to 3350MHz
> 3350MHz
RF
RF
TX RF Output Noise
≥ 22MHz, 0V ≤ V
≤ +2.0V
TX_GC
dBm/Hz
dB
OFFSET
TX RF Output Return Loss
TX BASEBAND FILTER RESPONSE
-3dB Frequency
With external match
10
25
50
MHz
dB
At 22MHz
At 44MHz
Attenuation Relative to Passband
TX GAIN-CONTROL CHARACTERISTICS
Gain-Control Range
0V ≤ V
≤ +2.0V
30
40
dB
dB/V
µs
TX_GC
Gain-Control Slope
Peak gain slope
= +2.0V to 0V step
Gain-Control Response Time
V
0.3
TX_GC
_______________________________________________________________________________________
5
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—PA BIAS
(MAX2820/MAX2821 EV kit: V
ters set to default power-up settings, T = +25°C, unless otherwise noted. Typical values are at V
= +2.7V to +3.6V, SHDNB = V , TX_ON = V , CSB = V , PA_BIAS enabled, RBIAS = 12kΩ, regis-
CC
IH IH IH
= +2.7V, unless otherwise noted.)
CC
A
PARAMETER
CONDITIONS
MIN
TYP
4
MAX
UNITS
Bits
µA
Resolution
Full-Scale Output Current
LSB Size
300
20
µA
Output Voltage Compliance Range
(Note 11)
1.0
1.2
1.3
V
Relative to rising edge of CSB, zero to full-
scale step 0000 → 1111, settle to 1/2 LSB,
2pF load
Settling Time
1
µs
AC ELECTRICAL CHARACTERISTICS—SYNTHESIZER
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, f and f
= 2400MHz to 2499MHz, f
= 22MHz or 44MHz, SHDNB = V ,
OSC IH
CC
RF
LO
CSB = V , RBIAS = 12kΩ, I = +2mA, BW
= 45kHz, registers set to default power-up settings, T = +25°C, unless otherwise
IH
CP
PLL
A
noted. Typical values are at V
= +2.7V, f = 2437MHz, f
= 22MHz, unless otherwise noted.) (Note 11)
OSC
CC
LO
PARAMETER
FREQUENCY SYNTHESIZER
LO Frequency Range
CONDITIONS
MIN
TYP
MAX
UNITS
2400
2499
MHz
MHz
MHz
R(0) = 0
R(0) = 1
22
44
Reference Frequency
Channel Spacing
1
ICP = 0
1
2
2
MAX2820/MAX2821
Charge-Pump Output Current
ICP = 1
mA
V
MAX2820A/MAX2821A
Charge-Pump Compliance Range
0.4
V
- 0.4
CC
-11MHz ≤ f
-22MHz ≤ f
≤ 11MHz
-41
-75
OFFSET
< -11MHz,
≤ 22MHz
OFFSET
OFFSET
Reference Spur Level (Note 10)
dBc
11MHz < f
f
f
f
< -22MHz, f
> 22MHz
OFFSET
-90
-80
-87
OFFSET
OFFSET
OFFSET
= 10kHz
Closed-Loop Phase Noise
dBc/Hz
= 100kHz
Noise integrated from 100Hz to 10MHz,
measured at the TX_RF output
Closed-Loop Integrated Phase Noise
2.5
°
RMS
Reference Oscillator Input Level
VOLTAGE-CONTROLLED OSCILLATOR
VCO Tuning Voltage Range
AC-coupled sine wave input
200
0.4
600
1000
2.3
mV
P-P
V
f
f
= 2400MHz
= 2499MHz
170
130
LO
VCO Tuning Gain
MHz/V
LO
6
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
AC ELECTRICAL CHARACTERISTICS—SYSTEM TIMING
(MAX2820/MAX2821 EV kit: V
= +2.7V to +3.6V, f and f
= 2400MHz to 2499MHz, f
= 22MHz or 44MHz, SHDNB = V ,
OSC IH
CC
RF
LO
CSB = V , RBIAS = 12kΩ, I = +2mA, BW
= 45kHz, registers set to default power-up settings, T = +25°C, unless otherwise
IH
CP
LOOP
A
noted. Typical values are at V
= +2.7V, f = 2437MHz, f
= 22MHz, unless otherwise noted.) (Note 11)
OSC
CC
LO
PARAMETER
CONDITIONS
= 2400MHz ↔ 2499MHz,
MIN
TYP
MAX
UNITS
f
f
LO
Channel-Switching Time
150
200
µs
settles to 10kHz (Note 9)
LO
RX to TX, output settles to within 2dB of final value of
output power, relative to rising edge of TX_ON
3
5
3
5
RX/TX Turnaround Time
(Note 11)
µs
TX to RX, output settles to within 2dB of final value of
output power, relative to rising edge of RX_ON
Standby to TX, output settles to within 2dB of final value
of output power, relative to rising edge of TX_ON (Note 11)
Standby-to-Transmit Mode
Standby-to-Receive Mode
µs
µs
Standby to RX, output settles to within 2dB of final value
of output power, relative to rising edge of RX_ON (Note 11)
AC ELECTRICAL CHARACTERISTICS—SERIAL INTERFACE TIMING
(MAX2820/MAX2821 EV kit: V = +2.7V to +3.6V, registers set to default power-up settings, T = +25°C, unless otherwise noted.) (Note 11)
CC
A
PARAMETER
SERIAL INTERFACE TIMING (See Figure 1)
CONDITIONS
MIN
TYP
MAX
UNITS
t
SCLK rising edge to CSB falling edge wait time
Falling edge of CSB to rising edge of first SCLK time
Data-to-serial clock setup time
5
5
ns
ns
CSO
t
CSS
t
5
ns
DS
DH
CH
t
t
Data-to-clock hold time
10
10
10
5
ns
Serial clock pulse-width high
ns
t
CL
Clock pulse-width low
ns
t
Last SCLK rising edge to rising edge of CSB
CSB high pulse width
ns
CSH
CSW
t
10
5
ns
t
Time between the rising edge of CSB and the next rising edge of SCLK
Clock frequency
ns
CS1
f
50
MHz
CLK
Note 1: Parameters are production tested at +25°C only. Min/max limits over temperature are guaranteed by design and characterization.
Note 2: Defined as the baseband differential RMS output voltage divided by the RMS input voltage (at the RF balun input).
Note 3: Noise-figure specification excludes the loss of the external balun. The external balun loss is typically ~0.5dB.
Note 4: CCK interferer at 25MHz offset. Desired signal equals -73dBm. Interferer amplitude increases until baseband output from
interferer is 10dB below desired signal. Adjacent channel rejection = P
- P
.
interferer
desired
Note 5: Measured at balun input. Two CW tones at -43dBm with 15MHz and 25MHz spacing from the MAX2820/MAX2821 channel
frequency. IP3 is computed from 5MHz IMD3 product measured at the RX I/Q output.
Note 6: Two CW interferers at -38dBm with 24.5MHz and 25.5MHz spacing from the MAX2820/MAX2821 channel frequency. IP2 is
computed from the 1MHz IMD2 product measured at the RX I/Q output.
Note 7: Output power measured after the matching and balun. TX gain is set to maximum.
Note 8: Adjacent and alternate channel power relative to the desired signal. TX gain is adjusted until the output power is -1dBm.
Power measured with 100kHz video BW and 100kHz resolution BW.
Note 9: Time required to reprogram the PLL, change the operating channel, and wait for the operating channel center frequency to
settle within 10kHz of the nominal (final) channel frequency.
Note 10: Relative amplitude of reference spurious products appearing in the TX RF output spectrum relative to a CW tone at
0.5MHz offset from the LO.
Note 11: Min/max limits are guaranteed by design and characterization.
_______________________________________________________________________________________
7
2.4GHz 802.11b Zero-IF Transceivers
Typical Operating Characteristics
(MAX2820/MAX2821 EV kit, V
= +2.7V, f
= 1MHz, f
= 2450MHz, receive baseband outputs = 500mV , transmit base-
LO P-P
CC
BB
band inputs = 400mV , I
input biased at +1.2V, registers set to default power-up settings, T = +25°C, unless otherwise noted.)
= +2mA, BW
= 45kHz, differential RF input/output matched to 50Ω through a balun, baseband
P-P CP
PLL
A
RECEIVER VOLTAGE GAIN
vs. GAIN-CONTROL VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
120
100
80
60
40
20
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
RECEIVE, V
= V
RECEIVE, V
= V
RF_GAIN IH
RF_GAIN
IH
V
= V
RF_GAIN
IH
V
= V
,
RF_GAIN
IH
("A" VERSION)
V
= V ,
IL
RF_GAIN
TRANSMIT
TRANSMIT
RECEIVE, V
= V
("A" VERSION)
RECEIVE, V
= V
IL
RF_GAIN
IL
RF_GAIN
V
= V
IL
RF_GAIN
V
= 500mV
P-P
OUT
STANDBY
60
STANDBY
f
f
= 1MHz
BB
LO
= 2450MHz
0
0.5
1.0
1.5
2.0
-40
-15
10
35
85
2.7
3.0
3.3
3.6
V
(V)
TEMPERATURE (°C)
V
(V)
RX_AGC
CC
RECEIVER DETECTOR HYSTERESIS
vs. INPUT POWER
RECEIVER VOLTAGE GAIN
vs. RF FREQUENCY
RECEIVER NOISE FIGURE vs. GAIN
50
45
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
MAX2820/MAX2821 ONLY
f
= 1MHz
BB
HIGH
V
= V
IL
RF_GAIN
V
= V , V
IH RX_AGC
= 2.0V
HIGH-GAIN MODE
HIGH
RF_GAIN
LOW
LOW
LOW-GAIN MODE
V
= V
IH
RF_GAIN
V
= V , V
IL RX_AGC
= 2.0V
2480
f
f
= 1MHz
RF_GAIN
BB
LO
= 2450MHz
0
0
-65
-60
-55
-50
-45
-40
-35
0
20
40
60
80
100
2400
2420
2440
2460
2500
P
(dBm)
RX GAIN (dB)
RF FREQUENCY (MHz)
IN
RECEIVER FILTER RESPONSE
(1kHz TO 1MHz)
RECEIVER FILTER RESPONSE
(1MHz TO 100MHz)
RECEIVER LEAKAGE SPECTRUM
10
0
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-120
V
LO
= V
IH
RF_GAIN
= 2400MHz
f
-10
-20
-30
-40
-50
-60
-70
-80
-90
-10
-20
-30
-40
-50
-60
-70
-80
-90
RX_1K = V
RX_1K = V
IH
,
IH
"A" VERSION
("A" VERSION)
RX_1K = V ,
IL
(BOTH VERSIONS)
1
10
100
1000
1
10
FREQUENCY (MHz)
100
0
0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0
FREQUENCY (GHz)
FREQUENCY (kHz)
8
_______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Typical Operating Characteristics (continued)
(MAX2820/MAX2821 EV kit, V
= +2.7V, f
= 1MHz, f
= 2450MHz, receive baseband outputs = 500mV , transmit base-
LO P-P
CC
BB
band inputs = 400mV , I
input biased at +1.2V, registers set to default power-up settings, T = +25°C, unless otherwise noted.)
= +2mA, BW
= 45kHz, differential RF input/output matched to 50Ω through a balun, baseband
P-P CP
PLL
A
TRANSMITTER OUTPUT POWER
vs. FREQUENCY
RECEIVER BASEBAND OUTPUT SPECTRUM
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
-10
-20
-30
-40
-50
-60
-70
-80
V
= V
IH
RF_GAIN
RX GAIN = 50dB
-40°C
("A" VERSION)
f
f
= 5MHz
= 2450MHz
BB
LO
+25°C
-40°C
+25°C
+85°C
("A" VERSION)
+85°C
("A" VERSION)
V
= 400mV
P-P
IN
V
= 0V
TX_GC
11Mbps CCK
2400
2420
2440 2460 2480 2500
FREQUENCY (MHz)
0
2.7
0
5
10 15 20 25 30 35 40 45 50
FREQUENCY (MHz)
TRANSMITTER OUTPUT POWER
vs. SUPPLY VOLTAGE
TRANSMITTER OUTPUT SPECTRUM
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
RBW = 100kHz
V
= 400mV
IN
P-P
-40°C ("A" VERSION)
11Mbps CCK
P
= -1dBm
-40°C
OUT
+25°C ("A" VERSION)
+85°C ("A" VERSION)
+25°C
+85°C
V
= 400mV
P-P
TX_GC
IN
V
= 0V
11Mbps CCK
3.0
3.3
3.6
-33
-22
-11
0
11
22
33
V
(V)
FREQUENCY OFFSET FROM CARRIER (MHz)
CC
TRANSMITTER GAIN
vs. GAIN-CONTROL VOLTAGE
TRANSMITTER OUTPUT SPECTRUM
10
0
5
0
-40°C
CW SIGNAL
f
f
= 3.3MHz
= 2450MHz
BB
LO
-10
-20
-30
-40
-50
-60
-70
-80
-5
+25°C +85°C
-10
-15
-20
-25
-30
-35
-40°C ("A" VERSION)
+25°C ("A" VERSION)
+85°C ("A" VERSION)
0dB = MAX P
IN
AT +25°C
OUT
P-P
V
= 400mV
11Mbps CCK
0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0
FREQUENCY (GHz)
0
0.5
1.0
1.5
2.0
V
(V)
TX_GC
_______________________________________________________________________________________
9
2.4GHz 802.11b Zero-IF Transceivers
Typical Operating Characteristics (continued)
(MAX2820/MAX2821 EV kit, V
= +2.7V, f = 1MHz, f = 2450MHz, receive baseband outputs = 500mV , transmit baseband
BB LO P-P
CC
inputs = 400mV , I
= +2mA, BW
= 45kHz, differential RF input/output matched to 50Ω through a balun, baseband input
P-P CP
PLL
biased at +1.2V, registers set to default power-up settings, T = +25°C, unless otherwise noted.)
A
OPEN-LOOP PHASE NOISE
vs. OFFSET FREQUENCY
TRANSMITTER BASEBAND FILTER RESPONSE
10
LO FREQUENCY vs. TUNING VOLTAGE
2.65
2.60
2.55
2.50
2.45
2.40
2.35
2.30
2.25
2.20
-40
-50
f
= 2450MHz
LO
f
= 2450MHz
LO
0
MEASURED AT
TX OUTPUT
-60
-10
-20
-30
-40
-50
-60
-40°C
-70
-80
+25°C
-90
-100
-110
-120
-130
-140
+85°C
0
10 20 30 40 50 60 70 80 90 100
FREQUENCY (MHz)
0
0.5
1.0
V
1.5
(V)
2.0
2.5
1
10
100
1000
TUNE
OFFSET FREQUENCY (kHz)
CLOSED-LOOP PHASE NOISE
vs. OFFSET FREQUENCY
VCO/PLL SETTING TIME
50
40
-50
-60
f
= 2450MHz
LOOP
BW
= 45kHz
LO
BW
I
LOOP
= 45kHz
f
= 2499MHz TO 2400MHz
LO
30
= 2mA
= 2.1°
CP
INT
MAX2820/MAX2821
-70
φ
RMS
20
-80
10
0
-90
MAX2820/MAX2821
("A" VERSION)
-10
-20
-30
-40
-50
-100
-110
-120
-130
0
40 80 120 160 200 240 280 320 360 400
100
1k
10k
100k
1M
TIME (µs)
OFFSET FREQUENCY (Hz)
10 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Pin Configuration/Functional Diagram
48
47
46
45
44
43
42
41
40
39
38
37
VCC_LNA
1
2
36 SHDNB
35 VCC_RXF
34 VCC_LO
PROGRAMMING AND
MODE CONTROL
RX LEVEL
DETECTOR
VREF
(MAX2821/MAX2821A)
3
RF_GAIN
RX_RFN
RX_RFP
VCC_REF
RBIAS
4
33
VCC_VCO
32 BYP
31
5
6
TUNE
90
0
0
7
30 GND_VCO
29 GND_CP
28 CP_OUT
27 VCC_CP
26 CSB
MAX2820/
MAX2821
INTEGER-N
SYNTHESIZER
90
TX_RFP
TX_RFN
PA_BIAS
8
9
10
∑
VOS COMP
SERIAL
INTERFACE
VCC_DRVR 11
TX_GC 12
25 SCLK
13
14
15
16
17
18
19
20
21
22
23
24
______________________________________________________________________________________ 11
2.4GHz 802.11b Zero-IF Transceivers
Pin Description
PIN
NAME
DESCRIPTION
Supply Voltage for LNA. Bypass with a capacitor as close to the pin as possible. Do not share the
bypass capacitor ground vias with other branches.
1
VCC_LNA
N.C.
VREF
No Connection. Not internally connected (MAX2820/MAX2820A only).
Voltage Reference Output (MAX2821/MAX2821A only).
2
3
4
RF_GAIN
LNA Gain Select Logic Input. Logic high for LNA high-gain mode, logic low for LNA low-gain mode.
Receiver LNA Negative Input. On-chip AC-coupling. Requires off-chip impedance match and
connection to 2:1 balun.
RX_RFN
RX_RFP
Receiver LNA Positive Input. On-chip AC-coupling. Requires off-chip impedance match and
connection to 2:1 balun.
5
Supply Voltage for Bias Circuitry and Autotuner. Bypass with a capacitor as close to the pin as
possible. Do not share the bypass capacitor ground vias with other branches.
6
7
8
VCC_REF
RBIAS
Precision Bias Resistor Pin. Connect a 12kΩ precision resistor (≤2%) to GND.
Transmit Driver Amplifier Positive Output. On-chip pullup choke to V . Requires off-chip impedance
CC
match and connection to 4:1 balun.
TX_RFP
Transmit Driver Amplifier Negative Output. On-chip pullup choke to V . Requires off-chip
CC
impedance match and connection to 4:1 balun.
9
TX_RFN
PA_BIAS
VCC_DRVR
TX_GC
Power-Amplifier Bias-Current Control Signal. Analog output. High-impedance, open-drain current
source. Connect directly to bias-current control input on external PA.
10
11
12
13
14
15
16
17
Supply Voltage for Transmit Driver. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
Transmit Gain-Control Input. Analog high-impedance input. Connect directly to baseband IC DAC
output. See the Typical Operating Characteristics for Transmitter Gain vs. Gain-Control Voltage.
Supply Voltage for Transmit Mixer and VGA. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
VCC_TMX
TX_BBIN
TX_BBIP
TX_BBQP
TX_BBQN
Transmit Negative In-Phase Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
Transmit Positive In-Phase Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
Transmit Positive Quadrature Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
Transmit Negative Quadrature Baseband Input. Analog high-impedance differential input. Connect
directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage.
Supply Voltage for Transmit Baseband Filter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
18
19
VCC_TXF
GND_DIG
Digital Ground
12 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Pin Description (continued)
PIN
20
NAME
VCC_DIG
N.C.
DESCRIPTION
Supply Voltage for Digital Circuitry. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
21
No Connection. Not internally connected.
Reference Oscillator Positive Input. Analog high-impedance differential input. DC-coupled. Requires
external AC-coupling. Connect an external reference oscillator to this analog input.
22
ROSCP
Reference Oscillator Negative Input. Analog high-impedance differential input. DC-coupled. Requires
external AC-coupling. Bypass this analog input to ground with a capacitor for single-ended operation.
23
24
25
26
27
28
ROSCN
DIN
3-Wire Serial-Interface Data Input. Digital high-impedance input. Connect directly to baseband IC
serial-interface CMOS output (SPI™/QSPI™/MICROWIRE™ compatible).
3-Wire Serial-Interface Clock Input. Digital high-impedance input. Connect this digital input directly to
baseband IC serial-interface CMOS output (SPI/QSPI/MICROWIRE compatible).
SCLK
CSB
3-Wire Serial-Interface Enable Input. Digital high-impedance input. Connect directly to baseband IC
serial-interface CMOS output (SPI/QSPI/MICROWIRE compatible).
Supply Voltage for PLL Charge Pump. Bypass with a capacitor as close to the pin as possible. Do not
share the bypass capacitor ground vias with other branches.
VCC_CP
PLL Charge-Pump Output. Analog high-impedance output. Current source. Connect directly to the
PLL loop filter input.
CP_OUT
GND_CP
29
30
PLL Charge-Pump Ground. Connect to PC board ground plane.
GND_VCO VCO Ground. Connect to PC board ground plane.
VCO Frequency Tuning Input. Analog high-impedance voltage input. Connect directly to the PLL loop
filter output.
31
32
TUNE
BYP
VCO Bias Bypass. Bypass with a 2000pF capacitor to ground.
Supply Voltage for VCO. Bypass with a capacitor as close to the pin as possible. Do not share the
bypass capacitor ground vias with other branches. Important note: Operate from separate regulated
supply voltage.
33
VCC_VCO
Supply Voltage for VCO, LO Buffers, and LO Quadrature Circuitry. Bypass with a capacitor as close
to the pin as possible. Do not share the bypass capacitor ground vias with other branches.
34
35
VCC_LO
Supply Voltage for Receiver Baseband Filter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
VCC_RXF
Active-Low Shutdown Input. Digital high-impedance CMOS input. Connect directly to baseband IC
mode control CMOS output. Logic low to disable all device functions. Logic high to enable normal
chip operation.
36
37
38
SHDNB
DOUT
Serial-Interface Data Output. Digital CMOS output. Optional connection.
Receiver 1kHz Highpass Bandwidth Control. Digital CMOS input. Connect directly to baseband IC
CMOS output. Controls receiver baseband highpass -3dB corner frequency; logic low for 10kHz,
logic high for 1kHz. See the Applications Information section for proper use of this function.
RX_1K
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
______________________________________________________________________________________ 13
2.4GHz 802.11b Zero-IF Transceivers
Pin Description (continued)
PIN
NAME
DESCRIPTION
Receive Positive Quadrature Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
39
RX_BBQP
Receive Negative Quadrature Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
40
41
42
RX_BBQN
RX_BBIN
RX_BBIP
RX_DET
Receive Negative In-Phase Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and
can drive loads up to 5kΩ || 5pF.
Receive Positive In-Phase Baseband Output. Analog low-impedance differential buffer output.
Connect output directly to baseband ADC input. Internally biased to 1.2V and can drive loads up to
5kΩ || 5pF.
Receive Level Detection Output. Digital CMOS output. Connect output directly to baseband IC input.
Used to indicate RF input level. Logic high for input levels above -49dBm (typ). Logic low for levels
below -54dBm (typ). (MAX2820 and MAX2821)
43
N.C.
No Connection (MAX2820A/MAX2821A)
Supply Voltage for Receiver Baseband Buffer. Bypass with a capacitor as close to the pin as
possible. Do not share the bypass capacitor ground vias with other branches.
44
45
46
VCC_BUF
RX_ON
Receiver-On Control Input. Digital CMOS input. Connect to baseband IC mode control CMOS output.
Supply Voltage for Receiver Downconverter. Bypass with a capacitor as close to the pin as possible.
Do not share the bypass capacitor ground vias with other branches.
VCC_RMX
Transmitter-On Control Input. Digital CMOS input. Connect directly to baseband IC mode control
CMOS output.
47
48
TX_ON
RX_AGC
GND
Receive AGC Control. Analog high-impedance input. Connect directly to baseband IC DAC voltage
output. See the Typical Operating Characteristics for Gain vs. V
.
RX_AGC
Exposed
Paddle
DC and AC Ground Return for IC. Connect to PC board ground plane using multiple vias.
Receive Filter
Changes in “A” Version
The original device has the ability to control the base-
band LPF corner; the “A” version sets the LPF corner at
8.0MHz. Register bits RECEIVE:D2–D0 are now “don’t
cares.”
The MAX2820A/MAX2821A are cost-reduced versions
of the original MAX2820/MAX2821, intended as a drop-
in replacement—no changes to PC board layout, BOM,
or control software are required. Functionally, the “A”
version removes unused functions and programmability
while maintaining virtually identical performance char-
acteristics. The changes are detailed below.
Receive-Level Detector (RSSI)
The original device has a receive-level detect output (pin
43, “RX_DET”); the “A” version removes this functionality.
Pin 43 is a no-connect (N.C.) on the “A” version.
Synthesizer
The original device has the ability to program the
charge-pump source/sink current ( 1mA or 2mA); the
“A” version sets the charge-pump current at 2mA, and
bit SYNTH:D6 (ICP) should now always be pro-
grammed to be 1.
14 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
CSB
t
CSW
t
CSO
t
t
CSH
CSS
SCLK
t
DS
t
t
t
CS1
DH
CH
t
CL
DIN
BIT 1
BIT 2
BIT 6
BIT 7
BIT 8
BIT 14
BIT 8
BIT 15
BIT 16
t
DV
t
TR
t
DO
DOUT
BIT 1
BIT 2
BIT 6
BIT 7
BIT 14
BIT 15
BIT 16
Figure 1. MAX2820/MAX2821 Serial-Interface Timing Diagram
Table 1. Operating-Mode Truth Table
MODE CONTROL INPUTS
CIRCUIT BLOCK STATES
OPERATING MODE
SHDNB
TX_ON
RX_ON
RX_PATH
OFF
TX_PATH
OFF
PLL/VCO/LO GEN.
Shutdown
Standby
Receive
Transmit
0
1
1
1
X
0
0
1
X
0
1
0
OFF
ON
ON
ON
OFF
OFF
ON
OFF
OFF
ON
values at any time. Refer to the serial-interface specifi-
cation for details.
Operating Modes
The MAX2820/MAX2821 have four primary modes of
operation: shutdown, standby, receive active, and
transmit active. The modes are controlled by the digital
inputs SHDNB, TX_ON, and RX_ON. Table 1 shows the
operating mode vs. the digital mode control input.
Receive Mode
Receive mode is enabled by driving the digital inputs
SHDNB high, RX_ON high, and TX_ON low. In receive
mode, all receive circuit blocks are powered on and all
VCO, PLL, and autotuner circuits are powered on. None of
the transmit path blocks are active in this mode. Although
the receiver blocks turn on quickly, the DC offset nulling
requires ~10µs to settle. The receiver signal path is ready
~10µs after a low-to-high transition on RX_ON.
Shutdown Mode
Shutdown mode is achieved by driving SHDNB low. In
shutdown mode, all circuit blocks are powered down,
except for the serial interface circuitry. While the device
is in shutdown, the serial interface registers can still be
loaded by applying V
to the digital supply voltage
Transmit Mode
Transmit mode is achieved by driving the digital inputs
SHDNB high, RX_ON low, and TX_ON high. In transmit
mode, all transmit circuit blocks are powered on and all
VCO, PLL, and autotuner circuits are powered on.
None of the receive path blocks is active in this mode.
Although the transmitter blocks turn on quickly, the
baseband DC offset calibration requires ~2.2µs to
complete. In addition, the TX driver amplifier is ramped
from the low-gain state (minimum RF output) to high-
gain state (peak RF output) over the next 1µs to 2µs.
The transmit signal path is ready ~4µs after a low-to-
high transition on TX_ON.
CC
(VCC_DIG). All previously programmed register values
are preserved during the shutdown mode, as long as
VCC_DIG is applied.
Standby Mode
Standby mode is achieved by driving SHDNB high and
RX_ON and TX_ON low. In standby mode, the PLL,
VCO, LO generator, LO buffer, LO quadrature, and fil-
ter autotuner are powered on by default. The standby
mode is intended to provide time for the slower-settling
circuitry (PLL and autotuner) to turn on and settle to the
correct frequency before making RX or TX active. The
3-wire serial interface is active and can load register
______________________________________________________________________________________ 15
2.4GHz 802.11b Zero-IF Transceivers
Table 2. Programming Register Definition Summary (Address and Data)
4 ADDRESS BITS
12 DATA BITS
REGISTER
NAME
A3
A2
A1
14
0
A0
13
0
D11
12
0
D10
11
0
D9
10
0
D8
9
D7
8
D6
7
D5
6
D4
5
D3
4
D2
3
D1
2
D0
LSB
1
MSB 15
TEST
ENABLE
SYNTH
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
E11
X
E10
X
E9
X
E8
X
E7
X
E6
ICP
E5
R5
E4
R4
E3
R3
E2
R2
E1
R1
E0
1
0
R0
SYNTH
(“A” VERSION)
0
0
1
0
X
X
X
X
X
X
R5
R4
R3
R2
R1
R0
CHANNEL
RECEIVE
0
0
0
1
1
0
1
0
X
X
X
X
X
CF6
1C0
CF5
DL1
CF4
DL0
CF3
SF
CF2
CF1
CF0
2C2
2C1
2C0
1C2
1C1
BW2 BW1 BW0
RECEIVE
(“A” VERSION)
0
0
1
1
0
0
0
1
2C2
X
2C1
X
2C0
X
1C2
X
1C1
X
1C0
X
0
X
1
X
0
X
X
X
TRANSMIT
PA3
PA2
PA1
PA0
X = Don’t care.
Power-Up Default States
Programmable Registers
The devices provide power-up loading of default states
for each of the registers. The states are loaded on a
The MAX2820/MAX2820A and MAX2821/MAX2821A
(the MAX2820 family) contain programmable registers
to control various modes of operation for the major cir-
cuit blocks. The registers can be programmed through
the 3-wire SPI/QSPI/MICROWIRE-compatible serial
port. The MAX2820 family includes five programmable
registers:
VCC_DIG supply voltage transition from 0V to V . The
CC
default values are retained until reprogrammed through
the serial interface or the power supply voltage is taken
to 0V. The default state of each register is described in
Table 3. Note: Putting the IC in shutdown mode does
not change the contents of the programming registers.
1) Test register (always program as in Table 2).
2) Block-enable register
Block-Enable Register
The block-enable register permits individual control of the
enable state for each major circuit block in the transceiver.
The actual enable condition of the circuit block is a logical
function of the block-enable bit setting and other control
input states. Table 4 documents the logical definition of
state for each major circuit block.
3) Synthesizer register
4) Channel frequency register
5) Receiver settings register
6) Transmitter settings register
Synthesizer Register
The synthesizer register (SYNTH) controls the reference
frequency divider and charge-pump current of the PLL.
See Table 5 for a description of the bit settings.
Each register consists of 16 bits. The four most signifi-
cant bits (MSBs) are the register’s address. The twelve
least significant bits (LSBs) are used for register data.
Table 2 summarizes the register configuration. A
detailed description of each register is provided in
Tables 3–6.
Channel Frequency Register
The channel frequency register (CHANNEL) sets the
RF carrier frequency for the radio. The channel is pro-
grammed as a number from 0 to 99. The actual frequency
is 2400 + channel in MHz. The default setting is 37 for
2437MHz. See Table 6 for a description of the bit settings.
Data is shifted in the MSB first. The data sent to the
transceiver, in 16-bit words, is framed by CSB. When
CSB is low, the clock is active and data is shifted with
the rising edge of the clock. When CSB transitions to
high, the shift register is latched into the register select-
ed by the contents of the address bits. Only the last 16
bits shifted into the device are retained in the shift reg-
ister. No check is made on the number of clock pulses.
Figure 1 documents the serial interface timing for the
MAX2820 family.
Receiver Settings Register
(MAX2820/MAX2821 Only)
The receive settings register (RECEIVE) controls the
receive filter -3dB corner frequency, RX level detector
midpoint, and VGA DC offset nulling parameters. The
defaults are intended to provide proper operation.
16 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Table 3. Register Power-Up Default States
REGISTER
ADDRESS
DEFAULT
FUNCTION
Block-Enable Control Settings (E)
ENABLE
0001
000000011110
Synthesizer Settings:
• Reference frequency (R)
• Lock-detect enable (LD)
• Charge-pump current (ICP) (MAX2820/MAX2821 only)
SYNTH
0010
0011
000001000000
000000100101
CHANNEL
Channel frequency settings (CF)
Receiver Settings:
• VGA DC offset nulling parameter 1 (1C)
• VGA DC offset nulling parameter 2 (2C)
• -3dB lowpass filter bandwidth (BW)
• Detector midpoint level (DL)
• Special function bit (SF)
RECEIVE
0100
0101
111111010010
000000000000
Transmit Settings:
TRANSMIT
•
PA bias (PA)
Table 4. Block-Enable Register (ENABLE)
ADDRESS
DATA BIT CONTENT DEFAULT
DESCRIPTION AND LOGICAL DEFINITION
D11
E(11)
0
Reserved
PA Bias-Control Enable (PAB_EN)
• PAB_EN = SHDNB • (E(10) + TX_ON)
D10
E(10)
0
Transmit Baseband Filters Enable (TXFLT_EN)
• TXFLT_EN = SHDNB • (E(9) + TX_ON)
D9
D8
D7
D6
D5
D4
D3
D2
E(9)
E(8)
E(7)
E(6)
E(5)
E(4)
E(3)
E(2)
0
0
0
0
0
1
1
1
TX Upconverter + VGA + Driver Amp Enable (TXUVD_EN)
• TXUVD_EN = SHDNB • (E(8) + TX_ON)
Receive Detector Enable (DET_EN)
• DET_EN = SHDNB • (E(7) + RX_ON)
RX Downconverter + Filters + AGC Amps Enable (RXDFA_EN)
• RXDFA_EN = SHDNB • (E(6) + RX_ON)
0 0 0 1
Receive LNA Enable (RXLNA_EN)
• RXLNA_EN = SHDNB • (E(5) + RX_ON )
Autotuner Enable (AT_EN)
• AT_EN = SHDNB • (E(4) + RX_ON + TX_ON)
PLL Charge-Pump Enable (CP_EN)
• CP_EN = SHDNB • E(3)
PLL Enable (PLL_EN)
• PLL_EN = SHDNB • E(2)
VCO Enable (VCO_EN)
• VCO_EN = SHDNB • E(1)
D1
D0
E(1)
E(0)
1
0
Reserved
______________________________________________________________________________________ 17
2.4GHz 802.11b Zero-IF Transceivers
Table 5. Synthesizer Register (SYNTH)
ADDRESS
DATA BIT
CONTENT
DEFAULT
DESCRIPTION
D11:D7
X
00000
Reserved
ICP
Charge-Pump Current Select
(MAX2820/
MAX2821)
1
1
• 0 = 1mA charge-pump current
• 1 = 2mA charge-pump current
D6
0 0 1 0
X (MAX2820A/
MAX2821A)
Reserved
Reference Frequency Divider
• 000000 = 22MHz
D5:D0
R(5:0)
000000
• 000001 = 44MHz
Table 6. Channel Frequency Block Register (CHANNEL)
ADDRESS
DATA BIT
CONTENT
DEFAULT
DESCRIPTION
D11:D7
X
00000
Reserved
Channel Frequency Select: f = (2400 + CF(6:0))MHz
LO
• 0000000 = 2400MHz
• 0000001 = 2401MHz
• …………
0 0 1 1
D6:D0
CF(6:0)
0100101
• 1100010 = 2498MHz
• 1100011 = 2499MHz
Table 7a. Receive Settings Register (RECEIVE), (MAX2820/MAX2821 Only)
ADDRESS
DATA BIT
D11:D9
D8:D6
CONTENT
2C(2:0)
DEFAULT
111
DESCRIPTION
VGA DC Offset Nulling Parameter 2
VGA DC Offset Nulling Parameter 1
RX Level Detector Midpoint Select
1C(2:0)
111
• 11 = 01 = 50.2mV
P
D5:D4
D3
DL(1:0)
SF(0)
01
0
• 10 = 70.9mV
• 00 = 35.5mV
P
P
Special Function Select (not presently used)
•
•
0 = OFF
1 = ON
0 1 0 0
Receive Filter -3dB Frequency Select (frequencies are
approximate)
•
•
•
•
•
•
000 = 8.5MHz
001 = 8.0MHz
010 = 7.5MHz
011 = 7.0MHz
100 = 6.5MHz
101 = 6.0MHz
D2:D0
BW(2:0)
010
18 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Table 7b. Receive Settings Register (RECEIVE), (MAX2820A/MAX2821A Only)
ADDRESS
DATA BIT
D11:D9
D8:D6
CONTENT
DEFAULT
111
DESCRIPTION
VGA DC Offset Nulling Parameter 2
2C (2:0)
1C (2:0)
111
VGA DC Offset Nulling Parameter 1
0100
D5:D3
X
X
010
Reserved—Set to these Values
D2:D0
010
Reserved—X = Don’t Care. Rx filter is not programmable.
Table 8. Transmit Settings Register (TRANSMIT)
ADDRESS
DATA BIT
CONTENT
DEFAULT
DESCRIPTION
D11:D4
X
X
Reserved
PA Bias Select:
0 1 0 1
•
•
•
1111 = Highest PA bias
…………
0000 = Lowest PA bias
D3:D0
PA(3:0)
0000
However, the filter frequency and detector can be modi-
fied if desired. Do not reprogram VGA DC offset nulling
parameters. These settings were optimized during devel-
opment. See Table 7 for a description of the bit settings.
The receivers have two LNA gain modes that are digitally
controlled by the logic signal applied to RF_GAIN.
RF_GAIN high enables the high-gain mode, and
RF_GAIN low enables the low-gain mode. The LNA gain
step is nominally 30dB. In most applications, RF_GAIN is
connected directly to a CMOS output of the baseband
IC, and the baseband IC controls the state of the LNA
gain based on the detected signal amplitude.
Transmitter Settings Register
The transmitter settings register (TRANSMIT) controls
the 4-bit PA bias DAC. The 4 bits correspond to a PA
bias current between 0 and full scale (~300µA). See
Table 8 for the bit settings.
Receiver Baseband Lowpass Filtering
The on-chip receive lowpass filters provide the steep
filtering necessary to attenuate the out-of-band
(>11MHz) interfering signals to sufficiently low levels to
preserve receiver sensitivity. The filter frequency
response is precisely controlled on-chip and does not
require user adjustment. In the MAX2820/MAX2821, a
provision is made to permit the -3dB corner frequency
and entire response to be slightly shifted up or down in
frequency. This is intended to offer some flexibility in
trading off adjacent channel rejection vs. passband
distortion. The filter -3dB frequency is programmed
through the serial interface. The specific bit setting vs.
-3dB frequency is shown in Table 7. The typical receive
baseband filter gain vs. frequency profile is shown in
the Typical Operating Characteristics.
Applications Information
Receive Path
LNA
The RX_RF inputs are high-impedance RF differential
inputs AC-coupled on-chip to the LNA. The LNA inputs
require external impedance matching and differential to
single-ended conversion. The balanced to single-
ended conversion and interface to 50Ω is achieved
through the use of an off-chip 2:1 balun transformer,
such as the small surface-mount baluns offered by
Murata and TOKO. In the case of the 2:1 balun, the RX
RF input must be impedance-matched to a differen-
tial/balanced impedance of 100Ω. A simple LC network
is sufficient to impedance-match the LNA to the balun.
The Typical Application Circuit shows the balun, induc-
tors, and capacitors that constitute the matching net-
work. Refer to the MAX2820/MAX2821 EV kit schematic
for component values of the matching network.
Receive Gain Control and DC Offset Nulling
The receive path gain is varied through an external volt-
age applied to the pin RX_AGC. Maximum gain is at
V
= 0V and minimum gain is at V
= 2V.
RX_AGC
RX_AGC
The line lengths and parasitics have a noticeable impact
on the matching element values in the board-level circuit.
Some empirical adjustment of LC component values is
likely. Balanced line layout on the differential input traces
is essential to maintaining good IP2 performance and RF
common-mode noise rejection.
The RX_AGC input is a high-impedance analog input
designed for direct connection to the RX_AGC DAC
output of the baseband IC. The gain-control range,
which is continuously variable, is typically 70dB. The
gain-control characteristic is shown in the Typ ic a l
______________________________________________________________________________________ 19
2.4GHz 802.11b Zero-IF Transceivers
Op e ra ting Cha ra c te ris tic s section graph Receiver
Transmit Path Baseband Lowpass Filtering
Voltage Gain vs. Gain-Control Voltage.
The on-chip transmit lowpass filters provide the filtering
necessary to attenuate the unwanted higher-frequency
spurious signal content that arises from the DAC clock
feedthrough and sampling images. In addition, the filter
provides additional attenuation of the second sidelobe
of signal spectrum. The filter frequency response is set
on-chip. No user adjustment or programming is
required. The Typical Gain vs. Frequency profile is
shown in the Typical Operating Characteristics.
Some local noise filtering through a simple RC network
at the input is permissible. However, the time constant
of this network should be kept sufficiently low in order
not to limit the desired response time of the RX gain-
control function.
Receiver Baseband Amplifier Outputs
The receiver baseband outputs (RX_BBIP, RX_BBIN,
RX_BBQP, and RX_BBQN) are differential low-imped-
ance buffer outputs. The outputs are designed to be
directly connected (DC-coupled) to the in-phase (I) and
quadrature-phase (Q) ADC inputs of the baseband IC.
The RX I/Q outputs are internally biased to +1.2V com-
mon-mode voltage. The outputs are capable of driving
loads up to 5kΩ || 5pF with the full bandwidth baseband
Transmitter DC Offset Calibration
In a zero-IF system, in order to achieve low LO leakage
at the RF output, the DC offset of the TX baseband sig-
nal path must be reduced to as near zero as possible.
Given that the amplifier stages, baseband filters, and
TX DAC possesses some finite DC offset that is too
large for the required LO leakage specification, it is
necessary to “null” the DC offset. The MAX2820 family
accomplishes this through an on-chip calibration
sequence. During this sequence, the net TX baseband
signal path offsets are sampled and cancelled in the
baseband amplifiers. This calibration occurs in the first
~2.2µs after TX_ON is taken high. During this time, it is
essential that the TX DAC output is in the 0V differential
state. The calibration corrects for any DAC offset.
However, if the DAC is set to a value other than the 0V
state, then an offset is erroneously sampled by the TX
offset calibration. The TX DAC output must be put into
the 0V differential state at or before the time TX_ON is
taken high.
signals at a differential amplitude of 500mV
.
P-P
Proper board layout is essential to maintain good bal-
ance between I/Q traces. This provides good quadra-
ture phase accuracy.
Receiver Power Detector (MAX2820/MAX2821 Only)
The receiver level detector is a digital output from an
internal threshold detector that is used to determine
when to change the LNA gain state. In most applications,
it is connected directly to a comparator input of the base-
band IC. The threshold level can be programmed
through the MAX2820/MAX2821 control software.
Transmit Path
Transmitter Baseband Inputs
The transmitter baseband inputs (TX_BBIP, TX_BBIN,
TX_BBQP, and TX_BBQN) are high-impedance differ-
ential analog inputs. The inputs are designed to be
directly connected (DC-coupled) to the in-phase (I) and
quadrature-phase (Q) DAC outputs of the baseband IC.
The inputs must be externally biased to +1.2V common-
mode voltage. Typically, the DAC outputs are current
outputs with external resistor loads to ground. I and Q
Power-Amplifier Driver Output
The TX_RF outputs are high-impedance RF differential
outputs directly connected to the driver amplifier. The
outputs are essentially open-collector outputs with an
on-chip inductor choke connected to VCC_DRVR. The
power-amplifier driver outputs require external imped-
ance matching and differential to single-ended conver-
sion. The balanced to single-ended conversion and
interface to 50Ω is achieved through the use of an off-
chip 4:1 balun transformer, such as one from Murata or
TOKO. In this case, the TX RF output must be imped-
ance-matched to a differential/balanced impedance of
200Ω. The Typical Application Circuit shows the balun,
inductors, and capacitors that constitute the matching
network of the power amplifier driver outputs. The out-
put match should be adjusted until the return loss at the
balun output is >10dB.
are nominally driven by a 400mV
band signal.
differential base-
P-P
Proper board layout is essential to maintain good bal-
ance between I/Q traces. This provides good quadra-
ture phase accuracy by maintaining equal parasitic
capacitance on the lines. In addition, it is important not
to expose the TX I/Q circuit board traces going from the
digital baseband IC to the TX_BB inputs. The lines
should be shielded on an inner layer to prevent cou-
pling of RF to these TX I/Q inputs and possible enve-
lope demodulation of the RF signal.
20 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Transmit Gain Control
The transmit gain-control input provides a direct analog
control over the transmit path gain. The transmit gain is
controlled by an external voltage at pin TX_GC. The typ-
ical gain-control characteristic is provided in the Typical
Op e ra ting Cha ra c te ris tic s graph Transmitter Gain
Control vs. Gain-Control Voltage. The input is a high-
impedance analog input designed to directly connect to
the DAC output of the baseband IC. Some local noise
filtering through a simple RC network at the input is per-
missible. However, the time constant of this network
should be kept sufficiently low so the desired response
time of the TX gain-control function is not limited.
ed to cover only the required 802.11b channel spacing
and the two possible crystal oscillator options used in
the radios.
Reference Oscillator Input
The reference oscillator inputs ROSCP and ROSCN are
high-impedance analog inputs. They are designed to
be connected to the reference oscillator output through
a coupling capacitor. The input amplitude can range
from 200mV
to 1000mV ; therefore, in the case of
P-P
P-P
a reference oscillator with a CMOS output, the signal
must be attenuated before being applied to the ROSC
inputs. The signal can be attenuated with a resistor- or
capacitor-divider network.
During the TX turn-on sequence, the gain is internally
set at the minimum while the TX baseband offset cali-
bration is taking place. The RF output is effectively
“blanked” for the first 2.2µs after TX_ON is taken high.
After 2.2µs, the “blanking” is released, and the gain-
control amplifier ramps to the gain set by the external
voltage applied to the TX_GC input.
Reference Voltage Output
A voltage reference output is provided on the MAX2821/
MAX2821A from pin 2, VREF, for use with certain base-
band ICs. The nominal output voltage is 1.2V. The ref-
erence voltage is first- order compensated over
temperature to provide a reasonably low drift output,
1.1V to 1.3V over temperature, under load conditions.
The output stage is designed to drive 2mA loads with
up to 20pF of load capacitance. The VREF output is
designed to directly connect to the baseband refer-
ence input.
PA Bias DAC Output
The MAX2820 family provides a programmable analog
current source output for use in biasing the RF power
amplifier, such as the MAX2242. The output is essentially
an open-drain output of a current source DAC. The output
is designed to directly connect to the bias-current pin on
the power amplifier. The value of the current is deter-
mined by the 4 bits programmed into transmit (D3:D0).
This programmability permits optimizing of the power-
amplifier idle current based on the output power level of
the PA. Care must be taken in the layout of this line. Avoid
running the line in parallel with the RF line. RF might cou-
ple onto the line, given the high impedance of the output.
This might result in rectified RF, altering the value of the
bias current and causing erratic PA operation.
Loop Filter
The PLL uses a classical charge pump into an external
loop filter (C-RC) in which the filter output connects to
the voltage tuning input of the VCO. This simple third-
order lowpass loop filter closes the loop around the
synthesizer. The Typical Application Circuit shows the
loop filter elements around the transceiver. The capaci-
tor and resistor values are set to provide the loop band-
width required to achieve the desired lock time while
also maintaining loop stability. Refer to the MAX2820/
MAX2821 EV kit schematic for component values. A
45kHz loop bandwidth is recommended to ensure that
the loop settles quickly enough to achieve 5µs TX turn-
around time and 10µs RX turnaround time. This is the
loop filter on the EV kit. Narrowing the loop bandwidth
increases the settling time and results in unacceptable
TX-RX turnaround time performance.
Synthesizer
Channel Frequency and Reference Frequency
The synthesizer/PLL channel frequency and reference
settings establish the divider/counter settings in the inte-
ger-N synthesizer. Both the channel frequency and ref-
erence oscillator frequency are programmable through
the serial interface. The channel frequency is pro-
grammed as a channel number 0 to 99 to set the carri-
er frequency to 2400MHz to 2499MHz (LO frequency =
channel + 2400). The reference frequency is program-
mable to 22MHz or 44MHz. These settings are intend-
Chip Information
TRANSISTOR COUNT: 13,607
______________________________________________________________________________________ 21
2.4GHz 802.11b Zero-IF Transceivers
Typical Application Circuit
DIGITAL MODE CONTROL SIGNALS
FROM/TO BASEBAND IC
RX ANALOG OUTPUT SIGNAL
TO BASEBAND IC
DIGITAL MODE CONTROL
SIGNALS TO/FROM BASEBAND IC
DAC OUTPUT
FROM BASEBAND IC
48
47
46
45
44
43
42
41
40
39
38
37
SHDNB
VCC_LNA
1
OPTIONAL CONNECTION
TO BASEBAND
36
35
34
33
32
31
30
29
28
27
26
25
PROGRAMMING AND
MODE CONTROL
RX LEVEL
DETECTOR
VCC_RXF
VCC_LO
VREF (MAX2821/MAX2821A)
2
RX GAIN-CONTROL SIGNALS
TO/FROM BASEBAND IC
RF_GAIN
3
RX_RFN
4
VCC_VCO
BYP
RX RF INPUT FROM
SWITCH AND BPF
RX_RFP
5
VCC_REF
6
TUNE
90
0
0
GND_VCO
GND_CP
CP_OUT
VCC_CP
CSB
RBIAS
7
8
MAX2820/MAX2820A/
MAX2821/MAX2821A
INTEGER-N
SYNTHESIZER
TX_RFP
TX_RFN
90
TX RF OUTPUT TO
SWITCH AND BPF
9
LOOP FILTER
PA_BIAS
10
11
12
TO PA BIAS INPUT
∑
VOS COMP
VCC_DRVR
SERIAL
INTERFACE
SCLK
TX_GC
SERIAL INTERFACE
TO BASEBAND IC
DAC OUTPUT
FROM BASEBAND IC
13
14
15
16
17
18
19
20
21
22
23
24
REFERENCE
OSCILLATOR INPUT
TX ANALOG INPUT SIGNAL
FROM BASEBAND IC
22 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
32,44,48L QFN, 7x7x0.90 MM
1
21-0092
H
2
______________________________________________________________________________________ 23
2.4GHz 802.11b Zero-IF Transceivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
32,44,48L QFN, 7x7x0.90 MM
2
21-0092
H
2
24 ______________________________________________________________________________________
2.4GHz 802.11b Zero-IF Transceivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
D2
D
C
L
b
D2/2
D/2
k
E/2
E2/2
C
(NE-1) X
e
E
E2
L
k
L
DETAIL A
e
(ND-1) X
e
DETAIL B
e
C
C
L
L
L
L1
L
L
e
e
DALLAS
SEMICONDUCTOR
A
A1
A2
PROPRIETARYINFORMATION
TITLE:
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0144
D
2
______________________________________________________________________________________ 25
2.4GHz 802.11b Zero-IF Transceivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
DALLAS
SEMICONDUCTOR
PROPRIETARYINFORMATION
TITLE:
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
APPROVAL
DOCUMENT CONTROL NO.
REV.
2
21-0144
D
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
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