MAX2740 [MAXIM]
Integrated GPS Receiver and Synthesizer; 集成的GPS接收器和合成器
| 型号： | MAX2740 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Integrated GPS Receiver and Synthesizer |
| 文件： | 总8页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1670; Rev 0; 4/00
Integrated GPS Receiver and Synthesizer
General Description
Features
The MAX2740 is a complete global positioning system
(GPS) receiver from antenna output to digitizer input.
The signal path includes the LNA, two downconverters,
and variable-gain and fixed-gain amplifiers. By utilizing
a double-conversion superheterodyne architecture with
external surface acoustic wave (SAW) filters, high levels
of image rejection and blocking immunity are possible.
Receiver linearity has been maximized to improve oper-
ation in hostile RFI environments found in cellular base
stations. The MAX2740 also includes a high-perfor-
mance voltage-controlled oscillator (VCO) with low
phase noise for subcentimeter carrier phase applica-
tions, and a fixed-frequency synthesizer for generation
of all required on-chip local oscillators.
ꢀ High Selectivity for Hostile Base Station
Environments
ꢀ Complete Antenna-to-Baseband Receiver
Solution
ꢀ >100dB Total Receiver Gain Including All Filter
Losses
ꢀ >50dB Automatic Gain Control (AGC) Range
ꢀ Fully Balanced Topology for Minimum Spurious
Responses
ꢀ Low Phase Noise VCO for Carrier Phase
Applications
The unique frequency plan captured in the MAX2740 is
suitable for joint GPS/GLONASS receivers with minimal
external components. This allows the MAX2740 to pro-
vide a cost-effective and high-performance solution for
navigation and timing products that need maximum
satellite availability.
ꢀ Compatible with High-Performance Companion
DSP
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
The MAX2740 is compatible with a high-performance
DSP engine capable of very fast time to first fix and
excellent multipath rejection.
MAX2740ECM
-40°C to +85°C
48 TQFP-EP*
*Exposed paddle
Pin Configuration/
Functional Diagram
________________________Applications
Base Station Timing
E911 Location Assistance
GPS Automotive and Consumer Receivers
Wireless Local-Loop Timing
Joint GPS/GLONASS Receivers
GND
GND
1
2
3
4
5
6
7
8
9
36 IFMIX_OUT+
35 IFMIX_OUT-
34 VGA_IN+
33 VGA_IN-
32 GND
High-Precision Timing for SDH Networks
High-Positional-Accuracy Surveying Equipment
LNA_IN
GND
GND
GND
31 VGA_OUT+
30 VGA_OUT-
29 GND
MAX2740
RFMIX_IN-
GC
/2
/8
/6
/6
VCC_ANA
28 FGA_IN+
27 FGA_IN-
26 GND
GND 10
GND 11
PFD
VCC_VCO 12
25 FGA_OUT+
48
TQFP
ACTUAL SIZE
9mm x 9mm
TQFP-EP
________________________________________________________________ Maxim Integrated Products
1
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
Integrated GPS Receiver and Synthesizer
ABSOLUTE MAXIMUM RATINGS
CC
RF LNA Input Power.......................................................+10dBm
LO Input Power...............................................................+10dBm
GC Input Voltage..........................................-0.3 to (V + 0.3V)
V
Pins to GND ...................................................-0.3V to +4.3V
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
Continuous Power Dissipation (T = +85°C)
A
48-Pin TQFP-EP Package ...........................................800mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
= +2.7V to +3.3V, T = -40°C to +85°C. Typical values are at V
= +3.0, T = +25°C.)
CC A
CC
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Total Supply Current
AGC Voltage Range
AGC Current
55.1
84.3
mA
0.5 to
2.5
V
-50
+25
µA
AC ELECTRICAL CHARACTERISTICS
(MAX2740 EV kit, V
= +3.0V, 50Ω system impedance, F = 1575.42MHz, F
= 135.42MHz, F
= 15.42MHz, F = 20MHz at
REF
CC
RF
IF1
IF2
600mVpp, T = +25°C, unless otherwise noted.)
A
PARAMETER
LNA
CONDITIONS
MIN
TYP
MAX
UNITS
LNA Gain
(Note 1)
13.1
-1.3
16.0
0.5
17.2
+1.0
dB
dB
LNA Gain Variation Over
Temperature
Relative to ambient (Note 1)
(Note 2)
LNA Input Third-Order Intercept
Point
-9.4
2.6
dBm
dB
LNA Noise Figure
RF MIXER (Z = 100Ω differential)
l
RF Mixer Conversion Gain
(Note 3)
22.6
dB
RF Mixer Input IP3
-22.4
11.0
dBm
dB
RF Mixer Noise Figure (SSB)
IF MIXER (Z = 100Ω differential, Z = 4kΩ differential)
s
l
IF Mixer Conversion Gain
36.3
dB
VARIABLE-GAIN AMPLIFIER (VGA) (Z = 4kΩ differential)
l
VGA Voltage Gain at Maximum
GC = 2.5V
15.1
dB
dB
Gain Setting
VGA Voltage Gain at Minimum
GC = 0.5V
-54.7
Gain Setting
FIXED GAIN AMPLIFIER (FGA)
FGA Voltage Gain
Z = 4kΩ differential
l
39.8
2.05
dB
Vp-p
FGA 1dB Compression (Output)
2
_______________________________________________________________________________________
Integrated GPS Receiver and Synthesizer
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2740 EV kit, V
= +3.0V, 50Ω system impedance, F = 1575.42MHz, F
= 135.42MHz, F
= 15.42MHz, F = 20MHz at
REF
CC
RF
IF1
IF2
600mVpp, T = +25°C, unless otherwise noted.)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOLTAGE-CONTROLLED OSCILLATOR (VCO) (100kHz offset)
Synthesizer VCO Phase Noise
-91.5
90
dBc/Hz
MHz
Output Frequency for External
GLONASS Tuner
Magnitude GLS_OUT
R = 500Ω, C = 10pF
300
250
mVp-p
mV
l
l
PFD Swing on Up and Down
Outputs
Mag (UP-DOWN)
Note 1: Guaranteed by design and characterization.
Note 2: Two tones at pin = -35dBm per tone, f1 = 1575MHz, f2 = 1576MHz.
Note 3: Two tones at pin = -40dBm per tone, f1 = 1575MHz, f2 = 1576MHz.
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
LNA GAIN vs. TEMPERATURE AND V
CC
RF MIXER GAIN
20
18
16
14
12
10
8
I
vs. TEMPERATURE AND V
vs. TEMPERATURE AND V
CC
CC
CC
V
= 3.3V
CC
70
60
50
40
30
25
20
V
= 3.3V
CC
V
= 3.3V
CC
V
= 2.7V
CC
V
= 3.0V
CC
V
CC
= 3.0V
V = 2.7V
CC
V
= 3.0V
CC
15
V
= 2.7V
CC
6
10
5
4
20
10
2
0
-40 -30 -20
-10
0 10 20 30 40 50 60 70 80
0
0
TEMPERATURE (°C)
-40 -30 -20
-10
0
10 20 30 40 50 60 70 80
-40 -30 -20
-10
0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
TEMPERATURE (°C)
IF MIXER GAIN vs.
TEMPERATURE AND V
VGA GAIN vs. VGC AND
TEMPERATURE AT V = 3.0V
FGA GAIN vs. TEMPERATURE AND V
CC
CC
CC
30
20
10
0
40
35
30
25
20
15
10
5
45
40
35
30
25
20
15
10
5
V
V
V
= 2.7V
= 3.3V
= 3.0V
CC
CC
CC
V
V
V
= 2.7V
= 3.3V
= 3.0V
CC
CC
CC
-10
-20
-30
-40
-50
-60
T
T
T
= +25°C
= +85°C
= -40°C
A
A
A
0
0
-40 -30 -20
-10
0
10 20 30 40 50 60 70 80
1.0 1.2
1.4
1.6
1.8
2.0 2.2 2.4
-40 -30 -20
-10
0
10 20 30 40 50 60 70 80
TEMPERATURE (°C)
AGC CONTROL VOLTAGE (V)
TEMPERATURE (°C)
_______________________________________________________________________________________
3
Integrated GPS Receiver and Synthesizer
Pin Description
PIN
NAME
FUNCTION
1, 2, 4, 5, 6,
10, 11, 14, 15,
21, 22, 23, 26,
29, 32, 37, 41,
42, 47,
GND
Ground. Connect pin to ground.
paddle
3
7
LNA_IN
Input of LNA Circuit. Matching network and blocking capacitor required.
Input to unused side of a differential pair that forms the RF section of a Gilbert cell mixer. This pin
should be AC-grounded through 100pF.
RFMIX_IN-
DC Control Voltage for Setting Gain Level of VGA. High input impedance. Voltage range of 0.5V
to 2.5V.
8
9
GC
VCC_ANA
Supply Voltage Pin for Analog Circuits. This pin requires external decoupling of typically 0.01µF.
12
13
VCC_VCO
TANK
Supply Voltage Pin for VCO Circuit. This pin requires external decoupling of typically 1000pF.
VCO Resonator Pin. A resonator is required at this pin.
Supply Voltage Pin for Digital Section of the IC. This pin requires external decoupling of typically
0.01µF.
16
17
18
VCC_DIG
DOWN
UP
Down Output from the Phase-Frequency Detector. This pulses high whenever the phase of the
VCO leads the phase of the reference.
Up Output from the Phase-Frequency Detector. This pulses high whenever the phase of the VCO
lags the phase of the reference.
19
20
24
25
27
28
30
31
33
34
35
36
38
39
GLS_OUT
REF_IN
Output of Buffer that Provides a 90MHz Clock Signal. Requires external blocking capacitor.
Reference Input for Synthesizer
FGA_OUT-
FGA_OUT+
FGA_IN-
FGA Inverted Output. Blocking capacitor required.
FGA Noninverted Output. Blocking capacitor required.
FGA Inverted Input. Blocking capacitor required.
FGA_IN+
FGA Noninverted Input. Blocking capacitor required.
VGA Inverted Output. Blocking capacitor required.
VGA Noninverted Output. Blocking capacitor required.
VGA Inverted Input. Blocking capacitor required.
VGA_OUT-
VGA_OUT+
VGA_IN-
VGA_IN+
VGA Noninverted Input. Blocking capacitor required.
IF Mixer Inverted Output. Blocking capacitor required.
IF Mixer Noninverted Output. Blocking capacitor required.
IF Mixer Inverted Input. Blocking capacitor required.
IF Mixer Noninverted Input. Blocking capacitor required.
IFMIX_OUT-
IFMIX_OUT+
IFMIX_IN-
IFMIX_IN+
Supply Voltage Pin for IF Downconverter. This pin requires external decoupling of typically
1000pF.
40
VCC_IFMIX
4
_______________________________________________________________________________________
Integrated GPS Receiver and Synthesizer
Pin Description (continued)
PIN
NAME
FUNCTION
43
RFMIX_OUT-
RF Mixer Inverted Input (same as RFMIX_OUT+)
Open Emitter Output of the RF Downconverter. This pin requires an external pull-down resistor of
1.2kΩ to establish the correct on-chip bias conditions. Requires a blocking capacitor.
44
45
46
48
RFMIX_OUT+
VCC_RFMIX
RFMIX_IN
Supply Voltage Pin for RF Downconverter. This pin requires external decoupling of typically
100pF.
Input to RF Mixer. Requires a blocking capacitor that may be used as part of the match network.
LNA Output. Requires a pull-up inductor and a blocking capacitor. These may be configured as
the matching network.
LNA_OUT
MAX2740
V
CC
1
2
36
35
34
33
32
31
30
29
28
27
26
25
3
4
5
6
7
AGC
GAIN SET
8
/2
/6
/6
9
MAX4122
10
11
12
/8
PFD
TO DSP
20MHz
MAX4122
Figure 1. Typical Application Circuit
_______________________________________________________________________________________
5
Integrated GPS Receiver and Synthesizer
Variable-Gain Amplifier
Applications Information
This circuit compensates for receiver gain variation and
unknown antenna cable losses. Under these condi-
tions, the receiver will exhibit minimum implementation
loss. The circuit has a useful gain control range of
greater than 50dB, with a maximum gain level of 16dB.
Figure 1 shows a typical application diagram in which
the MAX2740 should be used. The RF front end con-
sists of the antenna interface, MAX2740, two control
loops (one for the AGC, the other for the synthesizer),
and appropriate external components, including filters
for image rejection and channel selectivity, operational
amplifiers for the control loops, and resonator and tun-
ing network for the VCO.
Fixed-Gain Amplifier
This circuit has been designed to deliver 40dB of differ-
ential gain at the 2nd IF frequency of 15.42MHz. The
differential inputs are received from the VGA outputs
through a balanced lowpass filter circuit. The circuit’s
differential output is designed to drive a digitizer with a
typical load impedance of 4kΩ differential.
Only the antenna input, an external 20MHz frequency
reference, and an AGC input from the accompanying
DSP are required. A differential output is provided from
the MAX2740, which can be applied either to the exter-
nal analog-to-digital conversion circuitry or directly to
the companion DSP.
Voltage-Controlled Oscillator
The core of the L-band VCO is based on a common-
collector Colpitts topology. This circuit has been opti-
mized for low thermal noise and high signal swing with-
out asymmetrical clipping. The circuit is designed for
use with a lumped inductor for low-cost applications.
The self-resonance should be above 1440MHz so that
parallel varactor tuning and the VCO internal capaci-
tance produces resonance at 1440MHz.
Low-Noise Amplifier
This subcircuit requires input and output matching. The
input match is typically a series capacitor, and the out-
put is typically a shunt inductor to V
capacitor.
and a series
CC
RF Mixer
The RF input is matched externally. The match consists
of a series inductor and shunt capacitor. The source
impedance for this circuit is the single-ended, 50Ω RF
SAW used as an image reject filter. A second RF input
is brought out to a separate pin for AC grounding. This
ensures low ground impedance over a wide band and
minimizes amplification of any noise at the IF frequency
generated within the mixer structure.
Synthesizer
The digital prescaler accepts the output from the oscil-
lator’s differential digital buffer and divides the frequen-
cy from 1.44GHz to 120MHz for the 2nd LO, 20MHz for
the phase-frequency detector, and 90MHz for the
GLONASS reference output. Divider blocks are
arranged to ensure that the 2nd LO drive has minimum
duty cycle distortion. A simple output buffer is used to
deliver the GLONASS reference signal to a typical
external load impedance of 500Ω.
The phase-frequency detector is a classical dual flip-
flop with ANDed feedback to a reset function. UP and
DOWN outputs are provided through emitter follower
buffers. These outputs deliver pulse-width-modulated
signals that in phase-acquisition mode give a phase
detector range of 2π. With the PLL not in lock, either
the UP or DOWN output will be active and drive the
VCO frequency toward the reference frequency. The
phase detector outputs feed directly into an active,
lead-lag differential loop filter.
The IF output is delivered through low-output-imped-
ance emitter followers and is suitable for directly driving
a 135MHz IF SAW with a typical impedance of 400Ω.
The deliberate mismatch keeps the group delay distor-
tion of the SAW within an acceptable level.
IF Mixer
The IF downconverter receives the differential 1st IF of
135.42MHz from the SAW and delivers a differential
2nd IF signal at 15.42MHz. The circuit has been opti-
mized to deliver a high level of conversion gain with
adequate IIP3 and noise figure. The circuit is terminat-
ed on the input with a differential 100Ω to establish the
correct embedding impedance for the IF SAW. The
emitter follower outputs drive directly into a high-imped-
ance, differential, three-pole lowpass discrete lumped
element filter.
6
_______________________________________________________________________________________
Integrated GPS Receiver and Synthesizer
Package Information
_______________________________________________________________________________________
7
Integrated GPS Receiver and Synthesizer
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2000 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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