MAX1971 [MAXIM]
Dual, 180∑ Out-of-Phase, 1.4MHz, 750mA Step- Down Regulator with POR and RSI/PFO; 双路， 180 °异相， 1.4MHz的， 750毫安降压稳压器，带有POR和RSI / PFO
| 型号： | MAX1971 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Dual, 180∑ Out-of-Phase, 1.4MHz, 750mA Step- Down Regulator with POR and RSI/PFO |
| 文件： | 总20页 (文件大小：370K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2297; Rev 0; 1/02
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
General Description
Features
The MAX1970/MAX1971/MAX1972 dual-output current-
mode PWM buck regulators operate from 2.6V to 5.5V
input and deliver a minimum of 750mA on each output.
The MAX1970 and MAX1972 operate at a fixed 1.4MHz
(MAX1971 operates at 700kHz) to reduce output induc-
tor and capacitor size and cost. Switching the regula-
tors 180° out-of-phase also reduces the input capacitor
size and cost. Ceramic capacitors can be used for
input and output.
o Current-Mode, 1.4MHz Fixed-Frequency PWM
Operation
o 180° Out-of-Phase Operation Reduces Input
Capacitor
o
1ꢀ Output ꢁccuracy Oꢂer ꢃoad, ꢃine, and
Temperature Ranges
o 750mꢁ Guaranteed Output Current
o 2.6V to 5.5V Input
The output voltages are programmable from 1.2V to V
IN
o Power-On Reset Delay of 16.6ms (MꢁX1970) or
175ms (MꢁX1971 and MꢁX1972)
o Power-Fail Output (MꢁX1970 and MꢁX1972 Only)
using external feedback resistors, or can be preset to
1.8V or 3.3V for output 1 and 1.5V or 2.5V for output 2.
When one output is higher than 1.2V, the second can
be configured down to sub-1V levels. Output accuracy
is better than 1ꢀ over variations in load, line, and tem-
perature. Internal soft-start reduces inrush current dur-
ing startup.
o Power-On Reset Input (MꢁX1971 Only)
o Operation Outside xDSꢃ Band
o Ultra-Compact Design with Smallest External
All devices feature power-on reset (POR). The
MAX1971 includes a reset input (RSI), which forces
POR low for 175ms after RSI goes low. The MAX1970
and MAX1972 include an open-drain power-fail output
(PFO) that monitors input voltage and goes high when
the input falls below 3.94V. For USB-powered xDSL
modems, this output can be used to detect USB power
failure. A minimum switching frequency of 1.2MHz
ensures operation outside the xDSL band.
Components
o Outputs ꢁdjustable from 0.8V to V or 1.8V/3.3V
and 1.5V/2.5V Preset
o ꢁll-Ceramic Capacitor ꢁpplication
o Soft-Start Reduces Inrush Current
IN
Ordering Information
Applications
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 QSOP
xDSL Modems
xDSL Routers
USB-Powered Devices
MAX1970EEE
MAX1971EEE
MAX1972EEE
Dual LDO Replacement
16 QSOP
Copper Gigabit SFP
and GBIC Modules
16 QSOP
Pin Configuration
Typical Operating Circuit
V
2.6V TO 5.5V
IN
TOP VIEW
POR
LX1
1
2
3
4
5
6
7
8
16 PGND
15 LX2
14 IN
V
IN
CC
RSI
EN
RSI
EN
POR
LX1
OUT1
1.8V
750mA
V
CC
MAX1971
COMP1
FB1
COMP1
FB1
MAX1970
MAX1971
MAX1972
13 FBSEL1
12 FBSEL2
OUT2
2.5V
750mA
COMP2
FBSEL1
LX2
FB2
FB2
PF0 (MAX1970/MAX1972)
RSI (MAX1971)
COMP2
REF
11
V
CC
10 EN
FBSEL2
REF
GND
9
POR
PGND
QSOP
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
ABSOLUTE MAXIMUM RATINGS
IN, EN, FBSEL1, FBSEL2, PFO, POR,
Continuous Power Dissipation (T = +70°C)
A
16-pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
RSI, V to GND ...................................................-0.3V to +6V
CC
COMP1, COMP2, FB1, FB2,
REF to GND.............................................-0.3V to (V
+ 0.3V)
CC
LX1, LX2 to PGND .......................................-0.3V to (V + 0.3V)
IN
PGND to GND .......................................................-0.3V to +0.3V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = V
= V
= 5V, R
= 100kΩ to IN, R
= 100kΩ to IN, V
= 0, C
= 0.1µF, FBSEL1 = unconnected, FBSEL2 =
REF
IN
CC
EN
POR
PFO
RSI
unconnected, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IN AND V
CC
IN Voltage Range
2.6
5.5
10
V
MAX1971
5
10
Switching with no load
IN Supply Current
mA
V
= 3.3V
IN
MAX1970/MAX1972
20
MAX1970/MAX1972
MAX1971
1
100
60
IN Shutdown Current
V
= 5.5V, V = 0
µA
V
IN
EN
1
V
V
rising
falling
2.40
2.35
2.55
CC
CC
V
Undervoltage
CC
Lockout Threshold
2.20
1.188
20
REF
REF Voltage
I
= 0, V = 2.6V to 5.5V
1.200
10
1.212
25
V
Ω
REF
IN
REF Shutdown Resistance
REF Soft-Start Current
FB1 AND FB2
REF to GND, V = 0
EN
V
= 1V
25
30
µA
REF
FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2,
= 1.20V to 1.80V, V = 2.6V to 5.5V
FB_ Regulation Voltage
OUT_ Voltage Range
1.188
1.200
1.212
V
V
V
V
COMP_
IN
FBSEL_ = unconnected
1.2
1.782
3.2670
1.485
2.475
750
V
IN
V
V
= 2.6V to 5.5V
= 4.5V to 5.5V
V
V
V
V
= 1.2V, FBSEL1= GND
1.800
3.3
1.818
3.330
1.150
2.525
IN
IN
COMP1
COMP1
COMP2
COMP2
OUT1 Regulation Voltage
= 1.2V, FBSEL1 = V
CC
= 1.2V, FBSEL2 = GND
1.5
OUT2 Regulation Voltage
Maximum Output Current
FB1 Input Resistance
V
= 2.6V to 5.5V
V
IN
= 1.2V, FBSEL2 = V
2.5
CC
Guaranteed by design (Note 1)
mA
kΩ
FBSEL1 = GND
30
60
60
120
120
90
Measured from FB1 to
GND
FBSEL1 = V
30
CC
FBSEL2 = GND
22.5
22.5
45
Measured from FB2 to
GND
FB2 Input Resistance
FB_ Input Bias Current
kΩ
FBSEL2 = V
45
90
CC
FB1 or FB2, FBSEL_ = unconnected, V
= V
= 1.15V
0.01
0.1
µA
FB1
FB2
2
_______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, R
= 100kΩ to IN, R
= 100kΩ to IN, V
= 0, C
= 0.1µF, FBSEL1 = unconnected, FBSEL2 =
REF
IN
CC
EN
POR
PFO
RSI
unconnected, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
COMP1 AND COMP2
COMP1
Transconductance
FB1 = COMP1,
V = 1.2V
COMP1
FBSEL1 = unconnected
FBSEL2 = unconnected
35
35
55
55
85
85
µS
µS
COMP2
Transconductance
FB2 = COMP2,
V = 1.2V
COMP2
LX1 AND LX2
V
V
V
V
V
V
= 5.0V
= 3.3V
=2.6V
= 5.0V
= 3.3V
= 2.6V
0.20
0.24
0.28
0.12
0.14
0.16
0.32
0.37
IN
IN
IN
IN
IN
IN
Internal High-Side
MOSFET On-Resistance
I
I
= -180mA
Ω
Ω
LX
LX
0.23
0.25
Internal Low-Side
MOSFET On-Resistance
= 180mA
LX_ Current-Sense
Transresistance
0.4
0.5
0.6
V/A
A
High side
Low side
0.80
-1.6
1.2
1.60
-0.40
20
LX_ Current-Limit
Threshold
Duty Cycle = 100%,
V
= 2.6V to 5.5V
IN
-0.85
V
V
= V
= V
= 5.5V
= 0
LX1
LX1
LX2
LX2
LX_ Leakage Current
V
= 5.5V
µA
IN
-20
1.2
MAX1970/MAX1972
MAX1971
1.4
0.70
100
15
1.6
LX_ Switching Frequency
LX_ Maximum Duty Cycle
LX_ Minimum Duty Cycle
POR
V
V
= 2.6V to 5.5V
= 2.6V to 5.5V
MHz
%
IN
IN
0.60
0.80
MAX1970/MAX1972
MAX1971
20
15
%
10
V
V
rising
falling
92
90
94
OUT
OUT
Percentage of V
,
OUT
POR Thresholds
%
V
= 2.6V to 5.5V
IN
87
13.3
140
-1
MAX1970
MAX1971/MAX1972
16.6
175
20
210
1
POR Delay Time (T )
ms
µA
V
D
POR Output Current, High
POR Output Voltage, Low
POR Startup Voltage
V
= V = 5.5V, V
= V = 1.15V
FB2
POR
IN
FB1
V
= 1.05V or V
= 1.05V or RSI = IN (MAX1971 only),
FB2
FB1
0.01
0.01
0.05
0.05
I
= 1mA
POR
FB1 = FB2 = GND, I
= 100µA, V = 1.2V
V
POR
IN
_______________________________________________________________________________________
3
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, R
= 100kΩ to IN, R
= 100kΩ to IN, V
= 0, C
= 0.1µF, FBSEL1 = unconnected, FBSEL2 =
REF
IN
CC
EN
POR
PFO
RSI
unconnected, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
A
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PFO (MAX1970 and MAX1972 Only)
V
V
rising
falling
4.04
3.94
4.12
CC
CC
PFO Trip Threshold
IN = V
V
CC
3.86
-1
PFO Output Current, High
PFO Output Voltage, Low
EN AND RSI (MAX1971 Only)
PFO = IN
= 1mA, V = 4.3V
1
µA
V
I
0.01
0.05
PFO
IN
V
V
0.4
0.95
1.0
10
IL
Logic Input Thresholds
RSI Input Resistance
EN Logic Input Current
IN = 2.6V to 5.5V
V
1.6
20
1
IH
Internal pullup resistor to IN
5
kΩ
µA
V
-1
-1
IL
Logic input at 0 or
5.5V, V = 5.5V
IN
V
1
IH
ELECTRICAL CHARACTERISTICS
(V = V
= V
= 5V, V
= V
= 1.15V, R
= 100kΩ to IN, R
= 100kΩ to IN, RSI = 0, C
= 0.1µF, C = 0.1µF,
REF
IN
CC
EN
FB1
FB2
POR
PFO
VCC
FBSEL1 = unconnected, FBSEL2 = unconnected, T = -40°C to +85°C.) (Note 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IN AND V
CC
IN Voltage Range
2.6
5.5
10
V
MAX1971
Switching with no load
IN Supply Current
mA
V
= 3.3V
IN
MAX1970/MAX1972
20
MAX1970/MAX1972
MAX1971
20
IN Shutdown Current
V
= 5.5V, V = 0
µA
V
IN
EN
100
2.55
V
V
rising
falling
CC
CC
V
Undervoltage
CC
Lockout Threshold
2.20
1.185
20
REF
REF Voltage
I
= 0, V = 2.6V to 5.5V
1.212
25
V
Ω
REF
IN
REF Shutdown Resistance
REF Soft-Start Current
FB1 AND FB2
REF to GND, V =0
EN
V
= 1V
30
µA
REF
FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2,
= 1.20V to 1.80V, V = 2.6V to 5.5V
FB_ Regulation Voltage
OUT_ Voltage Range
1.185
1.212
V
V
V
V
COMP_
IN
FBSEL_ = unconnected
1.2
V
IN
V
V
= 2.6V to 5.5V
= 4.5V to 5.5V
V
V
V
V
= 1.2V, FBSEL1= GND
1.778
3.259
1.481
2.469
750
1.818
3.333
1.515
2.525
IN
IN
COMP1
COMP1
COMP2
COMP2
OUT1 Regulation Voltage
= 1.2V, FBSEL1 = V
CC
= 1.2V, FBSEL2 = GND
= 1.2V, FBSEL2 = V
OUT2 Regulation Voltage
Maximum Output Current
V
= 2.6V to 5.5V
V
IN
CC
Guaranteed by design (Note 1)
mA
4
_______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, V
= V
= 1.15V, R
= 100kΩ to IN, R
= 100kΩ to IN, RSI = 0, C
= 0.1µF, C = 0.1µF,
REF
IN
CC
EN
FB1
FB2
POR
PFO
VCC
FBSEL1 = unconnected, FBSEL2 = unconnected, T = -40°C to +85°C.) (Note 2)
A
PARAMETER
CONDITIONS
FBSEL1 = GND
FBSEL1 = V
MIN
30
TYP
MAX
120
120
90
UNITS
Measured from FB1 to
GND
FB1 Input Resistance
kΩ
30
CC
FBSEL2 = GND
22.5
22.5
Measured from FB2 to
GND
FB2 Input Resistance
kΩ
FBSEL2 = V
90
CC
FB_ Input Bias Current
FB1 or FB2, FBSEL_ = unconnected, V
= V
= 1.15V
0.1
µA
FB1
FB2
COMP1 AND COMP2
COMP1
Transconductance
FB1 = COMP1,
FBSEL1 = unconnected
FBSEL2 = unconnected
35
35
85
85
µS
µS
V
= 1.2V
COMP1
COMP2
Transconductance
FB2 = COMP2,
V = 1.2V
COMP2
LX1 AND LX2
V
V
V
V
= 5.0V
= 3.3V
= 5.0V
= 3.3V
0.32
0.37
0.23
0.25
IN
IN
IN
IN
Internal High-Side
MOSFET On-Resistance
I
I
= -180mA
Ω
Ω
LX
LX
Internal Low-Side
MOSFET On-Resistance
= 180mA
LX_ Current-Sense
Transresistance
0.4
0.6
V/A
A
High side
Low side
0.76
-1.6
1.60
-0.40
20
LX_ Current-Limit
Threshold
Duty cycle = 100%,
V
= 2.6V to 5.5V
IN
V
V
= V
= V
= 5.5V
= 0
LX1
LX1
LX2
LX2
LX_ Leakage Current
V
= 5.5V
µA
MHz
%
IN
-20
1.2
MAX1970/MAX1972
MAX1971
1.6
0.80
20
LX_ Switching Frequency
V
V
= 2.6V to 5.5V
= 2.6V to 5.5V
IN
IN
0.60
MAX1970/MAX1972
MAX1971
LX_ Minimum Duty Cycle
POR
15
V
V
rising
falling
94
OUT
OUT
Percentage of V
,
OUT
POR Thresholds
%
V
= 2.6V to 5.5V
IN
87
13.3
140
-1
MAX1970
MAX1971/MAX1972
20
210
1
POR Delay Time (T )
ms
µA
V
D
POR Output Current, High
POR Output Voltage, Low
POR Start-Up Voltage
V
= V = 5.5V, V
= V = 1.15V
FB2
POR
IN
FB1
V
= 1.05V or V
= 1.05V or RSI = IN (MAX1971 only),
FB2
FB1
0.05
0.05
I
= 1mA
POR
FB1 = FB2 = GND, I
= 100µA, V = 1.2V
V
POR
IN
_______________________________________________________________________________________
5
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, V
= V
= 1.15V, R
= 100kΩ to IN, R
= 100kΩ to IN, RSI = 0, C
= 0.1µF, C = 0.1µF,
REF
IN
CC
EN
FB1
FB2
POR
PFO
VCC
FBSEL1 = unconnected, FBSEL2 = unconnected, T = -40°C to +85°C.) (Note 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PFO (MAX1970 and MAX1972 Only)
V
V
rising
falling
4.12
CC
CC
PFO Trip Threshold
IN = V
V
CC
3.86
-1
PFO Output Current, High
PFO Output Voltage, Low
EN AND RSI (MAX1971 Only)
PFO = IN
= 1mA, V = 4.3V
1
µA
V
I
0.05
PFO
IN
V
V
0.4
IL
Logic Input Thresholds
RSI Input Resistance
EN Logic Input Current
IN = 2.6V to 5.5V
V
1.6
20
1
IH
Internal pullup resistor to IN
5
kΩ
µA
V
-1
-1
IL
Logic Input at 0 or
5.5V, V = 5.5V
IN
V
1
IH
Note 1: Refer to the Output Voltage Selection section.
Note 2: Specifications to -40°C are guaranteed by design and not production tested.
6
_______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
100
100
100
V
= 2.5V
OUT2
V
= 2.5V
V
= 3.3V
OUT2
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
OUT1
V
= 3.3V
OUT1
V
= 1.8V
OUT1
V
= 1.5V
OUT2
V
= 1.8V
OUT1
V
= 1.5V
OUT2
V
= 1.8V
OUT1
V
= 2.5V
OUT2
V
= 1.5V
MAX1970/
MAX1972
IN
MAX1970/
MAX1972
V = 3.3V
IN
OUT2
MAX1971
V
IN
= 5.0V
V
= 5.0V
0.01
0.1
LOAD CURRENT (A)
1
0.01
0.1
LOAD CURRENT (A)
1
0.01
0.1
LOAD CURRENT (A)
1
REFERENCE VOLTAGE vs.
REFERENCE LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
INPUT CURRENT vs. OUTPUT CURRENT
1.22
100
500
V
= 2.5V
V = 5.0V
IN
OUT2
90
80
70
60
50
40
30
20
10
0
450
400
350
300
250
200
150
100
50
V
= 3.3V
OUT1
1.21
1.20
1.19
1.18
V = 1.5V
OUT2
V
= 1.8V
V
= 2.5V
OUT1
OUT2
V
= 1.8V
OUT1
V
= 1.5V
MAX1971
= 3.3V
OUT2
V
IN
MAX1970/MAX1972
1.17
0
0
5
10
15
20
0.01
0.1
LOAD CURRENT (A)
1
0
100 200 300 400 500 600 700 800
OUTPUT CURRENT (mA)
REFERENCE LOAD CURRENT (µA)
OSCILLATOR FREQUENCY
vs. INPUT VOLTAGE
CHANGE IN OUTPUT VOLTAGE
vs. LOAD CURRENT
1.60
3
MAX1970/MAX1972
T
T
= +85°C
= -40°C
A
1.40
1.20
1.00
0.80
0.60
2
1
A
T
= +25°C
A
V
= 1.8V
V
= 3.3V
OUT1
OUT1
0
MAX1971
T
= +85°C
= -40°C
-1
-2
-3
A
V
= 2.5V
OUT2
T
A
V
= 1.5V
OUT2
V
= 5.0V
IN
T
= +25°C
A
MAX1970/MAX1972
0.40
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0
200
400
600
800
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
_______________________________________________________________________________________
7
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
LOAD TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
V
OUT2
V
OUT1
I
I
OUT2
OUT1
MAX1970/MAX1972
40µs/div
MAX1970/MAX1972
40µs/div
V
V
I
= 5V
V
V
I
= 5V
IN
OUT1
IN
OUT2
= 3.3V, 100mV/div
= 300mA TO 600mA
= 1.5V, 100mV/div
= 300mA TO 600mA
OUT1
OUT2
R
= 82kΩ, C = 680pF
R
= 39kΩ, C = 680pF
C1
C1
C2
C2
MAXIMUM OUTPUT TRANSIENT DURATION
vs. POR COMPARATOR OVERDRIVE
SWITCHING WAVEFORMS
MAX1970TOC11
14
12
10
8
200mA/div
5V/div
I
L1
V
V
LX1
6
200mA/div
5V/div
I
L2
4
LX2
2
MAX1970/MAX1972
200ns/div
0
0.01
0.1
1
10
MAXIMUM OUTPUT TRANSIENT DURATION (µs)
V
V
= 5V
IN
= 1.8V, V
= 2.5V
OUT2
OUT2
OUT1
OUT1
I
= 500mA, I
= 500mA
8
_______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
PFO AND RISING INPUT VOLTAGE
RSI AND POR TIMING
MAX1970TOC13
4V
V
IN
V
RSI
0
2V/div
2V/div
4V
V
PF0
POR
0
4ms/div
40ms/div
= 2.5V
V
= 1.8V, V
= 2.5V
OUT2
OUT1
V
V
= 5V
IN
= 1.8V, V
OUT1
OUT1
OUT2
I
= 500mA, I
= 500mA
OUT2
PFO AND FALLING INPUT VOLTAGE
ENABLE RESPONSE
POR
V
IN
4V
EN
0
5V/div
2V/div
4V
V
OUT1
PF0
V
OUT2
0
4ms/div
5ms/div
= 2.5V
V
= 1.8V, V
= 2.5V
OUT2
MAX1970
OUT1
V
IN
V
= 5V
= 3.3V, V
= 375mA, I
OUT1
OUT1
OUT2
I
= 375mA
OUT2
_______________________________________________________________________________________
9
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
SHUTDOWN RESPONSE
POR
EN
5V/div
V
OUT1
V
OUT2
5ms/div
MAX1970
V
IN
V
= 5V
= 3.3V, V
= 375mA, I
= 2.5V
OUT2
OUT1
OUT1
I
= 375mA
OUT2
Pin Description
NAME
PIN
FUNCTION
MAX1970/MAX1972
MAX1971
LX1
1
2
LX1
Inductor Connection 1. Connect an inductor between LX1 and OUT1.
Analog Supply Voltage. Bypass with 0.1µF to ground.
V
V
CC
CC
OUT1 Regulator Compensation. Connect series RC network from COMP1 to GND.
COMP1 is pulled to GND when the outputs are shut down. See the Compensation
Design section for component values.
3
COMP1
FB1
COMP1
FB1
OUT1 Feedback. Connected to OUT1 for internal mode (FBSEL1 = GND or V ).
CC
Use an external resistor-divider from OUT1 to GND to set the output voltage from
4
1.2V to V for external mode (FBSEL1 = unconnected). See the Output Voltage
IN
Selection section for <1.2V output.
OUT2 Feedback. Connected to OUT2 for internal mode (FBSEL2 = GND or V ).
CC
Use an external resistor-divider from OUT2 to GND to set the output voltage from
5
6
FB2
FB2
1.2V to V for external mode (FBSEL2 = unconnected). See the Output Voltage
IN
Selection section for <1.2V output.
OUT2 Regulator Compensation. Connect series RC network from COMP2 to GND.
COMP2 is pulled to GND when the outputs are shut down. See the Compensation
Design section for component values.
COMP2
COMP2
Reference. Bypass with 0.01µF to 1.0µF capacitor. REF controls the soft-start
ramp and is pulled to GND when the outputs are shut down.
7
8
REF
REF
GND
GND
Ground
10 ______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Pin Description (continued)
NAME
PIN
FUNCTION
MAX1970/MAX1972
MAX1971
Active-Low Power-On Reset Output. Open-drain output goes high 16.6ms
(MAX1970) or 175ms (MAX1971 or MAX1972) after both outputs reach 92% of
nominal value, and RSI (MAX1971 only) is low.
9
POR
POR
Enable Input. Drive high to turn on both OUT1 and OUT2. Drive low to place the
device in shutdown.
10
EN
PFO
EN
—
Power-Fail Output. Open-drain output goes high when V
Useful for detecting a valid USB input voltage.
drops below 3.94V.
CC
11
Noninverting Reset Input. Causes POR to go low when RSI is high. Allows POR to
go high 175ms after RSI falls, if outputs are in regulation.
—
RSI
Regulator 2 Feedback Select. Connect to V
to set V
to 2.5V. Connect to
OUT2
CC
12
13
14
FBSEL2
FBSEL1
IN
FBSEL2
FBSEL1
IN
GND to set V
to 1.5V. Leave unconnected to use external feedback resistors.
OUT2
Regulator 1 Feedback Select. Connect to V
to set V
to 3.3V. Connect to
OUT1
CC
GND to set V
to 1.8V. Leave unconnected to use external feedback resistors.
OUT1
Power-Supply Voltage. Input range from 2.6V to 5.5V. Bypass with 10µF capacitor
to PGND.
15
16
LX2
LX2
Inductor Connection 2. Connect an inductor between LX2 and OUT2.
Power Ground
PGND
PGND
DC-DC Controller
Detailed Description
The MAX1970/MAX1971/MAX1972 family of step-down
converters uses a pulse-width-modulating (PWM) current-
mode control scheme. The heart of the current-mode
PWM controller is an open-loop comparator that com-
pares the integrated voltage-feedback signal against
the sum of the amplified current-sense signal and the
slope compensation ramp. At each rising edge of the
internal clock, the internal high-side MOSFET turns on
until the PWM comparator trips. During this on time,
current ramps up through the inductor, sourcing cur-
rent to the output and storing energy in a magnetic
field. The current-mode feedback system regulates the
peak inductor current as a function of the output volt-
age error signal. Since the average inductor current is
nearly the same as the peak inductor current (assum-
ing that the inductor value is relatively high to minimize
ripple current), the circuit acts as a switch-mode
transconductance amplifier. It pushes the output LC filter
pole, normally found in a voltage-mode PWM, to a higher
frequency. To preserve inner loop stability and eliminate
inductor stair casing, a slope-compensation ramp is
summed into the main PWM comparator. During the
second half of the cycle, the internal high-side MOSFET
The MAX1970/MAX1971/MAX1972 are dual-output,
fixed-frequency, current-mode, PWM, step-down
DC/DC converters. The MAX1970 and MAX1972 switch
at 1.4 MHz while the MAX1971 switches at 700kHz. The
two converters on each IC switch 180° out of phase
with each other to reduce input ripple current. The
high-switching frequency allows use of smaller capaci-
tors for filtering and decoupling. Internal synchronous
rectifiers improve efficiency and eliminate the typical
Schottky freewheeling diode. The on-resistances of the
internal MOSFETs are used to sense the switch cur-
rents for controlling and protecting the MOSFETs, elimi-
nating current-sensing resistors to further improve
efficiency and cost.
The input voltage range is 2.6V to 5.5V. Each converter
has a three-mode feedback input. Internally, OUT1 is
set to either 3.3V or 1.8V, and OUT2 to 2.5V or 1.5V by
connecting FBSEL1 and FBSEL2 to V
or GND,
CC
respectively. When FBSEL1 or FBSEL2 are floating,
each output can be set to any voltage between 1.2V
and V through an external resistive divider. Having an
IN
output below 1.2V is also possible (see the Output
Voltage Selection section).
______________________________________________________________________________________ 11
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
V
CC
REGULATOR 1
IN
FB1
FB
SELECT
FBSEL1
ERROR SIGNAL
SLOPE COMP
PWM CONTROL
LX1
CURRENT SENSE
COMP1
REF
CLAMP
PGND
÷2(MAX1970/
MAX1972)/
÷4(MAX1971)
REFERENCE
VOLTAGE
1.2V
2.8MHz
OSCILLATOR
SOFT-START
MAX1971 ONLY
RSI
POR
POR
PFO
THERMAL SHUTDOWN
VOK
MAX1970/MAX1972 ONLY
PFO
EN
COMP2
REGULATOR 2
FB2
MAX1970
MAX1971
MAX1972
FBSEL2
GND
Figure 1. Functional Diagram
turns off and the internal low-side N-channel MOSFET
turns on. Now the inductor releases the stored energy
as its current ramps down while still providing current to
the output. The output capacitor stores charge when
the inductor current exceeds the load current and dis-
charges when the inductor current is lower, smoothing
the voltage across the load. Under overload conditions,
when the inductor current exceeds the current limit (see
the Current Limit section), the high-side MOSFET is not
turned on at the rising edge of the clock and the low-
side MOSFET remains on to let the inductor current
ramp down.
Current Sense
The current-sense circuit amplifies the current-sense
voltage generated by the high-side MOSFET’s on-resis-
tance and the inductor current (R
✕ I
).
DS(ON)
INDUCTOR
This amplified current-sense signal and the internal
slope compensation signal are summed together into
12 ______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
the PWM comparator’s inverting input. The PWM com-
parator turns off the internal high-side MOSFET when
this sum exceeds the integrated feedback voltage.
Power-Fail Output
The input voltage is sensed for 5V (typical USB applica-
tions), and if V
drops below 3.94V, the power-fail out-
CC
put (PFO) goes high. The time from PFO going high to
the outputs going out of regulation depends on the oper-
ating output voltage and currents, and the upstream 5V
bus storage capacitor value, which is 120µF minimum
(per USB specification, version 2.0). The lower the oper-
ating voltages and currents, and the higher the storage
capacitor, the longer the elapsed time. PFO is an open-
Current Limit
The internal MOSFET has a current limit of 1.2A (typ). If
the current flowing out of LX_ exceeds this maximum,
the high-side MOSFET turns off and the synchronous
rectifier MOSFET turns on. This lowers the duty cycle
and causes the output voltage to droop until the current
limit is no longer exceeded. There is also a synchro-
nous rectifier current limit of -0.85A. This is to protect
the device from current flowing into LX_. If the negative
current limit is exceeded, the synchronous rectifier is
turned off, and the inductor current continues to flow
through the high-side MOSFET body diode back to the
input until the beginning of the next cycle or until the
inductor current drops to zero.
drain output, and a 10k to 100k pullup resistor to V , or
CC
either output, is recommended.
Power-On Reset
Power-on reset (POR) provides a system reset signal.
During power-up, POR is held low until both outputs
reach 92% of their regulated voltages, POR continues
to be held low for a delayed period, and then goes
high. This delay time (T ) for MAX1970 is 16.6ms. The
D
MAX1971 and MAX1972 have a delay of 175ms. Figure
2 is an example of a timing diagram.
V
Decoupling
CC
Due to the high-switching frequency and tight output
tolerance ( 1%), decoupling between IN and V is
CC
The POR comparator is designed to be relatively
immune to short-duration negative-going output glitch-
es.The Typical Operating Characteristics gives a plot of
maximum transient duration vs. POR comparator over-
drive. The graph was generated using a negative-going
pulse applied to an output, starting at 100mV above the
actual POR threshold, dropping below the POR thresh-
old by the percentage indicated as comparator over-
drive, and then returning to 100mV above the
threshold. The graph indicates the maximum pulse
width the output transient can have without causing
POR to trip low.
recommended. Connect a 10Ω resistor between IN and
V
CC
and a 0.1µF ceramic capacitor from V to GND.
CC
Place the resistor and capacitor as close to V
possible.
as
CC
Startup
To reduce the supply inrush current, soft-start circuitry
ramps up the output voltage during startup. This is
done by charging the REF capacitor with a current
source of 25µA. Once REF reaches 1.2V, the output is
in full regulation. The soft-start time is determined from:
V
4
REF
Reset Input
Reset input (RSI) is an input on the MAX1971 that,
when driven high, forces the POR to go low. When RSI
goes low, POR goes through a delay time identical to a
power-up event. See Figure 2 for timing diagram. RSI
allows software to command a system reset. RSI must
be high for a minimum period of 1µs in order to initiate
the POR.
t
=
C
= 4.8 × 10 × C
SS
REF REF
I
REF
Soft-start occurs when power is first applied, and when
EN is pulled high with power already present. The part
also goes through soft-start when coming out of under-
voltage lockout (UVLO) or thermal shutdown. The range
of capacitor values for C
is from 0.01µF to 1.0µF.
REF
Undervoltage Lockout
drops below 2.35V, the MAX1970/MAX1971/
MAX1972 assume that the supply voltage is too low to
provide a valid output voltage, and the UVLO circuit
Thermal-Overload Protection
If V
CC
Thermal-overload protection limits total power dissipa-
tion. When the IC’s junction temperature exceeds T =
J
+170°C, a thermal sensor shuts down the device,
allowing the IC to cool. The thermal sensor turns the
part on again after the junction temperature cools by
20°C. This results in a pulsed output during continuous
overload conditions.
inhibits switching. Once V
rises above 2.4V, the
CC
UVLO is disabled and the soft-start sequence initiates.
Enable
A logic-enable input (EN) is provided. For normal oper-
ation, drive EN logic high. Driving EN low turns off both
outputs, and reduces the input supply current to
approximately 1µA.
During a thermal event, POR goes low, PFO goes high,
and soft-start is reset.
______________________________________________________________________________________ 13
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
V
OUT
T
D
~1V PKMAX
POR
T
D
T
= 1µs MIN
RESET
RSI
4.04V
3.94V
V
IN
PFO
Figure 2. Timing Diagram
Each output is capable of continuously sourcing up to
750mA of current as long as the following condition is
met:
Design Procedure
Output Voltage Selection
Both output voltages can be selected in three different
ways as indicated by Table 1. Each output has two pre-
set voltages that can be set using FBSEL_ and it can
V
× I
+ V
× I
OUT1
OUT1
OUT2 OUT2
≤ 1.05A
V
IN
also be set to any voltage from 0.8V to V by using an
IN
external resistor voltage-divider.
Inductor Value
To use a resistor-divider to set the output voltage to
1.2V or higher (Figure 5), connect a resistor from FB_ to
A 3.3µH to 6.8µH inductor with a saturation current of
800mA (min) is recommended for most applications.
For best efficiency, the inductor’s DC resistance should
be less than 100mΩ, and saturation current should be
greater than 1A. See Table 2 for recommended induc-
tors and manufacturers.
OUT_ (R_ ), and connect a resistor from FB_ to GND
a
(R_ ). Select the value of R_ , between 10kΩ and
b
b
30kΩ. Then R_ is calculated by:
a
V
1.2
OUT
R
=R
×
_b
−1
_a
A resistor-divider can also be used to set the voltage of
one output from 0.8V to 1.2V. To do this, the other out-
put must be above 1.2V. Figure 6 shows an example of
this where OUT1 is set to 1V. To set the output voltage to
less than 1.2V, connect a resistor from FB1 to OUT1 (R1),
and from FB1 to OUT2 (R2). Select values of R1 and R2
such that current flowing through R1 and R2 is about
100µA and following equation is satisfied:
1.2− V
OUT2
−1.2
R1 = R2
V
OUT1
14 ______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
V
IN
10Ω
3.3V TO 5.5V
V
CC
10µF
0.1µF
100kΩ
100kΩ
2
14
PFO
EN
POR
V
9
11
10
IN
CC
PFO
EN
POR
V
OUT1
3.3V
4.7µH
1
4
LX1
FB1
680pF
680pF
82kΩ
39kΩ
MAX1972
3
COMP1
10µF
6
COMP2
FBSEL2
V
OUT2
1.5V
4.7µH
15
5
12
LX2
FB2
V
CC
13
7
FBSEL1
10µF
REF
GND
PGND
16
0.1µF
8
Figure 3. Typical Application Circuit 1
V
IN
10Ω
3.3V TO 5.5V
V
CC
10µF
0.1µF
100kΩ
100kΩ
2
14
POR
V
9
11
10
IN
CC
PFO
EN
PFO
POR
V
OUT1
3.3V
4.7µH
EN
1
4
MAX1970
MAX1972
LX1
FB1
680pF
680pF
82kΩ
62kΩ
3
COMP1
10µF
6
COMP2
FBSEL1
V
OUT2
2.5V
4.7µH
15
5
13
LX2
FB2
V
CC
12
7
FBSEL2
REF
10µF
GND
8
PGND
16
0.1µF
Figure 4. Typical Application Circuit 2
______________________________________________________________________________________ 15
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
V
IN
10Ω
2.6V TO 5.5V
10µF
0.1µF
100kΩ
14
IN
2
POR
V
11
10
9
1
CC
RSI
RSI
EN
POR
LX1
4.7µH
V
OUT1
EN
680pF
R
MAX1971
C1
R
3
1a
10µF
COMP1
4
FB1
680pF
R
C2
6
COMP2
FBSEL1
R
1b
13
4.7µH
V
OUT2
15
5
LX2
FB2
12
7
R
2a
FBSEL2
REF
10µF
PGND
16
GND
0.1µF
8
R
2b
Figure 5. Setting the Output Voltage with External Resistors
V
IN
10Ω
3V TO 3.6V
V
CC
0.1µF
100kΩ
100kΩ
14
2
POR
V
11
10
IN
9
1
CC
RSI
PFO
EN
POR
LX1
4.7µH
V
OUT1
1.0V
EN
680pF
27kΩ
MAX1970
R1
2kΩ
3
10µF
COMP1
4
680pF
68kΩ
FB1
6
COMP2
FBSEL1
R2
13kΩ
13
4.7µH
V
OUT2
2.5V
15
V
CC
LX2
FB2
12
7
10µF
5
FBSEL2
REF
GND
PGND
16
0.1µF
8
Figure 6. Setting an Output Below 1.2V
16 ______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Output Capacitor
Table 1. Output Voltage Settings
The key selection parameters for the output capacitor
FBSEL1
OUTPUT 1
3.3V
FBSEL2
OUTPUT 2
2.5V
are its capacitance, ESR, ESL, and the voltage rating
requirements. These affect the overall stability, output
ripple voltage, and transient response of the DC-DC
converter.
V
V
CC
CC
GND
1.8V
GND
1.5V
Open
Ext Divider
Open
Ext Divider
The output ripple is due to variations in the charge
stored in the output capacitor, the voltage drop due to
the capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL.
For most designs, a reasonable inductor value (L
derived from the following equation:
) is
INIT
V
V − V
V
= V
+ V
+ V
(
)
OUT IN OUT
RIPPLE
RIPPLE(C)
RIPPLE(ESR) RIPPLE(ESL)
L
=
INIT
V
× LIR × I
× f
IN
OUT(MAX) OSC
The output voltage ripple due to the output capaci-
tance, ESR, and ESL is:
Keep the inductor current ripple percentage LIR
between 20% and 40% of the maximum load current for
best compromise of cost, size, and performance. The
maximum inductor current is:
I
P−P
V
=
RIPPLE(C)
8 × C
× f
SW
OUT
LIR
2
V
=I
× ESR
RIPPLE(ESR) P−P
I
= 1+
I
OUT(MAX)
L(MAX)
V
= (I
/ T ) ✕ ESL or (I
ON
/ T
) ✕
OFF
RIPPLE (ESL)
ESL, whichever is greater.
P-P
P-P
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor must meet the ripple current
I
is the peak-to-peak inductor current:
P-P
V
− V
V
OUT
IN
OUT
I
=
×
P−P
requirement (I
) imposed by the switching currents
RMS
f
× L
V
SW
IN
defined by the following equation:
These equations are suitable for initial capacitor selec-
tion, but final values should be set by testing a proto-
type or evaluation circuit. As a rule, a smaller ripple
current results in less output voltage ripple. Since the
inductor ripple current is a factor of the inductor value,
the output voltage ripple decreases with larger induc-
tance. Ceramic capacitors are recommended due to
their low ESR and ESL at the switching frequency of the
converter. For ceramic capacitors, the ripple voltage
due to ESL is negligible.
2
I
× V
V
− V
OUT1
+
)
(
)
1
OUT1
OUT1 IN
I
=
RMS
2
V
I
× V
V
− V
(
IN
OUT2
OUT2 IN
OUT2
A ceramic capacitor is recommended due to its low
equivalent series resistance (ESR), equivalent series
inductance (ESL), and lower cost. Choose a capacitor
that exhibits less than a 10°C temperature rise at the
maximum operating RMS current for optimum long-term
reliability.
Load transient response depends on the selected out-
put capacitor. During a load transient, the output
instantly changes by ESR ✕ ∆I
. Before the con-
LOAD
Table 2. Suggested Inductors
INDUCTANCE
ESR
(mΩ)
SATURATION
CURRENT (A)
MANUFACTURER
PART
DIMENSIONS (mm)
(µH)
✕
✕
Coilcraft
Sumida
Sumida
DO1606
CR43-4R7
4.7
4.7
4.7
120
108.7
80
1.2
1.15
0.9
5.3 5.3
2
✕
✕
4.5
4
3.5
✕
✕
CDRH3D16-4R7
3.8 3.8 0.8
______________________________________________________________________________________ 17
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
troller can respond, the output deviates further,
depending on the inductor and output capacitor
values. After a short time (see the Typical Operating
Characteristics), the controller responds by regulating
the output voltage back to its nominal state. The con-
troller response time depends on the closed-loop
bandwidth. With a higher bandwidth, the response time
is faster, thus preventing the output from deviating fur-
ther from its regulating value.
The zero frequency for the output capacitor ESR is:
1
fz
=
ESR
2π × C
× ESR
OUT
where, R
= V
/I
, and GMC = 2µS. The
LOAD
OUT OUT(MAX)
feedback divider has a gain of G = V /V
, where
FB
FB OUT
V
is equal to 1.2V. The transconductance error ampli-
FB
fier has a DC gain, G
, of 60dB. A dominant pole
EA(DC)
Compensation Design
An internal transconductance error amplifier is used to
compensate the control loop. Connect a series resistor
and capacitor between COMP and GND to form a pole-
zero pair. The external inductor, internal high-side
MOSFET, output capacitor, compensation resistor, and
compensation capacitor determine the loop stability.
The inductor and output capacitor are chosen based
on performance, size, and cost. Additionally, the com-
pensation resistor and capacitor are selected to opti-
mize control-loop stability. The component values
shown in the typical application circuits (Figures 3, 4,
and 5) yield stable operation over a broad range of
input-to-output voltages.
is set by the compensation capacitor, C , the output
resistance of the error amplifier (R
C
), 20MΩ, and the
OEA
compensation resistor, R . A zero is set by R and C .
C
C
C
The pole frequency set by the transconductance ampli-
fier output resistance, and compensation resistor and
capacitor is:
1
fp
=
EA
2π × C × R
C
OEA
The zero frequency set by the compensation capacitor
and resistor is:
1
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The voltage
across the internal high-side MOSFET’s on-resistance
fz
=
EA
2π × C × R
C
C
For best stability and response performance, the
closed-loop unity-gain frequency must be much higher
than the modulator pole frequency. In addition, the
closed-loop unity-gain frequency should be approxi-
mately 50kHz. The loop gain equation at unity gain fre-
quency then is:
(R
) is used to sense the inductor current. Current
DS(ON)
mode control eliminates the double pole caused by the
inductor and output capacitor, which has large phase
shift that requires more elaborate error-amplifier com-
pensation. A simple Type 1 compensation with single
compensation resistor (R ) and compensation capaci-
C
tor (C ) is all that is needed to have a stable and high-
C
V
V
bandwidth loop.
FB
G
× G
×
=1
EA(fc)
MOD(fc)
The basic regulator loop consists of a power modulator,
an output feedback divider, and an error amplifier. The
O
power modulator has DC gain set by gmc x R
,
LOAD
, the output
Where G
LOAD
= gm
MOD fc
✕ R , and G
= gmc ✕
MOD(fc)
EA(fc)
✕ fp
calculated as:
EA
C
with a pole and zero pair set by R
LOAD
R
/ , where gm = 50µS, R can be
EA C
capacitor (C
), and its ESR. Below are equations
OUT
that define the power modulator:
V
O
R
=
C
G
= gmc × R
MOD
LOAD
gm × V × G
EA
FB
MOD(fc)
The pole frequency for the modulator is:
1
The error-amplifier compensation zero formed by R
C
and C is set at the modulator pole frequency at maxi-
C
fp
=
MOD
mum load. C is calculated as follows:
C
2π × C
× R
(
+ESR
)
OUT
LOAD
C
OUT
C
= V
×
C
OUT
R
× I
OUT(MAX)
C
18 ______________________________________________________________________________________
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
Applications Information
PC Board Layout
Careful PC board layout is critical to achieve clean and
stable operation. The switching power stage requires
particular attention. Follow these guidelines for good
PC board layout:
accordingly, and the closed-loop unity-gain frequency
remains the same. Below is a numerical example to cal-
culate R and C values of the typical application cir-
C
C
cuit of Figure 4, where:
V
OUT
= 2.5V
1) Place decoupling capacitors as close to IC pins as
possible. Keep power ground plane (connected to
PGND) and signal ground plane (connected to
GND) separate. Connect the two ground planes
together with a single connection from PGND to
GND.
I
= 0.6A
OUT(MAX)
C
= 10µF
OUT
R
= 0.010Ω
ESR
gm = 50µS
EA
gm = 2S
C
2) Input and output capacitors are connected to the
power ground plane; all other capacitors are con-
nected to signal ground plane.
f
= 1.4 MHz
SWITCH
R
= V
/ I
= 2.5V / 0.6 A = 4.167Ω
LOAD
OUT OUT(MAX)
3) Keep the high-current paths as short and wide as
possible.
fp
= 1 / [2π C
(R
+ R
)] = 1 / [2π ✕
MOD
OUT
LOAD
ESR
10 ✕ 10-6 (4.167 + 0.01)] = 3.80 kHz.
fz = 1 / [2π C
] = 1 / [2π ✕ 10 ✕ 10-6
4) If possible, connect IN, LX1, LX2, and PGND sepa-
rately to a large land area to help cool the IC to fur-
ther improve efficiency and long-term reliability.
R
OUT ESR
✕
ESR
0.01] = 1.59 MHz.
Pick a closed-loop unity-gain frequency (fc) of 50kHz.
The power modulator gain at fc is:
5) Ensure all feedback connections are short and
direct. Place the feedback resistors as close to the
IC as possible.
G
MOD
(fc) = gmc ✕ R
✕ fp
/ f = 2 ✕ 4.167
MOD c
LOAD
✕ 3.80k / 50k = 0.635
6) Route high-speed switching nodes away from sen-
sitive analog areas (FB1, FB2, COMP1, COMP2).
then:
R
C
= V / (gm
V
G
(fc)) = 2.5 / (50 ✕ 10-6
✕
O
EA FB MOD
1.2 ✕ 0.635) ≈ 62kΩ
Chip Information
TRANSISTOR COUNT: 5428
C
C
= V
✕ ( C
/ R ) ✕ I (MAX) = 2.5 ✕ 4.7
OUT
OUT
OUT
C
✕10-6 / 62k ✕ 0.6 ≈ 680pF
PROCESS: BiCMOS
______________________________________________________________________________________ 19
Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-
Down Regulator with POR and RSI/PFO
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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