首页 |元器件品牌

MAX1714BEEE+T [MAXIM]

暂无描述;
MAX1714BEEE+T
型号： MAX1714BEEE+T
厂家： MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述：

暂无描述

电脑 控制器
文件： 总24页 (文件大小：442K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
19-1536; Rev 1; 12/99  
High-Speed Step-Down Controller  
for Notebook Computers  
General Description  
Features  
The MAX1714 pulse-width modulation (PWM) controller  
provides the high efficiency, excellent transient  
response, and high DC output accuracy needed for  
stepping down high-voltage batteries to generate low-  
voltage CPU core or chip-set/RAM supplies in notebook  
computers.  
ꢀ Ultra-High Efficiency  
ꢀ No Current-Sense Resistor (Lossless I  
)
LIMIT  
ꢀ Quick-PWM with 100ns Load-Step Response  
ꢀ 1% V Accuracy Over Line and Load  
OUT  
ꢀ 2.5V/3.3V Fixed or 1V to 5.5V Adjustable Output  
Maxim’s proprietary Quick-PWM™ quick-response,  
constant-on-time PWM control scheme handles wide  
input/output voltage ratios with ease and provides  
100ns “instant-on” response to load transients while  
maintaining a relatively constant switching frequency.  
Range  
ꢀ 2V to 28V Battery Input Range  
ꢀ 200/300/450/600kHz Switching Frequency  
ꢀ Overvoltage Protection (MAX1714A)  
ꢀ Undervoltage Protection  
The MAX1714 achieves high efficiency at a reduced  
cost by eliminating the current-sense resistor found in  
traditional current-mode PWMs. Efficiency is further  
enhanced by an ability to drive very large synchronous-  
rectifier MOSFETs.  
ꢀ 1.7ms Digital Soft-Start  
ꢀ Drives Large Synchronous-Rectifier FETs  
ꢀ 2V 1% Reference Output  
Single-stage buck conversion allows these devices to  
directly step down high-voltage batteries for the highest  
possible efficiency. Alternatively, two-stage conversion  
(stepping down the +5V system supply instead of the  
battery) at a higher switching frequency allows the mini-  
mum possible physical size.  
ꢀ Power-Good Indicator  
Ordering Information  
The MAX1714 is intended for CPU core, chipset,  
DRAM, or other low-voltage supplies as low as 1V. The  
MAX1714A is available in a 20-pin QSOP package and  
includes overvoltage protection. The MAX1714B is  
available in a 16-pin QSOP package with no overvolt-  
age protection. For applications requiring VID compli-  
ance or DAC control of output voltage, refer to the  
MAX1710/MAX1711 data sheet. For a dual output ver-  
sion, refer to the MAX1715† data sheet.  
PART  
TEMP. RANGE  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
20 QSOP  
MAX1714AEEP  
MAX1714BEEE  
16 QSOP  
Minimal Operating Circuit  
BATTERY  
4.5V TO 28V  
+5V INPUT  
Applications  
V
V
CC  
DD  
V+  
Notebook Computers  
SHDN  
CPU Core Supply  
BST  
DH  
ILIM  
Chipset/RAM Supply as Low as 1V  
1.8V and 2.5V I/O Supply  
OUTPUT  
1.25V TO 2V  
MAX1714  
LX  
DL  
REF  
PGOOD PGND  
(GND)  
FB  
OUT  
SKIP  
AGND  
(GND)  
Quick-PWM is a trademark of Maxim Integrated Products.  
† Future product—contact factory for availability.  
( ) ARE FOR THE MAX1714B ONLY.  
Pin Configurations appear at end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.  
For small orders, phone 1-800-835-8769.  
High-Speed Step-Down Controller  
for Notebook Computers  
ABSOLUTE MAXIMUM RATINGS  
V+ to AGND (Note 1)..............................................-0.3V to +30V  
LX to BST..................................................................-6V to +0.3V  
REF Short Circuit to AGND.........................................Continuous  
V , V  
DD CC  
to AGND (Note 1).....................................-0.3V to +6V  
PGND to AGND (Note 1) ................................................... 0.3V  
SHDN, PGOOD, OUT to AGND (Note 1)..................-0.3V to +6V  
ILIM, FB, REF, SKIP,  
Continuous Power Dissipation (T = +70°C)  
A
16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW  
20-Pin QSOP (derate 9.1mW/°C above +70°C)..........727mW  
Operating Temperature Range ..........................-40°C to +85°C  
Junction Temperature......................................................+150°C  
Storage Temperature Range ............................-65°C to +150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
TON to AGND (Notes 1, 2)....................-0.3V to (V  
DL to PGND (Note 1)..................................-0.3V to (V  
+ 0.3V)  
+ 0.3V)  
CC  
DD  
BST to AGND (Note 1) ...........................................-0.3V to +36V  
DH to LX.....................................................-0.3V to (BST + 0.3V)  
Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND.  
Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault  
detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, V  
noted.) (Note 1)  
= V = +5V, SKIP = AGND, T = 0°C to +85°C, unless otherwise  
DD A  
CC  
PARAMETER  
CONDITIONS  
MIN  
2
TYP  
MAX  
28  
UNITS  
Battery voltage, V+  
Input Voltage Range  
V
V
V
4.5  
5.5  
CC, DD  
FB = OUT  
FB = AGND  
FB = V  
0.99  
2.475  
3.267  
1.0  
2.5  
3.3  
9
1.01  
2.525  
3.333  
Error Comparator Threshold  
(DC Output Voltage Accuracy)  
(Note 3)  
V+ = 4.5V to 28V,  
SKIP = V  
V
CC  
CC  
Load Regulation Error  
Line Regulation Error  
FB Input Bias Current  
OUT Input Resistance  
Soft-Start Ramp Time  
mV  
mV  
µA  
kΩ  
ms  
I
= 0 to 3A, SKIP = V  
CC  
LOAD  
V
CC  
= 4.5V to 5.5V, V+ = 4.5V to 28V  
5
-0.1  
100  
0.1  
FB = AGND  
190  
1.7  
160  
200  
290  
425  
400  
550  
<1  
300  
Rising edge of SHDN to full I  
LIM  
TON = AGND (600kHz)  
TON = REF (450kHz)  
140  
175  
260  
380  
180  
225  
320  
470  
500  
750  
5
V+ = 24V,  
= 2V  
On-Time  
V
OUT  
ns  
TON = unconnected (300kHz)  
TON = V (200kHz)  
(Note 4)  
CC  
Minimum Off-Time  
(Note 4)  
ns  
µA  
µA  
µA  
µA  
µA  
µA  
V
Quiescent Supply Current (V  
Quiescent Supply Current (V  
)
)
FB forced above the regulation point  
FB forced above the regulation point  
CC  
DD  
Quiescent Supply Current (V+)  
25  
40  
Shutdown Supply Current (V  
Shutdown Supply Current (V  
)
= 0  
<1  
5
CC  
DD  
V
V
V
V
SHDN  
SHDN  
SHDN  
)
= 0  
<1  
5
Shutdown Supply Current (V+)  
Reference Voltage  
= 0 , V+ = 28V, V  
= V  
= 0 or 5V  
<1  
5
CC  
DD  
= 4.5V to 5.5V, no external REF load  
= 0 to 50µA  
1.98  
10  
2
2.02  
0.01  
CC  
Reference Load Regulation  
REF Sink Current  
I
V
REF  
REF in regulation  
µA  
V
REF Fault Lockout Voltage  
Falling edge, hysteresis = 40mV  
1.6  
2
_______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, V  
noted.) (Note 1)  
= V = +5V, SKIP = AGND, T = 0°C to +85°C, unless otherwise  
DD A  
CC  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Overvoltage Trip Threshold  
With respect to error comparator threshold (MAX1714A only)  
10.5  
12.5  
14.5  
%
Overvoltage Fault Propagation  
Delay  
FB forced 2% above trip threshold (MAX1714A only)  
With respect to error comparator threshold  
From SHDN signal going high  
1.5  
70  
µs  
%
Output Undervoltage Protection  
Threshold  
65  
10  
90  
75  
30  
Output Undervoltage Protection  
Blanking Time  
ms  
mV  
Current-Limit Threshold  
(Positive Direction, Fixed)  
PGND - LX, I  
PGND - LX  
= V  
100  
110  
LIM  
CC  
V
= 0.5V  
40  
50  
60  
ILIM  
Current-Limit Threshold  
(Positive Direction, Adjustable)  
mV  
%
V
= 2.0V  
170  
200  
230  
ILIM  
Current-Limit Threshold  
(Negative Direction)  
PGND - LX, SKIP = V , T = +25°C,  
CC  
A
-90  
-120  
-140  
with respect to positive current-limit threshold  
Current-Limit Threshold  
(Zero Crossing)  
3
mV  
PGND - LX, SKIP = AGND  
PGOOD Propagation Delay  
PGOOD Output Low Voltage  
PGOOD Leakage Current  
Thermal Shutdown Threshold  
FB forced 2% below PGOOD trip threshold, falling edge  
1.5  
µs  
V
I
= 1mA  
0.4  
1
SINK  
High state, forced to 5.5V  
Hysteresis = 10°C  
µA  
°C  
150  
V
Undervoltage Lockout  
Rising edge, hysteresis = 20mV,  
PWM disabled below this level  
CC  
4.1  
4.4  
5
V
Ω
Ω
Threshold  
DH Gate-Driver On-Resistance  
BST - LX forced to 5V  
DL, high state  
1.5  
1.5  
DL Gate-Driver On-Resistance  
(Pull-Up)  
5
DL Gate-Driver On-Resistance  
(Pull-Down)  
DL, low state  
0.5  
1
1.7  
Ω
DH Gate-Driver Source/Sink  
Current  
DH forced to 2.5V, BST - LX forced to 5V  
A
DL Gate-Driver Source Current  
DL Gate-Driver Sink Current  
DL forced to 2.5V  
DL forced to 2.5V  
DL rising  
1
3
A
A
35  
26  
Dead Time  
ns  
mA  
%
DH rising  
To disable overvoltage and undervoltage fault detection,  
SKIP Input Current Logic  
Threshold  
-1.5  
-0.1  
-4  
T
A
= +25°C  
Measured at FB with respect to error comparator  
threshold, falling edge  
PGOOD Trip Threshold  
-8  
-6  
Logic Input High Voltage  
Logic Input Low Voltage  
Logic Input Current  
2.4  
V
V
SHDN, SKIP  
SHDN, SKIP  
SHDN, SKIP  
SHDN, SKIP  
0.8  
1
-1  
µA  
nA  
ILIM Input Current  
10  
_______________________________________________________________________________________  
3
High-Speed Step-Down Controller  
for Notebook Computers  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, V  
noted.) (Note 1)  
= V = +5V, SKIP = AGND, T = 0°C to +85°C, unless otherwise  
DD A  
CC  
PARAMETER  
Level  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
TON V  
V
- 0.4  
V
V
CC  
CC  
TON Float Voltage  
TON Reference Level  
TON AGND Level  
TON Input Current  
3.15  
3.85  
2.35  
0.5  
3
1.65  
V
V
Forced to AGND or V  
-3  
µA  
CC  
ELECTRICAL CHARACTERISTICS  
(Circuit of Figure 1, 4A components from Table 1, V+ = 15V, V  
wise noted.) (Notes 1, 5)  
= V = +5V, SKIP = AGND, T = -40°C to +85°C, unless other-  
DD A  
CC  
PARAMETER  
CONDITIONS  
MIN  
2
TYP  
MAX  
28  
UNITS  
Battery voltage, V+  
Input Voltage Range  
V
V
V
4.5  
5.5  
CC, DD  
FB = OUT  
FB = AGND  
FB = V  
0.985  
2.462  
3.25  
140  
175  
260  
380  
1.015  
2.538  
3.35  
180  
225  
320  
470  
500  
750  
2.02  
Error Comparator Threshold  
(DC Output Voltage Accuracy)  
(Note 3)  
V+ = 4.5V to 28V,  
SKIP = V  
V
CC  
DD  
TON = AGND (600kHz)  
TON = REF (450kHz)  
V+ = 24V,  
= 2V  
On-Time  
V
OUT  
ns  
TON = unconnected (300kHz)  
(Note 4)  
TON = V  
(200kHz)  
CC  
Minimum Off-Time  
(Note 4)  
ns  
µA  
V
Quiescent Supply Current (V  
)
FB forced above the regulation point  
= 4.5V to 5.5V, no external REF load  
CC  
Reference Voltage  
V
CC  
1.98  
10  
With respect to error comparator threshold  
(MAX1714A only)  
Overvoltage Trip Threshold  
15  
75  
%
%
Output Undervoltage  
Protection Threshold  
With respect to error comparator threshold  
65  
85  
Current-Limit Threshold (Positive  
Direction, Fixed)  
PGND - LX, ILIM = V  
PGND - LX  
115  
mV  
mV  
V
CC  
V
ILIM  
= 0.5V  
= 2.0V  
35  
65  
Current-Limit Threshold  
(Positive Direction, Adjustable)  
V
ILIM  
160  
240  
V
CC  
Undervoltage Lockout  
Rising edge, hysteresis = 20mV, PWM disabled below  
this level  
4.1  
2.4  
4.4  
Threshold  
Logic Input High Voltage  
Logic Input Low Voltage  
Logic Input Current  
V
V
SHDN, SKIP  
SHDN, SKIP  
SHDN, SKIP  
0.8  
1
-1  
µA  
4
_______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, V  
wise noted.) (Notes 1, 5)  
= V  
= +5V, SKIP = AGND, T = -40°C to +85°C, unless other-  
DD A  
CC  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Measured at FB with respect to error comparator  
threshold, falling edge  
PGOOD Trip Threshold  
-8  
-4  
%
PGOOD Output Low Voltage  
PGOOD Leakage Current  
I
= 1mA  
0.4  
1
V
SINK  
High state, forced to 5.5V  
µA  
Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND.  
Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault  
detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum.  
Note 3: When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the error-  
comparator threshold by 50% of the ripple. In discontinuous conduction (SKIP = AGND, light-loaded), the output voltage  
will have a DC regulation level higher than the trip level by approximately 1.5% due to slope compensation.  
Note 4: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, V  
= 5V,  
BST  
and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds.  
Note 5: Specifications to -40°C are guaranteed by design, not production tested.  
__________________________________________Typical Operating Characteristics  
(Circuit of Figure 1, components from Table 1, V = +15V, SKIP = AGND, TON = unconnected, T = +25°C, unless otherwise noted.)  
A
IN  
EFFICIENCY vs. LOAD CURRENT  
(1.5A COMPONENTS, V = 2.5V,  
EFFICIENCY vs. LOAD CURRENT  
(4A COMPONENTS, V = 2.5V, 300kHz)  
EFFICIENCY vs. LOAD CURRENT  
(8A COMPONENTS, V = 1.6V, 300kHz)  
OUT  
TON = GND, 600kHz)  
OUT  
OUT  
100  
90  
100  
100  
90  
V
= 5V  
V
IN  
= 7V  
IN  
V
= 7V  
IN  
90  
80  
70  
60  
V
IN  
= 12V  
V
= 20V  
80  
IN  
80  
V
= 20V  
IN  
V
= 12V  
IN  
70  
60  
70  
60  
0.01  
0.1  
1
10  
0.01  
0.1  
1
10  
0.01  
0.1  
1
10  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
LOAD CURRENT (A)  
_______________________________________________________________________________________  
5
High-Speed Step-Down Controller  
for Notebook Computers  
_____________________________Typical Operating Characteristics (continued)  
(Circuit of Figure 1, components from Table 1, V = +15V, SKIP = AGND, TON = unconnected, T = +25°C, unless otherwise noted.)  
A
IN  
FREQUENCY vs. TEMPERATURE  
FREQUENCY vs. LOAD CURRENT  
(4A COMPONENTS, V = 2.5V)  
FREQUENCY vs. INPUT VOLTAGE  
(4A COMPONENTS, V  
= 2.5V)  
(4A COMPONENTS, V  
= 2.5V, I  
= 1A)  
OUT  
OUT  
OUT  
OUT  
350  
300  
320  
310  
300  
290  
280  
330  
325  
320  
V
= 7V, 15V, PWM MODE  
IN  
I
= 4A  
OUT  
250  
200  
150  
100  
V
= 7V  
IN  
SKIP MODE  
315  
310  
305  
V
= 15V  
IN  
SKIP MODE  
I
= 1A  
OUT  
50  
0
300  
0
5
10  
15  
20  
25  
30  
-40  
-20  
0
20  
40  
60  
80  
0.01  
0.1  
1
10  
INPUT VOLTAGE (V)  
TEMPERATURE (°C)  
LOAD CURRENT (A)  
CONTINUOUS TO DISCONTINUOUS INDUCTOR  
CURRENT POINT vs. INPUT VOLTAGE  
INDUCTOR CURRENT PEAKS AND VALLEYS  
vs. INPUT VOLTAGE (4A COMPONENTS,  
AT CURRENT-LIMIT TRIP POINT)  
I
AT CURRENT LIMIT vs.  
TEMPERATURE  
OUT  
(4A COMPONENTS, V  
= 2.5V)  
(4A COMPONENTS, V  
= 2.5V)  
OUT  
OUT  
700  
600  
9
12  
8
7
10  
8
I
PEAK  
500  
400  
300  
200  
100  
0
6
5
4
6
4
V
V
= 1V  
= 0.5V  
0
I
VALLEY  
ILIM  
3
2
1
ILIM  
2
0
0
0
5
10  
15  
20  
25  
30  
-40  
-20  
20  
40  
60  
80  
0
5
10  
15  
20  
25  
30  
INPUT VOLTAGE (V)  
TEMPERATURE (°C)  
INPUT VOLTAGE (V)  
NO-LOAD SUPPLY CURRENT vs. INPUT  
VOLTAGE (1.5A COMPONENTS,  
NO-LOAD SUPPLY CURRENT vs.  
INPUT VOLTAGE  
(4A COMPONENTS, PWM MODE, 300kHz)  
NO-LOAD SUPPLY CURRENT  
(4A COMPONENTS, SKIP MODE, 300kHz)  
SKIP MODE, V  
= 2.5V, 600kHz)  
OUT  
10  
8
800  
600  
600  
I
CC  
500  
400  
300  
200  
100  
0
I
CC  
I
IN  
6
I
DD  
400  
200  
0
4
2
I
CC  
I
I
DD  
DD  
I
IN  
I
IN  
0
0
5
10  
15  
20  
25  
30  
4.0  
4.5  
V , V , V INPUT VOLTAGE (V)  
CC DD IN  
5.0  
5.5  
6.0  
0
5
10  
15  
20  
25  
30  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
6
_______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
_____________________________Typical Operating Characteristics (continued)  
(Circuit of Figure 1, components from Table 1, V = +15V, SKIP = AGND, TON = unconnected, T = +25°C, unless otherwise noted.)  
A
IN  
LOAD-TRANSIENT RESPONSE  
(1.5A COMPONENTS, V = 5V,  
LOAD-TRANSIENT RESPONSE  
LOAD-TRANSIENT RESPONSE  
IN  
(8A COMPONENTS, V  
= 1.6V, 300kHz)  
(4A COMPONENTS, V  
= 2.5V, 300kHz)  
V
OUT  
= 2.5V, 600kHz)  
OUT  
OUT  
A
B
A
A
B
B
C
C
C
10µs/div  
10µs/div  
5µs/div  
A = V , AC-COUPLED, 100mV/div  
OUT  
B = INDUCTOR CURRENT, 5A/div  
C = DL, 5V/div  
A = V , AC-COUPLED, 100mV/div  
OUT  
B = INDUCTOR CURRENT, 2A/div  
C = DL, 10V/div  
A = V , AC-COUPLED, 100mV/div  
OUT  
B = INDUCTOR CURRENT, 1A/div  
C = DL, 5V/div  
START-UP WAVEFORM  
OUTPUT OVERLOAD WAVEFORM  
SHUTDOWN WAVEFORM  
(4A COMPONENTS, I  
= 4A, ACTIVE LOAD,  
OUT  
(4A COMPONENTS, V  
= 2.5V, 300kHz)  
(4A COMPONENTS, V  
= 2.5V, 300kHz)  
OUT  
OUT  
V
= 2.5V, 300kHz)  
OUT  
OUTPUT  
UNDERVOLTAGE  
PROTECTION  
THRESHOLD  
A
A
B
A
B
B
C
C
C
200µs/div  
50µs/div  
500µs/div  
A = V , 1V/div  
A = V , 1V/div  
OUT  
B = INDUCTOR CURRENT, 5A/div  
C = DL, 5V/div  
OUT  
A = V , 1V/div  
B = INDUCTOR CURRENT, 5A/div  
C = DL, 5V/div  
OUT  
B = INDUCTOR CURRENT, 5A/div  
C = DL, 5V/div  
_______________________________________________________________________________________  
7
High-Speed Step-Down Controller  
for Notebook Computers  
Pin Description  
PIN
NAME  
FUNCTION  
MAX1714A MAX1714B  
1
1
–
DH  
High-Side Gate Driver Output. Swings from LX to BST.  
2, 9,  
11  
No Connection. These pins are not connected to any internal circuitry. Connect N.C. pins  
to the ground plane to enhance thermal conductivity.  
N.C.  
Shutdown Control Input. Drive SHDN to AGND to force the MAX1714 into shutdown. Drive  
3
4
2
3
SHDN  
or connect to V  
for normal operation. A rising edge on SHDN clears the fault latch.  
CC  
Feedback Input. Connect to AGND for a +2.5V fixed output or to V  
for a +3.3V fixed  
CC  
FB  
output, or connect FB to a resistor divider from OUT for an adjustable output.  
Output Voltage Connection. Connect directly to the junction of the external and output fil-  
ter capacitors. OUT senses the output voltage to determine the on-time and also serves  
as the feedback input in fixed-output modes.  
5
6
4
5
OUT  
ILIM  
Current-Limit Threshold Adjustment. Connect ILIM to V for 100mV current-limit threshold.  
CC  
For an adjustable threshold, connect an external voltage source to ILIM, or use a two-resis-  
tor divider from REF to AGND. The external adjustment range of 0.5V to 2.0V corresponds to  
a current-limit threshold of 50mV to 200mV.  
+2.0V Reference Voltage Output. Bypass to AGND with 0.22µF (minimum) capacitor. Can  
supply 50µA for external loads.  
7
8
6
–
REF  
AGND  
Analog Ground.  
Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 6%  
below the normal regulation point or during soft-start. PGOOD is high impedance when  
the output is in regulation and the soft-start circuit has terminated.  
10  
7
PGOOD  
–
8
–
GND  
PGND  
DL  
Analog and Power Ground. AGND and PGND connect together internally.  
Power Ground. Connect directly to the low-side MOSFET’s source. Serves as the negative  
input of the current-limit comparator.  
12  
13  
14  
9
Low-Side Gate-Driver Output. Swings from PGND to V  
.
DD  
Supply Input for the DL Gate Drive. Connect to the system supply voltage, +4.5V to +5.5V.  
Bypass to PGND with a 1µF (min) ceramic capacitor.  
10  
V
DD  
CC  
Analog-Supply Input. Connect to the system supply voltage, +4.5V to +5.5V, with a series  
20Ω resistor. Bypass to AGND with a 1µF (min) ceramic capacitor.  
15  
16  
11  
12  
V
On-Time Selection-Control Input. This is a four-level input used to determine DH on-time.  
TON  
Connect to AGND, REF, or V , or leave TON unconnected to set the following switching  
CC  
frequencies: AGND = 600kHz, REF = 450kHz, floating = 300kHz, and V  
= 200kHz.  
CC  
Battery Voltage Sense Connection. Connect to input power source. V+ is used only to set  
the PWM one-shot timing.  
17  
18  
19  
13  
14  
15  
V+  
Pulse-Skipping Control Input. Connect to V  
for low-noise forced-PWM mode. Connect  
CC  
SKIP  
BST  
to AGND to enable pulse-skipping operation.  
Boost Flying-Capacitor Connection. Connect to an external capacitor and diode according  
to the Standard Application Circuit (Figure 1). See MOSFET Gate Drivers (DH, DL) section.  
External Inductor Connection. Connect LX to the switched side of the inductor. LX serves  
as the lower supply rail for the DH high-side gate driver. LX is also the positive input to the  
current-limit comparator.  
20  
16  
LX  
8
_______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
Standard Application Circuit  
Detailed Description  
The standard application circuit (Figure 1) generates a  
low-voltage rail for general-purpose use in a notebook  
computer (I/O supply, fixed CPU core supply, DRAM  
supply). This DC-DC converter steps down a battery or  
AC adapter voltage to voltages from 1.0V to 5.5V with  
high efficiency and accuracy.  
The MAX1714 buck controller is targeted for low-voltage  
power supplies for notebook computers. Maxim‘s propri-  
etary Quick-PWM pulse-width modulator in the MAX1714  
is specifically designed for handling fast load steps  
while maintaining a relatively constant operating fre-  
quency and inductor operating point over a wide range  
of input voltages. The Quick-PWM architecture circum-  
vents the poor load-transient timing problems of fixed-  
frequency current-mode PWMs while also avoiding the  
problems caused by widely varying switching frequen-  
cies in conventional constant-on-time and constant-off-  
time PWM schemes.  
See Table 1 for a list of component selections for com-  
mon applications. Table 2 lists component manufacturers.  
V
IN  
4.5V TO 28V  
+5V  
BIAS SUPPLY  
C5  
4.7µF  
C6  
3.3µF  
R1  
20Ω  
C1  
D2  
CMPSH-3  
V
V
DD  
CC  
V+  
BST  
DH  
ON/OFF  
CONTROL  
SHDN  
SKIP  
Q1  
L1  
LOW-NOISE  
CONTROL  
C7  
0.1µF  
V
OUT  
MAX1714  
C2  
LX  
DL  
Q2  
D1  
PGND  
(GND)  
FB  
TON  
REF  
OUT  
C4  
0.22µF  
+5V  
AGND  
(GND)  
R2  
100k  
POWER-GOOD  
INDICATOR  
PGOOD  
ILIM  
+5V  
( ) = ARE FOR THE MAX1714B ONLY.  
NOTE: IN THE MAX 1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN.  
Figure 1. Standard Application Circuit  
_______________________________________________________________________________________  
9
High-Speed Step-Down Controller  
for Notebook Computers  
Table 1. Component Selection for Standard Applications  
COMPONENT  
2.5V AT 4A  
1.6V AT 8A  
2.5V AT 1.5A  
4.5V to 5.5V  
Input Range  
7V to 20V  
300kHz  
7V to 20V  
300kHz  
Frequency  
600kHz  
Q1 High-Side  
MOSFET  
Fairchild Semiconductor  
1/2 FDS6982A  
International Rectifier  
IRF7811  
International Rectifier  
1/2 IRF7301  
Q2 Low-Side  
MOSFET  
Fairchild Semiconductor  
1/2 FDS6982A  
Fairchild Semiconductor  
FDS6670A  
International Rectifier  
1/2 IRF7301  
D2 Rectifier  
L1 Inductor  
Nihon EP10QY03  
Motorola MBRS340T3  
Motorola MBR0520LT1  
6.8µH  
Coilcraft DO3316P-682  
1.5µH  
Sumida CEP1251R5MC  
3.3µH  
Coiltronics UP1B-3R3  
10µF, 25V  
Taiyo Yuden TMK432BJ106KM  
(2) 10µF, 25V  
Taiyo Yuden TMK432BJ106KM  
100µF, 10V  
Sanyo POSCAP 10TPA100M  
C1 Input Capacitor  
C2 Output Capacitor  
470µF, 6V  
Kemet T510X477108M006AS  
(2) 470µF 6V  
Kemet T510X477108M006AS  
100µF, 10V  
Sanyo POSCAP 10TPA100M  
Table 2. Component Suppliers  
FACTORY FAX  
[Country Code]  
ply the PWM circuit and gate drivers. If stand-alone  
capability is needed, the +5V supply can be generated  
with an external linear regulator such as the MAX1615.  
MANUFACTURER  
USA PHONE  
AVX  
803-946-0690 [1] 803-626-3123  
516-435-1110 [1] 516-435-1824  
847-639-6400 [1] 847-639-1469  
561-241-7876 [1] 561-241-9339  
408-822-2181 [1] 408-721-1635  
310-322-3331 [1] 310-322-3332  
408-986-0424 [1] 408-986-1442  
714-969-2491 [1] 714-960-6492  
602-303-5454 [1] 602-994-6430  
Central Semiconductor  
Coilcraft  
Coiltronics  
Fairchild  
International Rectifier  
Kemet  
The battery and +5V bias inputs can be tied together if  
the input source is a fixed +4.5V to +5.5V supply. If the  
+5V bias supply is powered up prior to the battery sup-  
ply, the enable signal (SHDN) must be delayed until the  
battery voltage is present in order to ensure startup. The  
+5V bias supply must provide V  
and gate-drive  
CC  
power, so the maximum current drawn is:  
Matsuo  
Motorola  
I
= I + f (Q + Q ) = 5mA to 30mA (typ)  
BIAS  
CC  
G1  
G2  
814-237-1431  
[1] 814-238-0490  
800-831-9172  
Murata  
where I  
is 600µA typical, f is the switching frequency,  
CC  
G1  
and Q  
and Q  
are the MOSFET data sheet total  
G2  
NIEC (Nihon)  
Sanyo  
805-867-2555* [81] 3-3494-7414  
gate-charge specification limits at V = 5V.  
GS  
619-661-6835  
[81] 7-2070-1174  
Free-Running, Constant-On-Time PWM  
Controller with Input Feed-Forward  
408-988-8000  
800-554-5565  
Siliconix  
[1] 408-970-3950  
The Quick-PWM control architecture is a pseudo-fixed-fre-  
quency, constant-on-time current-mode type with voltage  
feed-forward (Figure 2). This architecture relies on the out-  
put filter capacitor’s ESR to act as the current-sense resis-  
tor, so the output ripple voltage provides the PWM ramp  
signal. The control algorithm is simple: the high-side  
switch on-time is determined solely by a one-shot whose  
period is inversely proportional to input voltage and direct-  
ly proportional to output voltage. Another one-shot sets a  
minimum off-time (400ns typical). The on-time one-shot is  
triggered if the error comparator is low, the low-side switch  
current is below the current-limit threshold, and the mini-  
mum off-time one-shot has timed out.  
Sprague  
Sumida  
Taiyo Yuden  
TDK  
603-224-1961  
847-956-0666  
408-573-4150  
847-390-4461  
[1] 603-224-1430  
[81] 3-3607-5144  
[1] 408-573-4159  
[1] 847-390-4405  
*Distributor  
+5V Bias Supply (V  
and V )  
DD  
CC  
The MAX1714 requires an external +5V bias supply in  
addition to the battery. Typically, this +5V bias supply is  
the notebook’s 95% efficient +5V system supply.  
Keeping the bias supply external to the IC improves effi-  
ciency and eliminates the cost associated with the +5V  
linear regulator that would otherwise be needed to sup-  
10 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
IN  
2V TO 28V  
V+  
I
LIM  
TOFF  
+5V  
MAX1714  
1-SHOT  
TON  
FROM  
OUT  
ON-TIME  
COMPUTE  
TRIG  
Q
9R  
BST  
R
TON  
S
R
Q
Q
TRIG  
DH  
LX  
CURRENT  
LIMIT  
1-SHOT  
Σ
ERROR  
AMP  
OUTPUT  
SKIP  
ZERO CROSSING  
REF  
V
+5V  
DD  
SHDN  
DL  
S
R
Q
(MAX1714B ONLY)  
PGND  
(GND)  
OUT  
MAX1714A ONLY  
x2  
+5V  
REF  
+12%  
REF  
-30%  
REF  
-6%  
V
CHIP  
SUPPLY  
CC  
FEEDBACK  
MUX  
(SEE FIGURE 9)  
PGOOD  
2V REF  
REF  
S1  
S2  
TIMER  
Q
(GND)  
AGND  
OVP/UVLO  
LATCH  
FB  
( ) ARE FOR THE MAX1714B ONLY.  
NOTE: IN THE MAX1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN.  
Figure 2. MAX1714 Functional Diagram  
frequency clock generator. The benefits of a constant  
switching frequency are twofold: first, the frequency can  
be selected to avoid noise-sensitive regions such as the  
455kHz IF band; second, the inductor ripple-current  
operating point remains relatively constant, resulting in  
easy design methodology and predictable output volt-  
age ripple.  
On-Time One-Shot (TON)  
The heart of the PWM core is the one-shot that sets the  
high-side switch on-time. This fast, low-jitter, adjustable  
one-shot includes circuitry that varies the on-time in  
response to battery and output voltage. The high-side  
switch on-time is inversely proportional to the battery  
voltage as measured by the V+ input, and proportional  
to the output voltage. This algorithm results in a nearly  
constant switching frequency despite the lack of a fixed-  
On-Time = K (V  
+ 0.075V) / V  
IN  
OUT  
______________________________________________________________________________________ 11  
High-Speed Step-Down Controller  
for Notebook Computers  
where K is set by the TON pin-strap connection and  
0.075V is an approximation to accommodate for the  
expected drop across the low-side MOSFET switch.  
One-shot timing error increases for the shorter on-time  
settings due to fixed propagation delays; it is approxi-  
mately 12.5% at 600kHz and 450kHz, and 10% at the  
two slower settings. This translates to reduced switching-  
frequency accuracy at higher frequencies (Table 5).  
Switching frequency increases as a function of load cur-  
rent due to the increasing drop across the low-side  
MOSFET, which causes a faster inductor-current dis-  
charge ramp. The on-times guaranteed in the Electrical  
Characteristics are influenced by switching delays in the  
external high-side power MOSFET.  
duty-cycle applications, this threshold is relatively con-  
stant, with only a minor dependence on battery voltage.  
KV  
2L  
V -V  
IN OUT  
OUT  
I
≈
⋅
LOAD(SKIP)  
V
IN  
where K is the on-time scale factor (Table 5). The load-  
current level at which PFM/PWM crossover occurs,  
I
, is equal to 1/2 the peak-to-peak ripple cur-  
LOAD(SKIP)  
rent, which is a function of the inductor value (Figure 3).  
For example, in the standard application circuit with  
K = 3.3µs (Table 5), V  
= 2.5V, V = 15V, and L =  
IN  
OUT  
6.8µH, switchover to pulse-skipping operation occurs at  
= 0.51A or about 1/8 full load. The crossover point  
I
LOAD  
occurs at an even lower value if a swinging (soft-satura-  
tion) inductor is used.  
Two external factors that influence switching-frequency  
accuracy are resistive drops in the two conduction loops  
(including inductor and PC board resistance) and the  
dead-time effect. These effects are the largest contribu-  
tors to the change of frequency with changing load cur-  
rent. The dead-time effect increases the effective  
on-time, reducing the switching frequency as one or  
both dead times are added to the effective on-time. It  
occurs only in PWM mode (SKIP = high) when the induc-  
tor current reverses at light or negative load currents.  
With reversed inductor current, the inductor’s EMF caus-  
es LX to go high earlier than normal, extending the on-  
time by a period equal to the low-to-high dead time.  
The switching waveforms may appear noisy and asyn-  
chronous when light loading causes pulse-skipping  
operation, but this is a normal operating condition that  
results in high light-load efficiency. Trade-offs in PFM  
noise vs. light-load efficiency are made by varying the  
inductor value. Generally, low inductor values produce a  
broader efficiency vs. load curve, while higher values  
result in higher full-load efficiency (assuming that the coil  
resistance remains fixed) and less output voltage ripple.  
Penalties for using higher inductor values include larger  
physical size and degraded load-transient response  
(especially at low input voltage levels).  
DC output accuracy specifications refer to the error-com-  
parator threshold of the error comparator. When the  
inductor is in continuous conduction, the output voltage  
will have a DC regulation level higher than the trip level  
by 50% of the ripple. In discontinuous conduction (SKIP  
= AGND, light-loaded), the output voltage will have a DC  
regulation level higher than the error-comparator thresh-  
old by approximately 1.5% due to slope compensation.  
For loads above the critical conduction point, the actual  
switching frequency is:  
V
+ V  
(V + V  
OUT  
DROP1  
f =  
t
)
ON IN  
DROP2  
where V  
is the sum of the parasitic voltage drops  
DROP1  
in the inductor discharge path, including synchronous  
rectifier, inductor, and PC board resistances; V  
is  
DROP2  
Forced-PWM Mode (SKIP = High)  
The low-noise forced-PWM mode (SKIP = high) disables  
the zero-crossing comparator, which controls the low-  
side switch on-time. This causes the low-side gate-drive  
waveform to become the complement of the high-side  
gate-drive waveform. This in turn causes the inductor  
current to reverse at light loads while DH maintains a  
the sum of the resistances in the charging path, and t  
is the on-time calculated by the MAX1714.  
ON  
Automatic Pulse-Skipping Switchover  
In skip mode (SKIP low), an inherent automatic  
switchover to PFM takes place at light loads. This  
switchover is effected by a comparator that truncates the  
low-side switch on-time at the inductor current’s zero  
crossing. This mechanism causes the threshold between  
pulse-skipping PFM and nonskipping PWM operation to  
coincide with the boundary between continuous and dis-  
continuous inductor-current operation (also known as the  
“critical conduction” point; see the Continuous to  
Discontinuous Inductor Current Point vs. Input Voltage  
graph in the Typical Operating Characteristics). In low-  
duty factor of V  
/V . The benefit of forced-PWM  
OUT IN  
mode is to keep the switching frequency fairly constant,  
but it comes at a cost: the no-load battery current can be  
10mA to 40mA, depending on the external MOSFETs.  
Forced-PWM mode is most useful for reducing audio-  
frequency noise, improving load-transient response, pro-  
viding sink-current capability for dynamic output voltage  
adjustment, and improving the cross-regulation of  
12 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
-I  
PEAK  
∆i  
∆t  
V
-V  
BATT OUT  
=
L
-I  
PEAK  
I
LOAD  
I
= I  
/2  
LOAD PEAK  
I
LIMIT  
0
ON-TIME  
TIME  
0
TIME  
Figure 3. Pulse-Skipping/Discontinuous Crossover Point  
Figure 4. ‘‘Valley’’ Current-Limit Threshold Point  
multiple-output applications that use a flyback trans-  
former or coupled inductor.  
Carefully observe the PC board layout guidelines to  
ensure that noise and DC errors don’t corrupt the cur-  
rent-sense signals seen by LX and PGND. Mount or  
place the IC close to the low-side MOSFET with short,  
direct traces, making a Kelvin sense connection to the  
source and drain terminals.  
Current-Limit Circuit (ILIM)  
The current-limit circuit employs a unique “valley” cur-  
rent-sensing algorithm that uses the on-state resistance  
of the low-side MOSFET as a current-sensing element  
(Figure 4). If the current-sense voltage (PGND - LX) is  
above the current-limit threshold, the PWM is not allowed  
to initiate a new cycle. The actual peak current is greater  
than the current-limit threshold by an amount equal to  
the inductor ripple current. Therefore, the exact current-  
limit characteristic and maximum load capability are a  
function of the MOSFET on-resistance, inductor value,  
and battery voltage. The reward for this uncertainty is  
robust, lossless overcurrent sensing. When combined  
with the UVP protection circuit, this current-limit method  
is effective in almost every circumstance.  
MOSFET Gate Drivers (DH, DL)  
The DH and DL drivers are optimized for driving moder-  
ate-sized high-side, and larger low-side power  
MOSFETs. This is consistent with the low duty factor  
seen in the notebook environment, where a large V  
OUT  
-
BATT  
V
differential exists. An adaptive dead-time circuit  
monitors the DL output and prevents the high-side FET  
from turning on until DL is fully off. There must be a low-  
resistance, low-inductance path from the DL driver to the  
MOSFET gate for the adaptive dead-time circuit to work  
properly; otherwise, the sense circuitry in the MAX1714  
will interpret the MOSFET gate as “off” while there is  
actually still charge left on the gate. Use very short, wide  
traces measuring no more than 20 squares (50 to 100  
mils wide if the MOSFET is 1 inch from the MAX1714).  
There is also a negative current limit that prevents  
excessive reverse inductor currents when V  
is sink-  
OUT  
ing current. The negative current-limit threshold is set to  
approximately 120% of the positive current limit, and  
therefore tracks the positive current limit when ILIM is  
adjusted.  
The dead time at the other edge (DH turning off) is  
determined by a fixed 35ns (typical) internal delay.  
The current-limit threshold is adjusted with an external  
resistor-divider at ILIM. A 1µA min divider current is rec-  
ommended. The current-limit threshold adjustment  
range is from 50mV to 200mV. In the adjustable mode,  
the current-limit threshold voltage is precisely 1/10 the  
voltage seen at ILIM. The threshold defaults to 100mV  
The internal pull-down transistor that drives DL low is  
robust, with a 0.5Ω typical on-resistance. This helps pre-  
vent DL from being pulled up during the fast rise-time of  
the inductor node, due to capacitive coupling from the  
drain to the gate of the low-side synchronous-rectifier  
MOSFET. However, for high-current applications, you  
might still encounter some combinations of high- and  
low-side FETs that will cause excessive gate-drain cou-  
pling, which can lead to efficiency-killing, EMI-producing  
shoot-through currents. This is often remedied by adding  
a resistor in series with BST, which increases the turn-on  
time of the high-side FET without degrading the turn-off  
time (Figure 5).  
when ILIM is connected to V . The logic threshold for  
CC  
switchover to the 100mV default value is approximately  
V
CC  
- 1V.  
The adjustable current limit accommodates MOSFETs  
with a wide range of on-resistance characteristics (see  
Design Procedure).  
______________________________________________________________________________________ 13  
High-Speed Step-Down Controller  
for Notebook Computers  
cycled below 1V. This action turns on the synchronous-  
+5V  
V
IN  
rectifier MOSFET with 100% duty and, in turn, rapidly  
discharges the output filter capacitor and forces the out-  
put to ground. If the condition that caused the overvolt-  
age (such as a shorted high-side MOSFET) persists, the  
battery fuse will blow. DL is also kept high continuously  
5Ω  
BST  
DH  
LX  
when V  
UVLO is active, as well as in shutdown mode  
CC  
(Table 3).  
Note that DL latching high causes the output voltage to  
go slightly negative, due to energy stored in the output  
LC tank circuit when OVP activates. If the load can’t tol-  
erate being forced to a negative voltage, it may be desir-  
able to place a power Schottky diode across the output  
to act as a reverse-polarity clamp.  
MAX1714  
Figure 5. Reducing the Switching-Node Rise Time  
Overvoltage protection can be defeated using the no-  
fault test mode (see No-Fault Test Mode section).  
POR, UVLO, and Soft-Start  
Power-on reset (POR) occurs when V rises above  
CC  
approximately 2V, resetting the fault latch and soft-start  
counter, and preparing the PWM for operation. V  
Output Undervoltage Protection  
The output undervoltage protection (OVP) function is  
similar to foldback current limiting, but employs a timer  
rather than a variable current limit. If the MAX1714 out-  
put voltage is under 70% of the nominal value 20ms after  
coming out of shutdown, the PWM is latched off and  
CC  
undervoltage lockout (UVLO) circuitry inhibits switching  
and forces the DL gate driver high (to enforce output  
overvoltage protection) until V  
rises above 4.2V,  
CC  
whereupon an internal digital soft-start timer begins to  
ramp up the maximum allowed current limit. The ramp  
occurs in five steps: 20%, 40%, 60%, 80%, and 100%;  
100% current is available after 1.7ms 50%.  
won’t restart until V  
power is cycled or SHDN is tog-  
CC  
gled. Under- voltage protection can be defeated using  
the no-fault test mode.  
A continuously adjustable analog soft-start function can  
be realized by adding a capacitor in parallel with the  
ILIM resistor. This soft-start method requires a minimum  
interval between power-down and power-up to dis-  
charge the capacitor.  
No-Fault Test Mode  
The over/undervoltage protection features can compli-  
cate the process of debugging prototype breadboards,  
since there are (at most) a few milliseconds in which to  
determine what went wrong. Therefore, a test mode is  
provided to totally disable the OVP, UVP, and thermal  
shutdown features, and clear the fault latch if it has been  
set. The PWM operates as if SKIP were grounded  
(PFM/PWM mode).  
Power-Good Output (PGOOD)  
The output voltage is continuously monitored for under-  
voltage by the PGOOD comparator. In shutdown,  
standby, and soft-start, PGOOD is actively held low.  
After digital soft-start has terminated, PGOOD is  
released if the digital output is within 6% of the error-  
comparator threshold. The PGOOD output is a true  
open-drain type with no parasitic ESD diodes. Note that  
the PGOOD undervoltage detector is completely inde-  
pendent of the output UVP fault detector.  
The no-fault test mode is entered by sinking 1.5mA from  
SKIP through an external negative voltage source in  
series with a resistor (Figure 6). SKIP is clamped to  
AGND with a silicon diode, so choose a resistor value of  
approximately (V  
- 0.65V) / 1.5mA.  
FORCE  
Design Procedure  
Component selection for the MAX1714 is primarily dic-  
tated by the following four criteria:  
Output Overvoltage Protection  
The overvoltage protection (OVP) circuit is available in  
the MAX1714A only, and is designed to protect against  
a shorted high-side MOSFET by drawing high current  
and blowing the battery fuse. The output voltage is con-  
tinuously monitored for overvoltage. If the output is more  
than 12.5% above the trip level of the error amplifier,  
overvoltage protection (OVP) is triggered and the circuit  
shuts down. The DL low-side gate-driver output is  
1) Input voltage range. The maximum value (V  
)
IN(MAX)  
must accommodate the worst-case high AC adapter  
voltage. The minimum value (V ) must account  
IN(MIN)  
for the lowest battery voltage after drops due to con-  
nectors, fuses, and battery selector switches. If  
there is a choice at all, lower input voltages result in  
better efficiency.  
then latched high until SHDN is toggled or V  
power is  
CC  
14 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
Table 3. Operating Mode Truth Table  
DL  
MODE  
COMMENTS  
SHDN SKIP  
0
1
X
High  
Shutdown  
Low-power shutdown state. DL is forced to V , enforcing OVP. I  
< 1µA typ.  
CC  
DD  
Test mode with OVP, UVP, and thermal faults disabled and latches cleared. Otherwise  
normal operation, with automatic PWM/PFM switchover for pulse skipping at light loads  
(Figure 6).  
Below  
AGND  
Switching  
Switching  
No Fault  
Low-noise operation with no automatic switchover. Fixed-frequency PWM action is  
forced regardless of load. Inductor current reverses at light load levels. Low noise,  
Run (PWM),  
Low Noise  
1
1
1
V
CC  
high I .  
Q
Run  
Normal operation with automatic PWM/PFM switchover for pulse skipping at light loads.  
AGND Switching  
(PFM/PWM) Best light-load efficiency.  
Fault latch has been set by OVP, output UVLO, or thermal shutdown. Device will remain  
X
High  
Fault  
in FAULT mode until V  
power is cycled, SKIP is forced below ground (Figure 6), or  
CC  
SHDN is toggled.  
2) Maximum load current. There are two values to con-  
sider. The peak load current (I ) determines  
voltage, due to MOSFET switching losses that are  
2
proportional to frequency and V . The optimum fre-  
IN  
LOAD(MAX)  
the instantaneous component stresses and filtering  
requirements, and thus drives output capacitor selec-  
tion, inductor saturation rating, and the design of the  
current-limit circuit. The continuous load current  
quency is also a moving target, due to rapid improve-  
ments in MOSFET technology that are making higher  
frequencies more practical (Table 4).  
4) Inductor operating point. This choice provides  
trade-offs between size vs. efficiency. Low inductor  
values cause large ripple currents, resulting in the  
smallest size, but poor efficiency and high output rip-  
ple. The minimum practical inductor value is one that  
causes the circuit to operate at the edge of critical  
conduction (where the inductor current just touches  
zero with every cycle at maximum load). Inductor val-  
ues lower than this grant no further size-reduction  
benefit.  
(I  
) determines the thermal stresses and thus dri-  
LOAD  
ves the selection of input capacitors, MOSFETs, and  
other critical heat-contributing components. Modern  
notebook CPUs generally exhibit:  
I
= I  
· 80%  
LOAD  
LOAD(MAX)  
3) Switching frequency. This choice determines the  
basic trade-off between size and efficiency. The opti-  
mal frequency is largely a function of maximum input  
The MAX1714’s pulse-skipping algorithm initiates skip  
mode at the critical conduction point. So, the inductor  
operating point also determines the load-current value  
at which PFM/PWM switchover occurs.  
APPROXIMATELY  
These four factors impact the component selection  
process. Selecting components and calculating their  
effect on the MAX1714’s operation is best done with a  
spreadsheet. Using the formulas provided, calculate the  
LIR (the ratio of the inductor ripple current to the  
designed maximum load current) for both the minimum  
and maximum input voltages. Maintaining an LIR within a  
20% to 50% range is prudent. The use of a spreadsheet  
allows quick evaluation of component selection.  
-0.65V  
MAX1714  
SKIP  
1.5mA  
V
FORCE  
(GND)  
AGND  
( ) ARE FOR THE MAX1714B ONLY.  
Figure 6. Disabling Over/Undervoltage Protection  
(No-Fault Test Mode)  
______________________________________________________________________________________ 15  
High-Speed Step-Down Controller  
for Notebook Computers  
The amount of output sag is also a function of the maxi-  
mum duty factor, which can be calculated from the on-  
time and minimum off-time:  
Inductor Selection  
The switching frequency and inductor operating point  
determine the inductor value as follows:  
2
V
(V - V  
)
IN  
OUT  
V ⋅ Of U⋅TLIR ⋅ I  
(∆I  
) ⋅L  
L =  
LOAD(MAX)  
V
=
SAG  
IN  
LOAD(MAX)  
2⋅C ⋅DUTY (V  
- V  
)
F
IN(MIN)  
OUT  
Example: I  
= 8A, V  
7V, V  
= 1.5V,  
OUT  
LOAD(MAX)  
f = 300kHz, 33% ripple current or LIR = 0.33.  
IN =  
where  
1.5V (7V-1.5V)  
7V⋅300kHz⋅0.33⋅8A  
K (V  
+ 0.075V) V  
+ 0.075V) V  
IN  
OUT  
L =  
= 1.49µH  
DUTY =  
K (V  
+ min off-time  
OUT  
OUT  
Find a low-loss inductor having the lowest possible DC  
resistance that fits in the allotted dimensions. Ferrite  
cores are often the best choice, although powdered iron  
is inexpensive and can work well at 200kHz. The core  
must be large enough not to saturate at the peak induc-  
and minimum off-time = 400ns typ (see Table 5 for K val-  
ues).  
The amount of overshoot during a full-load to no-load  
transient due to stored inductor energy can be calculated  
as:  
2
tor current (I  
).  
PEAK  
L⋅I  
PEAK  
V
≈
SOAR  
I
= I  
+ [(LIR / 2) · I  
]
PEAK  
LOAD(MAX)  
LOAD(MAX)  
2C  
V
OUT OUT  
Most inductor manufacturers provide inductors in stan-  
dard values, such as 1.0µH, 1.5µH, 2.2µH, 3.3µH, etc.  
Also look for nonstandard values, which can provide a  
better compromise in LIR across the input voltage range.  
For example, Sumida offers 3.1µH and 4.4µH in their  
CDRH125 series. If using a swinging inductor (where the  
no-load inductance decreases linearly with increasing  
current), evaluate the LIR with properly scaled induc-  
tance values.  
where I  
is the peak inductor current.  
PEAK  
Setting the Current Limit  
The minimum current-limit threshold must be high  
enough to support the maximum load current. The valley  
of the inductor current occurs at I  
minus half  
LOAD(MAX)  
of the ripple current (Figure 4); therefore:  
> I - (LIR / 2) I  
LOAD(MAX)  
I
LIMIT(LOW)  
LOAD(MAX)  
where I  
equals minimum current-limit thresh-  
LIMIT(LOW)  
Transient Response  
old voltage divided by the R  
of Q2. For the  
DS(ON)  
The inductor ripple current also impacts transient-  
MAX1714, the minimum current-limit threshold using the  
100mV default setting is 90mV. Use the worst-case maxi-  
response performance, especially at low V - V  
dif-  
OUT  
IN  
ferentials. Low inductor values allow the inductor  
current to slew faster, replenishing charge removed  
from the output filter capacitors by a sudden load step.  
mum value for R  
and add some margin for the rise in R  
perature. A good general rule is to allow 0.5% additional  
resistance for each °C of temperature rise.  
from the MOSFET Q2 data sheet,  
DS(ON)  
with tem-  
DS(ON)  
Table 4. Frequency Selection Guidelines  
Examining the 8A circuit example with a maximum  
DS(ON)  
ing:  
FREQUENCY  
(kHz)  
TYPICAL  
APPLICATION  
R
= 12mΩ at high temperature reveals the follow-  
COMMENTS  
200  
TON = V  
Use for absolute best  
efficiency.  
I
= 90mV / 12mΩ = 7.5A  
4-cell Li+ notebook  
4-cell Li+ notebook  
LIMIT(LOW)  
CC  
This 7.5A is greater than the valley current of 6.7A, so the  
circuit can easily deliver the full rated 8A using the default  
100mV nominal ILIM threshold.  
300  
TON = Float  
Considered mainstream  
by current standards.  
Useful in 3-cell systems  
for lighter loads than the  
CPU core or where size is  
key.  
For an adjustable threshold, connect a two-resistor  
divider from REF to AGND, with ILIM connected at the  
center tap. The external adjustment range of 0.5V to 2.0V  
corresponds to a current-limit threshold of 50mV to  
200mV. When adjusting the current limit, use 1% toler-  
ance resistors to prevent a significant increase of errors in  
450  
TON = REF  
3-cell Li+ notebook  
+5V input  
Good operating point for  
compound buck designs  
or desktop circuits.  
600  
TON = AGND  
16 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
the current-limit tolerance. A 1µA minimum divider current  
is recommended.  
Tantalum and OS-CON capacitors in widespread use at  
the time of publication have typical ESR zero frequencies  
of 25kHz. In the design example used for inductor selec-  
tion, the ESR needed to support 50mVp-p ripple is  
60mV/2.7A = 22mΩ. Two 470µF/4V Kemet T510 low-ESR  
tantalum capacitors in parallel provide 22mΩ max ESR.  
Their typical combined ESR results in a zero at 27kHz,  
well within the bounds of stability.  
Output Capacitor Selection  
The output filter capacitor must have low enough effective  
series resistance (ESR) to meet output ripple and load-  
transient requirements, yet have high enough ESR to sat-  
isfy stability requirements. Also, the capacitance value  
must be high enough to absorb the inductor energy  
going from a full-load to no-load condition without tripping  
the overvoltage protection circuit.  
Don’t put high-value ceramic capacitors directly across  
the feedback sense point without taking precautions to  
ensure stability. Large ceramic capacitors can have a  
high ESR zero frequency and cause erratic, unstable  
operation. However, it’s easy to add enough series resis-  
tance by placing the capacitors a couple of inches  
downstream from the feedback sense point, which  
should be as close as possible to the inductor (see the  
All-Ceramic-Capacitor Application section).  
In CPU V  
converters and other applications where  
CORE  
the output is subject to violent load transients, the output  
capacitor’s size depends on how much ESR is needed to  
prevent the output from dipping too low under a load  
transient. Ignoring the sag due to finite capacitance:  
V
DIP  
R
≤
ESR  
I
Unstable operation manifests itself in two related but dis-  
tinctly different ways: double-pulsing and fast-feedback  
loop instability.  
LOAD(MAX)  
In non-CPU applications, the output capacitor’s size  
depends on how much ESR is needed to maintain an  
acceptable level of output voltage ripple:  
Double-pulsing occurs due to noise on the output or  
because the ESR is so low that there isn’t enough volt-  
age ramp in the output voltage signal. This “fools” the  
error comparator into triggering a new cycle immediately  
after the 400ns minimum off-time period has expired.  
Double-pulsing is more annoying than harmful, resulting  
in nothing worse than increased output ripple. However,  
it can indicate the possible presence of loop instability,  
which is caused by insufficient ESR.  
Vp-p  
R
≤
ESR  
LIR⋅I  
LOAD(MAX)  
The actual microfarad capacitance value required relates  
to the physical size needed to achieve low ESR, as well  
as to the chemistry of the capacitor technology. Thus, the  
capacitor is usually selected by ESR and voltage rating  
rather than by capacitance value (this is true of tantalums,  
OS-CONs, and other electrolytics).  
Loop instability can result in oscillations at the output  
after line or load perturbations that can trip the overvolt-  
age protection latch or cause the output voltage to fall  
below the tolerance limit.  
When using low-capacity filter capacitors such as ceram-  
ic or polymer types, capacitor size is usually determined  
by the capacity needed to prevent V  
and V  
from  
SAG  
SOAR  
The easiest method for checking stability is to apply a  
very fast zero-to-max load transient and carefully  
observe the output voltage ripple envelope for over-  
shoot and ringing. It can help to simultaneously monitor  
the inductor current with an AC current probe. Don’t  
allow more than one cycle of ringing after the initial  
step-response under- or overshoot.  
causing problems during load transients. Generally, once  
enough capacitance is added to meet the overshoot  
requirement, undershoot at the rising load edge is no  
longer a problem (also, see the V  
and V  
equa-  
SAG  
SOAR  
tion in the Transient Response section).  
Output Capacitor Stability Considerations  
Stability is determined by the value of the ESR zero rela-  
tive to the switching frequency. The point of instability is  
Input Capacitor Selection  
The input capacitor must meet the ripple current  
given by the following equation:  
requirement (I  
) imposed by the switching currents.  
RMS  
f
f
=
Nontantalum chemistries (ceramic, aluminum, or OS-  
CON) are preferred due to their resistance to power-up  
surge currents.  
ESR  
π
1
where f  
=
ESR  
2⋅π⋅RESR ⋅C  
V
V - V  
F
OUT IN OUT  
(
)
I
= I  
LOAD  
RMS  
For a typical 300kHz application, the ESR zero frequency  
must be well below 95kHz, preferably below 50kHz.  
V
IN  
______________________________________________________________________________________ 17  
High-Speed Step-Down Controller  
for Notebook Computers  
For optimal circuit reliability, choose a capacitor that  
has less than 10°C temperature rise at the peak ripple  
current.  
fy factors that influence the turn-on and turn-off times.  
These factors include the internal gate resistance, gate  
charge, threshold voltage, source inductance, and PC  
board layout characteristics. The following switching loss  
calculation provides only a very rough estimate and is no  
substitute for breadboard evaluation, preferably including  
a sanity check using a thermocouple mounted on Q1.  
Power MOSFET Selection  
Most of the following MOSFET guidelines focus on the  
challenge of obtaining high load-current capability (>5A)  
when using high-voltage (>20V) AC adapters. Low-cur-  
rent applications usually require less attention.  
2
CRSS ⋅V  
⋅f⋅I  
IN(MAX)  
LOAD  
PD(Q1 switching) =  
For maximum efficiency, choose a high-side MOSFET  
(Q1) that has conduction losses equal to the switching  
losses at the optimum battery voltage (15V). Check to  
ensure that the conduction losses at minimum input  
voltage don’t exceed the package thermal limits or  
violate the overall thermal budget. Check to ensure that  
conduction losses plus switching losses at the maxi-  
mum input voltage don’t exceed the package ratings or  
violate the overall thermal budget.  
I
GATE  
where C is the reverse transfer capacitance of Q1  
RSS  
and I  
typical).  
is the peak gate-drive source/sink current (1A  
GATE  
For the low-side MOSFET, Q2, the worst-case power dis-  
sipation always occurs at maximum battery voltage:  
2
· R  
LOAD DS(ON)  
PD(Q2) = (1 - V  
/ V ) · I  
IN(MAX)  
OUT  
Choose a low-side MOSFET (Q2) that has the lowest  
possible R , comes in a moderate to small pack-  
DS(ON)  
The absolute worst case for MOSFET power dissipation  
occurs under heavy overloads that are greater than  
age (i.e., SO-8), and is reasonably priced. Ensure that  
the MAX1714 DL gate driver can drive Q2; in other  
words, check that the gate isn’t pulled up by the high-  
side switch turn on, due to parasitic drain-to-gate capac-  
itance, causing cross-conduction problems. Switching  
losses aren’t an issue for the low-side MOSFET, since it’s  
a zero-voltage switched device when used in the buck  
topology.  
I
but are not quite high enough to exceed the  
LOAD(MAX)  
current limit and cause the fault latch to trip. To protect  
against this possibility, you must “overdesign” the circuit  
to tolerate I  
= I  
+ [(LIR / 2) · I  
],  
LOAD  
LIMIT(HIGH)  
is the maximum valley current allowed  
LOAD(MAX)  
where I  
LIMIT(HIGH)  
by the current-limit circuit, including threshold tolerance  
and on-resistance variation. This means that the  
MOSFETs must be very well heatsinked. If short-circuit  
protection without overload protection is enough, a nor-  
MOSFET Power Dissipation  
Worst-case conduction losses occur at the duty factor  
extremes. For the high-side MOSFET, the worst-case  
power dissipation due to resistance occurs at minimum  
battery voltage:  
mal I  
value can be used for calculating component  
LOAD  
stresses.  
Choose a Schottky diode D1 having a forward voltage  
low enough to prevent the Q2 MOSFET body diode from  
turning on during the dead time. As a general rule, a  
diode having a DC current rating equal to 1/3 of the load  
current is sufficient. This diode is optional, and if efficien-  
cy isn’t critical it can be removed.  
2
· R  
LOAD DS(ON)  
PD(Q1 Resistive) = (V  
/ V ) · I  
IN(MIN)  
OUT  
Generally, a small high-side MOSFET is desired to  
reduce switching losses at high input voltages. However,  
the R  
required to stay within package power-dissi-  
DS(ON)  
pation limits often limits how small the MOSFET can be.  
Again, the optimum occurs when the switching (AC)  
Application Issues  
losses equal the conduction (R  
) losses. High-side  
DS(ON)  
Dropout Performance  
The output voltage adjust range for continuous-conduc-  
tion operation is restricted by the nonadjustable 500ns  
(max) minimum off-time one-shot. For best dropout per-  
formance, use the slowest (200kHz) on-time setting.  
When working with low input voltages, the duty-factor  
limit must be calculated using worst-case values for on-  
and off-times. Manufacturing tolerances and internal  
propagation delays introduce an error to the TON K-fac-  
tor. This error is greater at higher frequencies (Table 5).  
Also, keep in mind that transient response performance  
of buck regulators operated close to dropout is poor,  
switching losses don’t usually become an issue until the  
input is greater than approximately 15V.  
Switching losses in the high-side MOSFET can become  
an insidious heat problem when maximum AC adapter  
voltages are applied, due to the squared term in the  
CV2F switching loss equation. If the high-side MOSFET  
you’ve chosen for adequate R  
at low battery volt-  
DS(ON)  
ages becomes extraordinarily hot when subjected to  
, you must reconsider your choice of MOSFET.  
V
IN(MAX)  
Calculating the power dissipation in Q1 due to switching  
losses is difficult, since it must allow for difficult-to-quanti-  
18 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
+5V  
V
= 7V TO 24V*  
IN  
1µF  
20Ω  
C1  
1µF  
V
V+ ILIM  
SHDN  
V
CC  
DD  
5Ω  
BST  
DH  
ON/OFF  
Q1  
Q2  
0.5µH  
R1  
R2  
2.5V AT 7A  
CPU  
0.1µF  
MAX1714  
LX  
FB  
SKIP  
C2  
DL  
0.22µF  
PGND (GND)  
AGND (GND)  
OUT  
REF  
1k  
TON  
C1 = 2 x 10µF/25V TAIYO YUDEN (1812) (TMK432BJ106AM)  
C2 = 6 x 47µF/6.3V TAIYO YUDEN (1812) (JMK432BJ476MN)  
R1 + R2 = 5mΩ MINIMUM OF PCB TRACE RESISTANCE (TOTAL)  
* FOR HIGHER MINIMUM INPUT VOLTAGE,  
* LESS OUTPUT CAPACITANCE IS ACCEPTABLE.  
( ) ARE FOR THE MAX1714B ONLY.  
Figure 7. All-Ceramic-Capacitor Application  
Remember to include inductor resistance and MOSFET  
Table 5. Approximate K-Factor Errors  
on-state voltage drops (V ) when doing worst-case  
SW  
TON  
K
APPROXIMATE  
K-FACTOR  
ERROR (%)  
MIN V  
IN  
= 2V  
dropout duty-factor calculations.  
SETTING FACTOR  
AT V  
OUT  
(V)  
All-Ceramic-Capacitor Application  
Ceramic capacitors have advantages and disadvan-  
tages. They have ultra-low ESR, are noncombustible, are  
relatively small, and are nonpolarized. On the other  
hand, they’re expensive and brittle, and their ultra-low  
ESR characteristic can result in excessively high ESR  
zero frequencies (affecting stability). In addition, their rel-  
atively low capacitance value can cause output over-  
shoot when going abruptly from full-load to no-load  
conditions, unless there are some bulk tantalum or elec-  
trolytic capacitors in parallel to absorb the stored energy  
in the inductor. In some cases, there may be no room for  
electrolytics, creating a need for a DC-DC design that  
uses nothing but ceramics.  
(kHz)  
200  
300  
450  
600  
(µs)  
5
10  
10  
2.6  
2.9  
3.2  
3.6  
3.3  
2.2  
1.7  
12.5  
12.5  
and bulk output capacitance must often be added (see  
the V equation in Transient Response section).  
SAG  
Dropout Design Example: V = 3V min, V  
= 2V,  
IN  
IN  
OUT  
+ V ) / (V  
f = 300kHz. The required duty is (V  
-
OUT  
SW  
V
) = (2V + 0.1V) / (3.0V - 0.1V) = 72.4%. The worst-  
SW  
case on-time is (V  
+ 0.075) / V · K = 2.075V / 3V ·  
IN  
OUT  
The all-ceramic-capacitor application of Figure 7  
replaces the standard, typical tantalum output capacitors  
with ceramics in a 7A circuit. This design relies on hav-  
ing a minimum of 5mΩ parasitic PC board trace resis-  
tance in series with the capacitor in order to reduce the  
ESR zero frequency. This small amount of resistance is  
easily obtained by locating the MAX1714 circuit 2 or 3  
inches away from the CPU, and placing all the ceramic  
3.35µs-V · 90% = 2.08µs. The IC duty-factor limitation is:  
t
ON(MIN)  
2.08µs  
DUTY =  
=
= 80.6%,  
t
+ t  
2.08µs + 500ns  
ON(MIN)  
OFF(MAX)  
which meets the required duty.  
______________________________________________________________________________________ 19  
High-Speed Step-Down Controller  
for Notebook Computers  
capacitors close to the CPU. Resistance values higher  
Fixed Output Voltages  
The MAX1714’s Dual Mode™ operation allows the selec-  
tion of common voltages without requiring external com-  
ponents (Figure 8). Connect FB to AGND for a fixed  
than 5mΩ just improve the stability (which can be  
observed by examining the load-transient response  
characteristic as shown in the Typical Operating  
Characteristics). Avoid adding excess PC board trace  
resistance, as there’s an efficiency penalty; 5mΩ is suffi-  
cient for a 7A circuit.  
+2.5V output or to V  
for a +3.3V output, or connect FB  
CC  
directly to OUT for a fixed +1.0V output.  
Setting V  
with a Resistor-Divider  
OUT  
The output voltage can be adjusted with a resistor-  
divider if desired (Figure 9). The equation for adjusting  
the output voltage is:  
1
R
≥
ESR  
2FC  
OUT  
V
determines the minimum output capacitance  
SOAR  
R1  
R2  
V
= V 1 +  
FB  
requirement. In this example, the switching frequency  
has been increased to 600kHz and the inductor value  
has been reduced to 0.5µH (compared to 300kHz and  
1.5µH for the standard 8A circuit) in order to minimize the  
energy transferred from inductor to capacitor during  
load-step recovery. The overshoot must be calculated to  
avoid tripping the OVP latch. The efficiency penalty for  
operating at 600kHz is about 2% to 3%, depending on  
the input voltage.  
OUT  
where V is 1.0V.  
FB  
2-Stage (5V Powered) Notebook CPU  
Buck Regulator  
The most efficient and overall cost-effective solution for  
stepping down a high-voltage battery to a very low out-  
put voltage is to use a single-stage buck regulator that’s  
powered directly from the battery. However, there may  
be situations where the battery bus can’t be routed near  
the CPU, or where space constraints dictate the smallest  
possible local DC-DC converter. In such cases, the 5V  
powered circuit of Figure 10 may be appropriate. The  
reduced input voltage allows a higher switching frequen-  
cy and a much smaller inductor value.  
An optional 1kΩ resistor is placed in series with OUT.  
This resistor attenuates high-frequency noise in some  
boards, which can cause double pulsing.  
OUT  
PC Board Layout Guidelines  
Careful PC board layout is critical to achieving low  
switching losses and clean, stable operation. The switch-  
ing power stage requires particular attention (Figure 11).  
If possible, mount all of the power components on the  
top side of the board with their ground terminals flush  
against one another. Follow these guidelines for good PC  
board layout:  
TO ERROR AMP  
MAX1714  
FIXED  
2.5V  
FB  
FIXED  
3.3V  
• Keep the high-current paths short, especially at the  
ground terminals. This practice is essential for stable,  
jitter-free operation.  
• Connect AGND and PGND together close to the IC.  
For the MAX1714B, these grounds are connected  
internally to the GND pin. Carefully follow the ground-  
ing instructions under step 4 of the Layout Procedure.  
• Keep the power traces and load connections short.  
This practice is essential for high efficiency. Using  
thick copper PC boards (2 oz vs. 1 oz) can enhance  
full-load efficiency by 1% or more. Correctly routing  
PC board traces is a difficult task that must be  
approached in terms of fractions of centimeters,  
2V  
0.2V  
Figure 8. Feedback Mux  
Dual Mode is a trademark of Maxim Integrated Products.  
20 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
Layout Procedure  
1) Place the power components first, with ground termi-  
nals adjacent (Q2 source, CIN-, COUT-, D1 anode). If  
possible, make all these connections on the top layer  
V
BATT  
DH  
DL  
V
OUT  
with wide, copper-filled areas.  
MAX1714  
2) Mount the controller IC adjacent to MOSFET Q2,  
preferably on the back side opposite Q2 in order to  
keep LX, PGND, and the DL gate-drive lines short and  
wide. The DL gate trace must be short and wide,  
measuring 10 to 20 squares (50 to 100 mils wide if the  
MOSFET is 1 inch from the controller IC).  
PGND  
(GND)  
OUT  
R1  
R2  
FB  
3) Group the gate-drive components (BST diode and  
capacitor, V  
bypass capacitor) together near the  
DD  
AGND  
(GND)  
controller IC.  
4) Make the DC-DC controller ground connections as  
shown in Figure 11. This diagram can be viewed as  
having three separate ground planes: output ground,  
where all the high-power components go; the PGND  
( ) ARE FOR THE MAX1714B ONLY.  
Figure 9. Setting V  
with a Resistor-Divider  
OUT  
plane, where the PGND pin and V  
bypass capaci-  
DD  
where a single milliohm of excess trace resistance  
causes a measurable efficiency penalty.  
tor go; and an analog AGND plane, where sensitive  
analog components go. The analog ground plane and  
PGND plane must meet only at a single point directly  
beneath the IC. For the MAX1714B, this point should  
be the GND pin. These two planes are then connect-  
ed to the high-power output ground with a short con-  
• LX and PGND connections to Q2 for current limiting  
must be made using Kelvin sense connections to  
guarantee the current-limit accuracy. With SO-8  
MOSFETs, this is best done by routing power to the  
MOSFETs from outside using the top copper layer,  
while tying in PGND and LX inside (underneath) the  
SO-8 package.  
nection from V  
cap/PGND to the source of the  
DD  
low-side MOSFET, Q2 (the middle of the star ground).  
This point must also be very close to the output  
capacitor ground terminal.  
• When trade-offs in trace lengths must be made, it’s  
preferable to allow the inductor charging path to be  
made longer than the discharge path. For example,  
it’s better to allow some extra distance between the  
input capacitors and the high-side MOSFET than to  
allow distance between the inductor and the low-  
side MOSFET or between the inductor and the out-  
put filter capacitor.  
5) Connect the output power planes (V  
and system  
CORE  
ground planes) directly to the output filter capacitor  
positive and negative terminals with multiple vias.  
Place the entire DC-DC converter circuit as close to  
the CPU as is practical.  
• Ensure that the OUT connection to C  
is short and  
OUT  
direct. However, in some cases it may be desirable to  
deliberately introduce some trace length between the  
OUT inductor node and the output filter capacitor (see  
the All-Ceramic-Capacitor Application section).  
• Route high-speed switching nodes (BST, LX, DH, and  
DL) away from sensitive analog areas (REF, FB).  
• Make all pin-strap control input connections (SKIP,  
ILIM, etc.) to AGND or V  
rather than PGND or V  
.
CC  
DD  
______________________________________________________________________________________ 21  
High-Speed Step-Down Controller  
for Notebook Computers  
V
IN  
4.5V TO 5.5V  
1µF  
20Ω  
C1  
1µF  
4 x 10µF/25V  
V+  
V
DD  
I
V
CC  
LIM  
BST  
DH  
SHDN  
ON/OFF  
IRF7805  
V
OUT  
2.5V AT 7A  
0.1µF  
L1  
0.5µH  
C2  
MAX1714  
LX  
DL  
3 x 470µF  
KEMET T510  
0.22µF  
REF  
IRF7805  
PGND  
(GND)  
FB  
V
CC  
OUT  
100k  
AGND  
(GND)  
PGOOD  
TON  
( ) = ARE FOR THE MAX1714B ONLY.  
NOTE: IN THE MAX1714B, AGND AND PGND ARE  
INTERNALLY CONNECTED TO THE GND PIN.  
SKIP  
Figure 10. 5V Powered, 7A CPU Buck Regulator  
Pin Configurations  
TOP VIEW  
DH  
N.C.  
SHDN  
FB  
1
2
3
4
5
6
7
8
9
20 LX  
19 BST  
18 SKIP  
17 V+  
DH  
SHDN  
FB  
1
2
3
4
5
6
7
8
16 LX  
15 BST  
14 SKIP  
13 V+  
MAX1714A  
OUT  
ILIM  
REF  
16 TON  
15  
14  
V
V
CC  
DD  
OUT  
MAX1714B  
ILIM  
12 TON  
AGND  
N.C.  
13 DL  
REF  
11  
10  
9
V
V
CC  
DD  
12 PGND  
11 N.C.  
PGOOD  
GND  
PGOOD 10  
DL  
QSOP  
QSOP  
22 ______________________________________________________________________________________  
High-Speed Step-Down Controller  
for Notebook Computers  
V
BATT  
GND IN  
ALL ANALOG GROUNDS  
CONNECT TO AGND ONLY  
VIA TO PGND  
NEAR Q2 SOURCE  
MAX1714  
V
CC  
CIN  
GND  
OUT  
Q1  
REF  
D1  
Q2  
C
OUT  
V
DD  
I
LIM  
V
OUT  
AGND  
VIA TO SOURCE  
OF Q2  
CONNECT AGND TO PGND  
BENEATH IC, 1 POINT ONLY.  
SPLIT ANALOG GND PLANE AS SHOWN.  
L1  
VIA TO OUT  
NEAR C  
+
OUT  
VIA TO LX  
NOTES: "STAR" GROUND IS USED.  
D1 IS DIRECTLY ACROSS Q2.  
INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE.  
Figure 11. Power-Stage PC Board Layout Example  
______________________________________________________________________________________ 23  
High-Speed Step-Down Controller  
for Notebook Computers  
Package Information  
24 ______________________________________________________________________________________  

相关型号：

MAX1714BEEE-T

 Switching Controller, Current-mode, 600kHz Switching Freq-Max, PDSO16, 0.150 INCH, 0.025 INCH PITCH, MO-137AA, QSOP-16
MAXIM

MAX1714BEVKIT

 Remote/Local Temperature Sensor with SMBus Serial Interface[MAX1617/MAX1617MEE/MAX1617MEE-T ]
MAXIM

MAX1715

 Ultra-High Efficiency, Dual Step-Down Controller for Notebook Computers
MAXIM

MAX1715EEI

 Ultra-High Efficiency, Dual Step-Down Controller for Notebook Computers
MAXIM

MAX1715EEI+T

 Dual Switching Controller, Current-mode, 620kHz Switching Freq-Max, PDSO28, 0.150 INCH, 0.025 INCH PITCH, QSOP-28
MAXIM

MAX1715EEI-T

 Dual Switching Controller, Current-mode, 620kHz Switching Freq-Max, PDSO28, 0.150 INCH, 0.025 INCH PITCH, MO-137AD QSOP-28
MAXIM

MAX1715EVKIT

 400MHz to 2.5GHz Upconverters[MAX2660/MAX2661/MAX2663/MAX2671/MAX2673/MAX2660EUT-T/MAX2660EVKIT/MAX2661EUT-T/MAX2661EVKIT/MAX2663EUT-T/MAX2663EVKIT/MAX2671EUT-T/MAX2671EVKIT/MAX2673EUA/MAX2673EUA-T/MAX2673EVKIT ]
MAXIM

MAX1716

 High-Speed, Adjustable, Synchronous Step-Down Controllers with Integrated Voltage Positioning
MAXIM

MAX1716EEG

 High-Speed, Adjustable, Synchronous Step-Down Controllers with Integrated Voltage Positioning
MAXIM

MAX1716EEG+

 Switching Controller, Current-mode, 550kHz Switching Freq-Max, PDSO24, 0.150 INCH, 0.025 INCH PITCH, QSOP-24
MAXIM

MAX1716EEG+T

 Switching Controller, Current-mode, 550kHz Switching Freq-Max, PDSO24, 0.150 INCH, 0.025 INCH PITCH, QSOP-24
MAXIM

MAX1716EEG-T

 暂无描述
MAXIM
©2020 ICPDF网 联系我们和版权申明