MAX16961SATEA/V+ [MAXIM]
Switching Regulator, Voltage-mode, 3.3A, 2400kHz Switching Freq-Max, BICMOS, 4 X 4 MM, ROHS COMPLIANT, TQFN-16;型号: | MAX16961SATEA/V+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Switching Regulator, Voltage-mode, 3.3A, 2400kHz Switching Freq-Max, BICMOS, 4 X 4 MM, ROHS COMPLIANT, TQFN-16 信息通信管理 开关 |
文件: | 总13页 (文件大小:587K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
General Description
Benefits and Features
The MAX16961 is a high-efficiency, synchronous step-
down converter that operates with a 2.7V to 5.5V input
voltage range and provides a 0.8V to 3.6V output voltage
range. The wide input/output voltage range and the ability
to provide up to 3A to load current make this device ideal
for on-board point-of-load and post-regulation applica-
tions. The device achieves -3.7%/+2.6% output error over
load, line, and temperature ranges.
S Small External Components
2.2MHz Operating Frequency
S Ideal for Point-of-Load Applications
3A Maximum Load Current
Adjustable Output Voltage: 0.8V to 3.6V
2.7V to 5.5V Operating Supply Voltage
S High Efficiency at Light Load
26µA Skip Mode Quiescent Current
The device features a 2.2MHz fixed-frequency PWM
mode for better noise immunity and load transient
response, and a pulse-frequency modulation mode
(skip) for increased efficiency during light-load operation.
The 2.2MHz frequency operation allows for the use of all-
ceramic capacitors and minimizes external components.
The optional spread-spectrum frequency modulation
minimizes radiated electromagnetic emissions.
S Minimizes Electromagnetic Interference
Programmable SYNC I/O Pin
Operates Above AM-Radio Band
Available Spread Spectrum
S Low Power Mode Saves Energy
1µA Shutdown Current
S Open-Drain Power-Good Output
Integrated low R
heavy loads and make the layout a much simpler task
with respect to discrete solutions.
switches improve efficiency at
DSON
S Limits Inrush Current During Startup
Soft-Start
S Overtemperature and Short-Circuit Protections
The device can be offered with factory-preset output volt-
ages, or with an adjustable output voltage (contact factory
for preset output-voltage options). Factory-preset output-
voltage versions allow customers to achieve -3.7%/+2.6%
output-voltage accuracy without using external resistors,
while the adjustable output-voltage version provides the
flexibility to set the output voltage to any desired value
between 0.8V to 3.6V using an external resistive divider.
S 16-Pin TSSOP-EP and 16-Pin (4mm x 4mm)
TQFN-EP Packages
S -40°C to 125°C Operating Temperature Range
Applications
Automotive Infotainment
Point-of-Load Applications
Industrial/Military
Additional features include 8ms soft-start, 16ms power-
good output delay, overcurrent, and overtemperature
protections.
The MAX16961 is available in thermally enhanced
16-pin TSSOP-EP and 16-pin (4mm x 4mm) TQFN-EP
packages, and is specified for operation over the -40NC
to +125NC automotive temperature range.
Typical Application Circuit
V
PV1
PV1
PV2
EN
OUTS
0.47µH
4.7µF
V
LX1
LX2
OUT1
Ordering Information appears at end of data sheet.
47µF
PGND1
PGND2
V
OUT1
V
PV
10Ω
1µF
PV
MAX16961
20kΩ
GND
PG
EP
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6520; Rev 5; 6/15
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
ABSOLUTE MAXIMUM RATINGS
PV, PV1, PV2 to GND..............................................-0.3V to +6V
EN, PG to GND .......................................................-0.3V to +6V
PGND1 and PGND2 to GND ..............................-0.3V to +0.3V
LX1, LX2 Continuous RMS Current
(LX1 connected in Parallel with LX2)...................................4A
LX Current (LX1 connected in Parallel with LX2).....Q6A (Note 5)
Continuous Power Dissipation (T = +70NC)
A
TQFN (derate 25mW/NC above +70NC)................... 2000mW*
TSSOP (derate 26.1mW/NC above +70NC)........... 2088.8mW*
Operating Temperature Range........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
All Other Pins Voltages to GND .. (V + 0.3V) to (V
- 0.3V)
PV
GND
Output Short-Circuit Duration....................................Continuous
*As per JEDEC51 Standard (multilayer board).
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
TSSOP
Junction-to-Ambient Thermal Resistance (B ) ..........40NC/W
Junction-to-Ambient Thermal Resistance (B )....38.3NC/W
JA
JA
Junction-to-Case Thermal Resistance (B ).................6NC/W
Junction-to-Case Thermal Resistance (B )..............3NC/W
JC
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V = V
= V
= 5V, V = 5V, T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
PV
PV1
PV2 EN A J A
PARAMETER
SYMBOL
CONDITIONS
Normal operation
No load, V = 0V
MIN
2.7
12
TYP
MAX
5.5
45
UNITS
V
Supply Voltage Range
Supply Current
V
PV
I
26
1
FA
PV
PWM
Shutdown Supply Current
I
V
= 0V, T = +25°C
5
FA
SHDN
EN
A
Undervoltage-Lockout Threshold
Low
V
2.37
V
UVLO_L
Undervoltage-Lockout Threshold
High
V
2.6
V
V
UVLO_H
Undervoltage-Lockout Hysteresis
0.07
SYNCHRONOUS STEP-DOWN DC-DC CONVERTER
FB Regulation Voltage
V
800
0
mV
%
OUTS
I
I
= 4A
= 0A
-3
+3
+3
LOAD
Feedback Set-Point Accuracy
V
OUTS
-0.5
+2
LOAD
V
= 5V, I
= 0.4A,
PV1
LX_
pMOS On-Resistance
nMOS On-Resistance
R
34
25
55
45
mI
mI
A
DSON_P
LX1 in parallel with LX2
V
= 5V, I = 0.8A,
PV1
LX_
R
DSON_N
LX1 in parallel with LX2
Maximum pMOS Current-Limit
Threshold
I
LX1 and LX2 shorted together
3.9
5.1
6.3
LIMP1
Maxim Integrated
2
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, V = 5V, T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
PV
PV1
PV2 EN A J A
PARAMETER
SYMBOL
CONDITIONS
+ 0.5V PV P5.5V) (Note 3)
MIN
3.3
1
TYP
MAX
UNITS
Maximum Output Current
I
(V
A
OUT
OUT
PV1
Fixed output voltage variants
Adjustable output version
2
5
OUTS Bias Current
I
FA
FA
B_OUTS
-1
+1
V
= 5V, LX_ = PGND_ or PV_,
= 0V, through the OUTS pin
EN
PV_
LX_ Leakage Current
I
-1
+1
LX_LEAK
T
= +25°C
A
Minimum On-Time
t
60
24
ns
ON_MIN
I
LX Discharge Resistance
R
V
15
55
LX
Maximum Short-Circuit Current
OSCILLATOR
7.8
A
Oscillator Frequency
f
Internally generated
2.0
1.7
2.2
+6
2.4
2.4
MHz
%
SW
Spread Spectrum
Df/f
Spread spectrum enabled
50% duty cycle (Note 4)
SYNC Input Frequency Range
THERMAL OVERLOAD
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
POWER-GOOD OUTPUT (PG)
PG Overvoltage Threshold
PG Undervoltage Threshold
PG Timeout Period
f
MHz
SYNC
+165
15
°C
°C
PG
PG
Percentage of nominal output
Percentage of nominal output
106
90
110
92
114
94
%
%
OVTH
UVTH
16
ms
Undervoltage-/Overvoltage-
Propagation Delay
28
Fs
FA
V
Output High Leakage Current
T
= +25°C
0.2
0.4
0.4
A
I
= 3mA
SINK
PG Output Low Voltage
V
= 1.2V, I
= 100FA
PV
SINK
ENABLE INPUTS (EN)
Input Voltage High
Input Voltage Low
Input Hysteresis
V
Input rising
Input falling
2.4
V
V
INH
V
0.5
INL
0.85
1.0
V
Input Current
V
V
= high
= low
0.1
50
2
FA
kI
EN
EN
Pulldown Resistor
100
200
DIGITAL INPUTS (PWM, SYNC AS INPUT)
Input Voltage High
Input Voltage Low
Input Voltage Hysteresis
Pulldown Resistor
V
1.8
50
V
V
INH
V
0.4
INL
50
mV
kI
100
200
Maxim Integrated
3
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= V
= 5V, V = 5V, T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
PV
PV1
PV2 EN A J A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL OUTPUT (SYNC AS OUTPUT)
Output-Voltage Low
Output-Voltage High
V
I
= 3mA
SINK
0.4
V
V
OL
V
V
= 5V, I = 3mA
SOURCE
4.2
OH
PV
Note 2: All limits are 100% production tested at +25°C. Limits over temperature are guaranteed by design.
Note 3: Calculated value based on an assumed inductor current ripple of 30%.
Note 4: For SYNC frequency outside (1.7, 2.4) MHz, contact factory.
Note 5: LX_ has internal clamp diodes to PGND_ and IN_. Applications that forward bias these diodes should take care not to
exceed the IC’s package power dissipation limits.
Typical Operating Characteristics
(V = V
PV
= 5V, V = 5V, T = +25°C, unless otherwise noted.)
EN A
PV1
EFFICIENCY vs. LOAD CURRENT (PWM)
EFFICIENCY vs. LOAD CURRENT (PWM)
EFFICIENCY vs. LOAD CURRENT (SKIP)
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 3.3V
V
= 5V
IN
IN
V
= 3.3V
OUT
V
= 2.5V
OUT
V
= 3.3V
OUT
V
= 1.8V
OUT
V
= 1.8V
OUT
V
= 1.2V
OUT
V
= 1.8V
OUT
V
= 1.2V
OUT
V
= 1.2V
OUT
V
= 5V
IN
0.0010
0.0100
0.1000
(A)
1.0000
10.0000
0.0010
0.0100
0.1000
1.0000
10.0000
0
0.001
0.010
0.100
1.000 10.000
I
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD
V
LOAD REGULATION (PWM)
V
LOAD REGULATION (SKIP)
OUT
EFFICIENCY vs. LOAD CURRENT (SKIP)
OUT
0.50
1
0
100
90
80
70
60
50
40
30
20
10
0
V
V
= 5V
IN
V
V
= 5V
IN
0
= 3.3V
OUT
= 3.3V
OUT
-0.50
-1.00
-1.50
-1
-2
-3
-4
-5
-6
V
= 1.8V
OUT
V
= 1.2V
OUT
V
= 2.5V
OUT
-2.00
-2.50
-3.00
-3.50
T
= -40°C
A
T
A
= -40°C
T
A
= +25°C
T
= +25°C
A
T
= +125°C
A
T
A
= +125°C
V
= 3.3V
IN
-4.00
0
0.5
1.0
1.5
(A)
2.0
2.5
3.0
0
0.5
1.0
I
1.5
(A)
2.0
2.5
3.0
0.0001 0.0010 0.0100 0.1000 1.0000 10.0000
I
LOAD CURRENT (A)
LOAD
LOAD
Maxim Integrated
4
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
V
OUT
vs. V (PWM)
I vs. V (SKIP)
PV PV
PV
1.85
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
1.75
40
35
30
25
20
15
10
V
V
V
= 0V
PWM
EN1
OUT1
I
= 0A
LOAD
= V = V
EN2
PV
= 0.8V
= V
OUT2
T
= -40°C
A
T
= +125°C
= +25°C
A
T
= +25°C
A
T
A
T
A
= -40°C
4.0
T
= +125°C
A
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
2.5
3.0
3.5
4.5
5.0
5.5
V
V
(V)
PV
PV
I
vs. TEMPERATURE (SKIP)
LOAD-TRANSIENT RESPONSE (PWM)
MAX16961 toc10
PV
40
38
36
34
32
30
28
V
= 3.3V
V
V
V
V
= 5V
PWM
EN1
OUT
IN
PV
= 0V
PV
= 0.9V
3.0A
= V
0.30A
0A
I
LOAD
V
OUT
AC-COUPLED
26
24
22
50mV/div
20
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
100µs/div
SHDN CURRENT vs. V
f
vs. TEMPERATURE
PV
SW
1000
100
10
2.20
2.18
2.16
2.14
2.12
2.10
2.08
2.06
2.04
2.02
2.00
V
= 5V
IN
PWM MODE
T
= +125°C
A
1
0.1
T
= +25°C
A
T
0.01
0.001
= -40°C
4.5
A
2.5
3.0
3.5
4.0
(V)
5.0
5.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
V
PV
Maxim Integrated
5
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Pin Configurations
TOP VIEW
TOP VIEW
12
11
10
9
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
PV2
GND
GND
PG
8
7
6
5
GND 13
GND 14
LX2
PV
PGND2
PGND1
LX1
SYNC
PWM
GND
OUTS
EN
MAX16961
MAX16961
GND
PV2
15
16
PV1
PG
EP
EP
PV1
+
EN
OUTS
1
2
3
4
TSSOP
TQFN
(4mm x 4mm)
Pin Descriptions
PIN
NAME
FUNCTION
Switching Node 2. LX2 is high impedance when the converter is off.
TQFN
TSSOP
1
2
3
4
3
4
5
6
LX2
PGND2 Power Ground 2
PGND1 Power Ground 1
LX1
Switching Node 1. LX1 is high impedance when the converter is off.
Input Supply 1. Bypass PV1 with at least a 4.7FF ceramic capacitor to PGND1. Connect PV1 to
PV2 for normal operation.
5
6
7
7
8
9
PV1
EN
Enable Input. Drive EN high to enable the converter. Drive EN low to disable the converter.
Feedback Input (Adjustable Output Option Only). Connect an external resistive divider from
VOUT to OUTS and GND to set the output voltage. See Figure 2.
OUTS
Power-Good Output. Open-drain output. PG asserts when VOUT drops below 8% or rises above
10% of the nominal output voltage. Connect to a 20kI pullup resistor.
8
10
PG
9,
13–15
1, 11,
15, 16
GND
PWM
Ground
PWM Control Input. Drive PWM high to put the converters in forced-PWM mode. Drive PWM low
to put the converters in skip mode.
10
11
12
13
Factory-Set Sync Input or Output. As an input, SYNC accepts a 1.7MHz to 2.4MHz external clock
signal. As an output, SYNC outputs a 90° phase-shifted signal with respect to internal oscillator.
SYNC
Maxim Integrated
6
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Pin Descriptions (continued)
PIN
NAME
PV
FUNCTION
TQFN
TSSOP
Device Supply Voltage Input. Bypass with at least a 1FF ceramic capacitor to GND. In addition,
connect a 10I decoupling resistor between PV and the bypass capacitor.
12
14
Input Supply 2. Bypass PV2 with at least a 4.7FF ceramic capacitor to PGND2. Connect PV2 to
PV1 for normal operation.
16
—
2
PV2
EP
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power
dissipation. Do not use EP as the only IC ground connection. EP must be connected to GND.
—
Soft-Start
Detailed Description
The device includes an 8ms fixed soft-start time.
Soft-start time limits startup inrush current by forcing
the output voltage to ramp up over time towards its
regulation point.
The MAX16961 is a high-efficiency, synchronous step-
down converter that operates with a 2.7V to 5.5V input
voltage range and provides a 0.8V to 3.6V output voltage
range. The device delivers up to 3A of load current and
achieves -3.7%/+2.6% output error over load, line, and
temperature ranges.
Spread-Spectrum Option
The device featuring spread-spectrum (SS) operation
varies the internal operating frequency up by SS = 6%
relative to the internally generated operating frequency of
2.2MHz (typ). This function does not apply to externally
applied oscillation frequency. The internal oscillator is
frequency modulated with a 6% frequency deviation. See
the Selector Guide for available options.
The PWM input forces the device into either a fixed-
frequency, 2.2MHz PWM mode or a low-power pulse-
frequency modulation mode (skip). Optional spread-
spectrum frequency modulation minimizes radiated
electromagnetic emissions due to the switching
frequency. The factory-programmable synchronization
I/O (SYNC) enables system synchronization.
Synchronization (SYNC)
SYNC is a factory-programmable I/O. See the Selector
Guide for available options. When SYNC is configured
as an input, a logic-high on PWM enables SYNC to
Integrated low R
switches help improve efficiency
at heavy loads and make the layout a much simpler task
with respect to discrete solutions.
DSON
accept signal frequency in the range of 1.7MHz < f
SYNC
The device is offered with factory-preset output
voltages that achieve -3.7%/+2.6% output-voltage
accuracy without using external resistors. In addition, the
output voltage can be set to any desired values between
0.8V to 3.6V using an external resistive divider with the
adjustable option.
< 2.4MHz. When SYNC is configured as an output, a
logic-high on PWM enables SYNC to output a 90Nphase-
shifted signal with respect to internal oscillator.
Current-Limit/Short-Circuit Protection
The device features current limit that protects the device
against short-circuit and overload conditions at the out-
put. In the event of a short-circuit or overload condition,
the high-side MOSFET remains on until the inductor
current reaches the high-side MOSFET’s current-limit
threshold. The converter then turns on the low-side
MOSFET to allow the inductor current to ramp down.
Once the inductor current crosses the low-side MOSFET
current-limit threshold, the converter turns on the high-
side MOSFET for minimum on-time period. This cycle
repeats until the short or overload condition is removed.
Additional features include 8ms soft-start, 16ms power-
good delay output, overcurrent, and overtemperature
protections. See Figure 1.
Power-Good Output (PG)
The device features an open-drain power-good output
that asserts when the output voltage drops 8% below
or rises 10% above the regulated voltage. PG remains
asserted for a fixed 16ms timeout period after the output
rises up to its regulated voltage. Connect PG to OUTS
with a 20kI resistor.
Maxim Integrated
7
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
CURRENT-SENSE
PV1
AMP
PV
MAX16961
SKIP CURRENT
PV2
COMP
PV1
CLK
PEAK CURRENT
LX1
RAMP
GENERATOR
COMP
PGND
PV
CONTROL
LOGIC
STEP-DOWN
LX2
Σ
PMW
COMP
PWM
PGND2
PGND1
PGND
V
REF
ERROR
AMP
ZERO-CROSSING
COMP
FPWM CLK
SOFT-START
GENERATOR
CURRENT LIM
COMP
POWER-GOOD
COMP
P1-OK
FEEDBACK
DRIVER
OUTS
SYNC
CLK
OSC.
MAIN
OTP
TRIM BITS
FPWM
VOLTAGE
REFERENCE
TH-SD
V
REF
PG
P1-OK
CONTROL
LOGIC
EN
GND
Figure 1. Internal Block Diagram
the high-side switch only when needed to maintain
regulation. As such, the converter does not switch
MOSFETs on and off as often as is the case in the FPWM
mode. Consequently, the gate charge and switching
losses are much lower in skip mode.
FPWM/Skip Modes
The device features an input (PWM) that puts the
converter either in skip mode or forced-PWM (FPWM)
mode of operation. See the Pin Descriptions section for
mode details. In FPWM mode, the converter switches at
a constant frequency with variable on-time. In skip mode,
the converter’s switching frequency is load-dependent
until the output load reaches the skip threshold. At
higher load current, the switching frequency does not
change and the operating mode is similar to the FPWM
mode. Skip mode helps improve efficiency in light-load
applications by allowing the converters to turn on
Overtemperature Protection
Thermal overload protection limits the total power dissipa-
tion in the device. When the junction temperature exceeds
+165°C (typ), an internal thermal sensor shuts down
the internal bias regulator and the step-down controller,
allowing the IC to cool. The thermal sensor turns on the IC
again after the junction temperature cools by 15°C.
Maxim Integrated
8
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Table 1. Inductor Values vs. (V - V
)
IN
OUT
VIN - VOUT (V)
5.0 to 3.3
0.8
5.0 to 2.5
0.6
5.0 to 1.5
0.47
3.3 to 0.8
0.33
INDUCTOR (µH)
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX16961: inductance value (L),
V
OUT
inductor saturation current (I
), and DC resistance
SAT
(R ). Use the following formulas to determine the
DCR
R1
C1
MAX16962
OUTS
minimum inductor value:
V
3
× 3A
OUT_
L
= V − V
×(
)×
(
)
MIN
IN
OUT_
V
f
IN
OP
R2
where f
is the operating frequency. This value is
OP
2.2MHz unless externally synchronized to a different
frequency.
The next equation ensures that the inductor current
downslope is less than the internal slope compensation.
For this to be the case, the following equation needs to
be satisfied:
Figure 2. Adjustable Output Voltage Setting
Applications Information
m2
2
Setting the Output Voltage
OUT
put voltage (see the Selector Guide). To set the output
to other voltages between 0.8V and 3.6V, connect a
−m ≥
Connect OUTS to V
for factory-programmed out-
where m2 is the inductor current downslope:
resistive divider from output (V
(Figure 2). Select R2 (OUTS to GND resistor) less than
or equal to 100kI. Calculate R1 (V
with the following equation:
) to OUTS to GND
OUT
V
OUT
L
to OUTS resistor)
OUT
and -m is the slope compensation:
V
OUT
R1 = R2
−1
0.8xIMAX
V
OUTS
µs
R1×R2
R1+ R2
where
≤ 7.5kΩ
Solving for L:
where V
table).
= 800mV (see the Electrical Characteristics
OUTS
µs
1.6 × 3A
L
= V
×
MIN2
OUT
The external feedback resistive divider must be frequency
compensated for proper operation. Place a capacitor
across each resistor in the resistive-divider network.
Use the following equation to determine the value of the
capacitors:
The equation that provides the bigger inductor value
must be chosen for proper operation:
L
MIN
= max(L
, L
)
MIN1 MIN2
The maximum inductor value recommended is twice the
chosen value from the above formula.
R2
C1 = 10pF
R1
L
= 2 x L
MIN
MAX
Maxim Integrated
9
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
The maximum inductor value must not exceed the
Output Capacitor
The minimum capacitor required depends on output
voltage, maximum device current capability, and the
error-amplifier voltage gain. Use the following formula to
determine the required output capacitor value:
calculated value from the above formula. This ensures
that the current feedback loop receives the correct
amount of current ripple for proper operation.
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
V
G
REF x EAMP
C
=
OUT(MIN)
2π × f
× V
R
CO
OUT x CS
The input capacitor RMS current requirement (I
defined by the following equation:
) is
RMS
0.8Vx31.7
2π × 210kHz × V
=
OUT×167mΩ
V
(V
− V
)
OUT PV1
OUT
I
= I
RMS LOAD(MAX)
V
PV1
where f , the target crossover frequency, is 210kHz,
CO
G
, the error-amplifier voltage gain, is 31.7V/V, and
EAMP
I
has a maximum value when the input voltage
RMS
R
CS
is 167mΩ.
equals twice the output voltage (V
I
= 2V
), so
OUT
PV1
= I
/2.
PCB Layout Guidelines
RMS(MAX)
LOAD(MAX)
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good PCB
layout:
Choose an input capacitor that exhibits less than +10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
The input-voltage ripple is composed of DV (caused
Q
by the capacitor discharge) and DV
(caused by the
ESR
1) Use a large contiguous copper plane under the
device package. Ensure that all heat-dissipating
components have adequate cooling. The bottom
pad of the device must be soldered down to this
copper plane for effective heat dissipation and
maximizing the full power out of the device. Use
multiple vias or a single large via in this plane for
heat dissipation.
ESR of the capacitor). Use low-ESR ceramic capacitors
with high ripple-current capability at the input. Assume
the contribution from the ESR and capacitor discharge
equal to 50%. Calculate the input capacitance and ESR
required for a specified input voltage ripple using the
following equations:
∆V
ESR
ESR
=
IN
∆I
L
I
+
OUT
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
2
where:
and:
(V
− V
)× V
×L
PV1
V
OUT OUT
× f
∆I
=
L
3) Add small footprint blocking capacitors with low self-
resonance frequency close to PV1, PV2, and PV.
PV1 SW
I
×D(1− D)
V
OUT
V
4) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of input capacitors at PV1, PV2, inductor, and the
output capacitor should be as short as possible.
OUT
C
=
and D =
IN
∆V × f
Q
SW
PV1
where I
duty cycle.
is the maximum output current, and D is the
OUT
It is strongly recommended that a 4.7FF small footprint
be placed close to PV1 and PV2 and a minimum of 100nF
small footprint be placed close to PV. Using a small foot-
print such as 0805 or smaller helps to reduce the total
parasitic inductance.
5) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs. 1oz) to enhance full-load
efficiency.
Maxim Integrated
10
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
6) OUTS is sensitive to noise for devices with external
7) The ground connection for the analog and power
section should be close to the IC. This keeps the
ground current loops to a minimum. In cases where
only one ground is used enough isolation between
analog return signals and high power signals must be
maintained.
feedback option. The resistive network (R1 and R2)
and the capacitive network (C1 and C2) must be
placed close to OUTS and far away from the LX_ node
and high switching current paths. The ground node of
R2 and C2 must be close to GND.
Chip Information
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE
TYPE
PACKAGE OUTLINE
LAND
PATTERN NO.
CODE
T1644+4
U16E+3
NO.
16 TQFN-EP
16 TSSOP-EP
21-0139
21-0108
90-0070
90-0120
Maxim Integrated
11
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Selector Guide
PACKAGE
SUFFIX
OUTPUT
VOLTAGE
SPREAD
SPECTRUM
ROOT PART
OPTION SUFFIX
SYNC IN/OUT
MAX16961
MAX16961
MAX16961
MAX16961
RAUE
SAUE
RATE
SATE
A/V+
A/V+
A/V+
A/V+
Ext. Adj.
Ext. Adj.
Ext. Adj.
Ext. Adj.
Disabled
Enabled
Disabled
Enabled
In
In
In
In
Note: Contact the factory for variants with different output-voltage, spread-spectrum, and power-good delay time settings.
Ordering Information
PART
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
LOAD CURRENT CAPABILITY (A)
PIN-PACKAGE
MAX16961_ATE_/V+
MAX16961_AUE_/V+
4
4
16 TQFN-EP*
16 TSSOP-EP*
Note: “_” is a package suffix placeholder for either “R” or “S”, as shown in the Selector Guide. The 2nd “_” is in the option suffix.
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Maxim Integrated
12
MAX16961
3A, 2.2MHz, Synchronous Step-Down
DC-DC Converter
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
11/12
4/13
0
1
Initial release
—
Added non-automotive parts to Selector Guide
11
Updated input voltage high min spec and input voltage low max spec, Figure 2,
equation, step 6 in the PCB Layout Guidelines section, and the Ordering Information
2
9/13
3–5, 10, 11
2, 3, 9–11
Added FB regulation voltage specifications and updated V condition in Electrical
PV
3
5/14
Characteristics table; corrected equations and updated Table 2 in the Inductor
Selection and Output Capacitor sections; updated Ordering Information
Updated General Description section to make it clear that factory needs to be
contacted for fixed output-voltage trim options
4
5
6/15
7/15
1
Added formula to equation in the Setting the Output Voltage section, replaced the
Output Capacitor section, and deleted Table 2
9, 10
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
13
©
2015 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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