MAX16826_10 [MAXIM]
Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection; 可编程，四串HB LED驱动器，可优化输出电压和故障检测
| 型号： | MAX16826_10 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection |
| 文件： | 总26页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4047; Rev 3; 6 /10
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
General Description
Features
o External MOSFETs Allow Wide-Range LED
The MAX16826 high-brightness LED (HB LED) driver is
designed for backlighting automotive LCD displays and
other display applications such as industrial or desktop
monitors and LCD televisions. The MAX16826 integrates
a switching regulator controller, a 4-channel linear cur-
rent sink driver, an analog-to-digital converter (ADC),
Current with Multiple LEDs per String
o Individual PWM Dimming Inputs per String
o Very Wide Dimming Range
o LED String Short and Open Protection
o Adjustable LED Current Rise/Fall Times Improve
2
and an I C interface. The IC is designed to withstand
automotive load dump transients up to 40V and can
operate under cold crank conditions.
EMI Control
2
o Microcontroller Interface Using I C Allows
LED Voltage Monitoring and Optimization
Using a 7-Bit Internal ADC
LED Short and Open Detection
Dynamic Adjustment of LED String Currents
and Output Voltage
The MAX16826 contains a current-mode PWM switching
regulator controller that regulates the output voltage to
the LED array. The switching regulator section is config-
urable as a boost or SEPIC converter and its switching
frequency is programmable from 100kHz to 1MHz.
Standby Mode
o Integrated Boost/SEPIC Controller
o External Switching Frequency Synchronization
The MAX16826 includes 4 channels of programmable,
fault-protected, constant-current sink driver controllers
that are able to drive all white, RGB, or RGB plus amber
LED configurations. LED dimming control for each chan-
nel is implemented by direct PWM signals for each of the
four linear current sinks. An internal ADC measures the
drain voltage of the external driver transistors and the
output of the switching regulator. These measurements
are then made available through the I2C interface to an
external microcontroller (µC) to enable output voltage
optimization and fault monitoring of the LEDs.
o 4.75V to 24V Operating Voltage Range and
Withstands 40V Load Dump
o Overvoltage and Overtemperature Protection
Ordering Information
PART
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
32 TQFN-EP*
32 TQFN-EP*
MAX16826ATJ+
MAX16826ATJ/V+
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
/V denotes an automotive qualified part.
The amplitude of the LED current in each linear current-
sink channel and the switch-mode regulator output volt-
2
age is programmed using the I C interface. Additional
features include: cycle-by-cycle current limit, shorted
LED string protection, and overtemperature protection.
The MAX16826 is available in a thermally enhanced,
5mm x 5mm, 32-pin thin QFN package and is specified
over the automotive -40°C to +125°C temperature range.
Ordering Information continued at end of data sheet.
Simplified Diagram
V
IN
Applications
LCD Backlighting:
Automotive Infotainment Displays
Automotive Cluster Displays
Industrial and Desktop Monitors
LCD TVs
IN
DL CS
FB
DR4
DIM1
DIM2 DIMMING
DIM3 INPUTS
DIM4
Automotive Lighting:
DR1
Adaptive Front Lighting
DL1
CS1
MAX16826
Low- and High-Beam Assemblies
2
SDA
SCL
I C
INTERFACE
DL4
CS4
Typical Application Circuit and Pin Configuration appear at
end of data sheet.
GND
BOOST LED DRIVER
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
ABSOLUTE MAXIMUM RATINGS
IN to GND (Continuous) .........................................-0.3V to +30V
IN Peak Current (≤ 400ms) ...............................................300mA
IN Continuous Current ........................................................50mA
PGND to GND .......................................................-0.3V to +0.3V
All Other Pins to GND...............................................-0.3V to +6V
DL Peak Current (< 100ns).................................................... 3A
DL Continuous Current..................................................... 50mA
DL1, DL2, DL3, DL4 Peak Current .................................. 50mA
DL1, DL2, DL3, DL4 Continuous Current ........................ 20mA
All Other Pins Current....................................................... 20mA
Continuous Power Dissipation (T = +70°C)
A
32-Pin Thin QFN (derate 34.5mW/°C above +70°C)
Multilayer Board ..........................................................2759mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s)........…………………+300°C
Soldering Temperature (reflow) .......................................+260°C
V
CC
Continuous Current .....................................................50mA
MAX1826
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
IN
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF, T = -40°C to +125°C, unless otherwise noted. Typical values
J
DL_
are at T = +25°C.) (Note 1)
A
PARAMETER
Power-Supply Voltage
Quiescent Current
Shutdown Current
Standby Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
24
UNITS
V
V
V
= 3V
4.75
IN
IN
SYNC
I
DL_ = unconnected; R19, C33 = open
= 0V
5
20
3
10
mA
µA
I
I
V
2
75
IN,SD
IN,SB
SYNC
I C standby activated
mA
2
I C-COMPATIBLE I/O (SCL, SDA)
Input High Voltage
V
1.5
V
V
IH
Input Low Voltage
V
0.5
IL
Input Hysteresis
V
25
10
mV
µA
µA
pF
V
HYS
Input High Leakage Current
Input Low Leakage Current
Input Capacitance
I
V
V
= 5V
= 0V
-1
-1
+1
+1
IH
LOGIC
LOGIC
I
IL
C
IN
OL
OH
Output Low Voltage
Output High Current
V
I
= 3mA
0.4
1
OL
I
V
= 5V
µA
OH
2
I C-COMPATIBLE TIMING
Serial Clock (SCL) Frequency
f
400
kHz
µs
SCL
BUS Free Time Between STOP
and START Conditions
t
1.3
BUF
START Condition Hold Time
STOP Condition Setup Time
Clock Low Period
t
t
0.6
0.6
1.3
0.6
0.3
0.03
0.3
µs
µs
µs
µs
µs
µs
µs
HD:STA
SU:STO
t
LOW
Clock High Period
t
HIGH
Data Setup Time
t
SU:DAT
Data In Hold Time
t
0.9
HD:DATIN
Data Out Hold Time
t
HD:DATOUT
2
_______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF, T = -40°C to +125°C, unless otherwise noted. Typical values
J
IN
DL_
are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Maximum Receive SCL/SDA Rise
Time
t
t
C
C
C
= 400pF
300
ns
R
R
B
B
B
Minimum Receive SCL/SDA Rise
Time
= 400pF
= 400pF
= 400pF
60
300
60
ns
ns
ns
Maximum Receive SCL/SDA Fall
Time
t
F
Minimum Receive SCL/SDA Fall
Time
t
t
C
C
F
B
B
Transmit SDA Fall Time
= 400pF, I = 3mA
60
250
ns
ns
F
O
Pulse Width of Suppressed Spike
INTERNAL REGULATORS (IN, V
t
50
SP
)
CC
0V < I
< 30mA (Note 2),
VCC
V
Output Voltage
V
4.75V < V < 24V, DL, DL1 to DL4
IN
4.5
5.25
5.65
V
CC
VCC
unconnected
V
V
Undervoltage Lockout
Undervoltage Lockout
V
V rising
CC
4.5
205
27.5
V
mV
V
CC
CC
VCC_UVLO
V
135
175
VCC_HYS
Hysteresis
IN Shunt Regulation Voltage
PWM GATE DRIVER (DL)
Peak Source Current
I
= 250mA
24.05
26.0
IN
2
2
A
A
Peak Sink Current
DL High-Side Driver Resistance
DL Low-Side Driver Resistance
Minimum DL Pulse Width
I
I
= -100mA
= +100mA
2.25
1.30
40
Ω
Ω
ns
DL
DL
PWM CONTROLLER, SOFT-START (FB, COMP, OVP)
FB shorted to COMP; MAX16826 only
FB shorted to COMP; MAX16826B only
FB shorted to COMP; MAX16826 only
FB shorted to COMP; MAX16826B only
FB shorted to COMP; MAX16826 only
FB shorted to COMP; MAX16826B only
1.230
1.23
862
1.250
1.25
876
750
2.94
3.9
1.260
1.27
885
FB Voltage Maximum
FB Voltage Minimum
V
V
FB,MAX
V
mV
mV
FB,MIN
735
765
FB Voltage LSB
FB Input Bias Current
I
I
0V < V < 5.5V
FB
-100
0
+100
0.25
nA
FB
SS
Feedback-Voltage Line
Regulation
Level to produce V
= 1.25V,
COMP
%/V
4.5V < V
< 5.5V
VCC
Soft-Start Current
V
= 0.5V
3.2
-100
19
6.0
0
10.4
+100
32
µA
nA
CSS
VCC
OVP Input Bias Current
Slope Compensation
I
0V < V
< 5.5V
OVP
OVP
I
26
µA/µs
SLOPE
_______________________________________________________________________________________
3
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF, T = -40°C to +125°C, unless otherwise noted. Typical values
J
IN
DL_
are at T = +25°C.) (Note 1)
A
PARAMETER
ERROR AMPLIFIER (FB, COMP)
Open-Loop Gain
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
A
80
2
dB
OL
Unity-Gain Bandwidth
Phase Margin
BW
PM
MHz
65
1.9
0.9
Degrees
MAX1826
Sourcing, V
= 3V
COMP
Error-Amplifier Output Current
I
mA
COMP
Sinking, V
= 2V
COMP
COMP Clamp Voltage
V
V
= 0V
3.25
187
250
4.5
217
280
V
COMP
FB
COMP Short-Circuit Current
PWM CURRENT LIMIT (CS)
I
12
mA
COMP_SC
Cycle-by-Cycle Current-Limit
Threshold
V
V
= 0V
200
mV
CL
DL
Cycle-by-Cycle Current-Limit
Propagation Time To DL
t
10mV overdrive
V = 0V
CSS
80
270
80
0
ns
mV
ns
PROP, CL
Gross Current-Limit Threshold
V
GCL
PROP,GCL
Gross Current-Limit Propagation
Time To DL
t
10mV overdrive
0V < V < 5.5V
Input Bias Current
-100
1.60
+100
1.80
nA
CS
PWM OSCILLATOR (RTCT)
RTCT Voltage Ramp (Peak to
Peak)
V
5.5V < V < 24V
1.65
V
RAMP
IN
RTCT Voltage Ramp Valley
Discharge Current
V
5.5V < V < 24V
1.11
7.8
1.20
8.4
1.27
9.1
V
RAMP_VALLEY
IN
I
V
= 2V
RTCT
mA
kHz
DIS
Frequency Range
f
5.5V < V < 24V
100
1000
OSC
IN
SYNCHRONIZATION (SYNC/ENABLE)
Input Rise/Fall Time
200
ns
kHz
V
Input Frequency Range
Input High Voltage
100
1.5
1000
Input Low Voltage
0.5
V
Input Minimum Pulse Width
Input Bias Current
200
-100
13
ns
nA
µs
0V < V
< 5.5V
0
+100
65
SYNC
= 0V
Delay to Shutdown
V
32
SYNC
LED DIMMING (DIM1–DIM4)
Input High Voltage
V
1.5
V
V
DIM,MAX
Input Low Voltage
V
0.5
DIM,MIN
Minimum Dimming Frequency
Input Bias Current
f
I
t
= 2µs (Note 3)
45
Hz
nA
DIM
DIM
ON
0V < V
< 5.5V
-100
0
+100
DIM_
4
_______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF, T = -40°C to +125°C, unless otherwise noted. Typical values
J
IN
DL_
are at T = +25°C.) (Note 1)
A
PARAMETER
ADC (DR1–DR4, OVP)
Maximum Error
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
E
50
mV
µs
MAX
ADC Single Bit Acquisition
Latency
(Note 4)
2
DR Channel Sample Time
OVP Channel Sample Time
Full-Scale Input Voltage
Least Significant Bit
t
190
20
ms
µs
V
DR,SMPL
t
OVP,SMPL
V
1.215
-100
1.24
9.76
0
1.2550
+100
FS
V
mV
nA
LSB
DR Input Bias Current
I
0V < V
< 5.5V
DR_
DR
DRAIN FAULT COMPARATORS (DR1–DR4) (Shorted LED String Comparator)
Drain Fault Comparator
Threshold
V
Voltage to drive DL1–DL4 low
10mV overdrive
1.4
1.52
1
1.63
V
DFTH
Drain Fault Comparator Delay
t
µs
DFD
LINEAR REGULATORS (DL1–DL4, CS1–CS4)
Transconductance
Gm
ΔI = -500µA
75
15
0
mS
mA
nA
Maximum Output Current
CS1–CS4 Input Bias Current
I
I
Sourcing or sinking
DL
CS
0V < V < 5.5V
CS
-100
306
+100
324
CS_ = DL_, FB DAC full scale;
MAX16826 only
316
318
97
CS1–CS4 Regulation Voltage
Maximum
V
mV
CS,MAX
CS_ = DL_, FB DAC full scale;
MAX16826B only
308
90
328
105
109
CS_ = DL_, FB DAC minus full scale;
MAX16826 only
CS1–CS4 Regulation Voltage
Minimum
V
V
mV
mV
CS,MIN
CS,LSB
CS_ = DL_, FB DAC minus full scale;
MAX16826B only
90
99
CS1–CS4 Regulation Voltage LSB
CS_ = DL_, FB DAC 1-bit transition
1.72
Note 1: All devices are 100% production tested at T = +25°C and T = +125°C. Limits to -40°C are guaranteed by design.
J
J
Note 2: I
includes the internal bias currents and the current used by the gate drivers to drive DL, DL1, DL2, DL3, and DL4.
CC
Note 3: Minimum frequency to allow the internal ADC to complete at least one measurement. t
in regulation.
is the on-time with the LED current
ON
Note 4: Minimum LED current pulse duration, which is required to correctly acquire 1 bit.
_______________________________________________________________________________________
5
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Typical Operating Characteristics
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF. T = +25°C, unless otherwise noted.)
A
IN
DL_
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. OSCILLATOR FREQUENCY
SUPPLY CURRENT
vs. TEMPERATURE
16
14
12
10
8
40
30
20
10
0
17
16
15
14
13
12
C
= 4700pF
DL
C33 FROM 680pF TO 8200pF
MAX1826
6
4
2
C
= 4700pF
110
C
= 4700pF
20
DL
85
DL
0
0
4
8
12
16
24
100 200 300 400 500 600 700 800 900 1000
OSCILLATOR FREQUENCY (kHz)
-40
-15
10
35
60
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
OSCILLATOR FREQUENCY
vs. TEMPERATURE
LED OUTPUT CURRENT
vs. TEMPERATURE
360
350
340
330
320
310
300
400
360
320
280
240
200
145
143
141
139
137
135
V
= 0.32V
CS
5.5
9.2
12.9
16.6
20.3
24.0
-40 -15
10
35
60
85
110
0
20
40
60
80
100
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
LED OUTPUT CURRENT
vs. INPUT VOLTAGE
DIM INPUT TO ILED OUTPUT WAVEFORM
MAX16826 toc08
150
120
90
60
30
0
5V/div
0V
V
DIM
100mA/div
0mA
I
LED
0
6
12
18
24
2µs/div
INPUT VOLTAGE (V)
6
_______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
Typical Operating Characteristics (continued)
(V = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
= 0.01µF. T = +25°C, unless otherwise noted.)
A
IN
DL_
V
VOLTAGE
V
VOLTAGE
CC
CC
ENABLE AND DISABLE RESPONSE
vs. LOAD CURRENT
vs. TEMPERATURE
MAX16826 toc09
5.5
5.5
5.4
5.3
5.2
5.1
5.0
5.4
5V/div
V
SYNC/EN
0V
5.3
5.2
5.1
5.0
100mA/div
0mA
I
LED
0
10
20
30
40
50
0
20
40
60
80
100
40ms/div
LOAD CURRENT (mA)
TEMPERATURE (°C)
V
VOLTAGE
SHUNT VOLTAGE
vs. SHUNT CURRENT
CC
vs. SUPPLY VOLTAGE
6
5
4
3
2
1
27.0
26.5
26.0
25.5
25.0
24.5
24.0
0
0
4
8
12
16
20
24
0
50
100
150
200
250
SUPPLY VOLTAGE (V)
SHUNT CURRENT (mA)
SHUNT VOLTAGE
vs. TEMPERATURE
SHUNT REGULATOR LOAD DUMP RESPONSE
MAX16826 toc15
28
27
26
25
24
23
V
SUPPLY
20V/div
0V
10V/div
0V
V
SHUNT
22
-40
-15
10
35
60
85
110
200ms/div
TEMPERATURE (°C)
_______________________________________________________________________________________
7
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Pin Description
PIN
1
NAME
PGND
GND
FUNCTION
Power Ground
Analog Ground
2, 3
Timing Resistor and Capacitor Connection. A resistor, R19 (in the Typical Application Circuit), from V
to
CC
4
RTCT
RTCT and a capacitor C33, from RTCT to GND set the oscillator frequency. See the Oscillator section to
calculate RT and CT component values.
Synchronization and Enable Input. There are three operating modes:
MAX1826
SYNC/EN = LOW: Low current shutdown mode with all circuits shut down except shunt regulator.
SYNC/EN = HIGH: All circuits active with oscillator frequency set by RTCT network.
SYNC/EN = CLOCKED: All circuits active with oscillator frequency set by SYNC clock input. Conversion
cycles initiate on the rising edge of external clock input. The frequency programmed by R19/C33 must be
10% lower than the input SYNC/EN signal frequency.
5
SYNC/EN
Soft-Start Timing Capacitor Connection. Connect a capacitor from CSS to GND to program the required soft-
6
7
8
CSS
COMP
FB
start time for the switching regulator output voltage to reach regulation. See the Soft-Start (CSS) section to
calculate C
.
CSS
Switching Regulator Compensation Component Connection. Connect the compensation network between
COMP and FB.
Switching Regulator Feedback Input. Connect FB to the center of a resistor-divider connected between the
switching regulator output and GND to set the output voltage. FB is regulated to a voltage set by an internal
register. See the Setting Output Voltage section for calculating resistor values.
Switching Regulator Overvoltage Input. Connect OVP to the center of a resistor-divider connected between the
switching regulator output and GND. For normal operation, configure the resistor-divider so that the voltage at
this pin does not exceed 1.25V. If operation under load dump conditions is also required, configure the resistor-
divider so that the voltage at OVP is less than 1.25V.
9
OVP
RSC
Slope Compensation Resistor and PWM Comparator Input Connection. Connect a resistor, R17, from RSC to
the switching current-sense resistor to set the amount of the compensation ramp. See the Slope Compensation
(RSC) section for calculating the value.
10
2
11
12
SDA
SCL
I C Serial Data Input/Output
2
I C Serial Clock Input
LED String 1 Logic-Level PWM Dimming Input. A high logic level on DIM1 enables the current sink to operate at
the maximum current as determined by its sense resistor and internal register value. A low logic level disables
the current source.
13
14
15
DIM1
DIM2
DIM3
LED String 2 Logic-Level PWM Dimming Input. A high logic level on DIM2 enables the current sink to operate at
the maximum current as determined by its sense resistor and internal register value. A low logic level disables
the current source.
LED String 3 Logic-Level PWM Dimming Input. A high logic level on DIM3 enables the current sink to operate at
the maximum current as determined by its sense resistor and internal register value. A low logic level disables
the current source.
LED String 4 Logic-Level PWM Dimming Input. A high logic level on DIM4 enables the current sink to operate at
the maximum current as determined by its sense resistor and internal register value. A low logic level disables
the current source.
16
17
DIM4
CS1
LED String 1 Current-Sense Input. CS1 is regulated to a value set by an internal register. The regulation voltage
can be set between 97mV and 316mV.
8
_______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
Pin Description (continued)
PIN
NAME
FUNCTION
LED String 1 Linear Current Source Output. DL1 drives the gate of the external FET on LED String 1 and has
approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL1 to GND to
compensate the internal transconductance amplifier as well as program the rise and fall times of the LED currents.
18
DL1
LED String 1 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND
2
19
20
DR1
CS2
voltage of the current sink FET. Drain voltage measurement information can be read back from the I C
interface. Connect a voltage-divider to scale drain voltage as necessary.
LED String 2 Current-Sense Input. CS2 is regulated to a value set by an internal register. The regulation voltage
can be set between 97mV and 316mV.
LED String 2 Linear Current Source Output. DL2 drives the gate of the external FET on LED String 2 and has
approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL2 to GND to
compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED
currents.
21
DL2
LED String 2 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND
2
22
23
24
DR2
CS3
DL3
voltage of the current sink FET. Drain voltage measurement information can be read back from the I C
interface. Connect a voltage-divider to scale drain voltage as necessary.
LED String 3 Current-Sense Input. CS3 is regulated to a value set by an internal register. The regulation voltage
can be set between 97mV and 316mV.
LED String 3 Linear Current Source Output. DL3 drives the gate of the external FET on LED String 3 and has
approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL3 to GND to
compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED currents.
LED String 3 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND
2
25
26
27
DR3
CS4
DL4
voltage of the current sink FET. Drain voltage measurement information can be read back from the I C
interface. Connect a voltage-divider to scale drain voltage as necessary.
LED String 4 Current-Sense Input. CS4 is regulated to a value set by an internal register. The regulation voltage
can be set between 97mV and 316mV.
LED String 4 Linear Current Source Output. DL3 drives the gate of the external FET on LED String 4 and has
approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL4 to GND to
compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED currents.
LED String 4 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND
2
28
DR4
voltage of the current sink FET. Drain voltage measurement information can be read back from the I C
interface. Connect a voltage-divider to scale drain voltage as necessary.
Power Supply. IN is internally connected to a 26V shunt regulator that sinks current. In conjunction with an
external resistor it allows time-limited load dump events as high as 40V to be safely handled by the IC. Bypass
IN to GND with a minimum 10µF capacitor.
29
30
31
IN
CS
Current-Sense Input
Gate Driver Regulator Output. Bypass V
to GND with a minimum 4.7µF ceramic capacitor. Gate drive current
CC
V
pulses come from the capacitor connected to V . Place the capacitor as close as possible to V . If IN is
CC
CC
CC
powered by a voltage less than 5.5V, connect V
directly to IN.
CC
32
—
DL
EP
Switching Regulator Gate Driver Output
Exposed Pad. Connect the exposed pad to the ground plane for heatsinking. Do not use this pad as the only
ground connection to the IC.
_______________________________________________________________________________________
9
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Simplified Block Diagram
OVT
REF
OVT
IN
29
26V
SHUNT
OVT
V
CC
28
25
22
19
DR4
DR3
DR2
DR1
7-BIT ADC
AND
SHORTED
STRING
FAULT
DECTECTION
GND
MAX1826
5V
V
31
9
V
CC
CC
OVP
DL 32
OVT
PGND
1
30
8
CS
FB
CS4
CS3
CS2
CS1
26
23
20
17
CURRENT-
MODE
PWM
RSC
CSS
10
6
BLOCK
2
DOUBLE-
BUFFERED
REGISTER
AND DACS
I C
STATE
MACHINE
7
27
COMP
RTCT
DL4
LINEAR
CURRENT-
SINK
24 DL3
4
21
18
DL2
DL1
DRIVERS
SYNC/EN
GND
5
2
GND
3
16
DIM4
MAX16826
SDA
11
15 DIM3
14 DIM2
13 DIM1
SCL 12
use of a small inductor and filter capacitors. The four
current sink regulators use independent external current-
sense resistors to provide constant currents for each
string of LEDs. Four DIM inputs allow a very wide range
of independent pulsed dimming to each LED string. An
internal 7-bit ADC measures the drain voltage of the
external driver transistors to enable output voltage opti-
mization and fault monitoring of the LEDs. The
MAX16826 is capable of driving four strings of LEDs.
The number of LEDs in each string is only limited by the
topology of choice, the rating of the external compo-
nents, and the resolution of the ADC and internal DAC.
Detailed Description
The MAX16826 HB LED driver integrates a switching
regulator controller, a 4-channel linear current sink dri-
2
ver, a 7-bit ADC, and an I C interface. The IC is
designed to operate from a 4.75V to 24V input voltage
range and can withstand automotive load dump tran-
sients up to 40V.
The current-mode switching regulator controller is con-
figurable as a boost or SEPIC converter to regulate the
voltage to drive the four strings of HB LEDs. Its program-
mable switching frequency (100kHz to 1MHz) allows the
10 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
The MAX16826 provides additional flexibility with an
the MAX16826 enters a mode that deactivates the switch-
ing regulator, the soft-start capacitor is discharged so that
soft-start occurs upon reactivation.
2
internal I C serial interface to communicate with a
microcontroller (µC). The interface can be used to
dynamically adjust the amplitude of the LED current in
each LED string and the switch-mode regulator output
voltage. It can also be used to read the ADC drain volt-
age measurements for each string, allowing a µC to
dynamically adjust the output voltage to minimize the
OVP mode occurs when the voltage at OVP is higher than
the internal reference. In OVP mode, the switching regula-
tor gate-drive output is latched off and can only be
restored by cycling enable, power, or entering standby
mode.
2
power dissipation in the LED current sink FETs. The I C
interface can also be used to detect faults such as LED
short or open.
Switching Preregulator Stage
The MAX16826 features a current-mode controller that
is capable of operating in the frequency range of
100kHz to 1MHz. Current-mode control provides fast
response and simplifies loop compensation.
Modes of Operation
The MAX16826 has six modes of operation: normal
mode, undervoltage lockout (UVLO) mode, thermal
shutdown (TSD) mode, shutdown (SHDN) mode,
standby (STBY) mode, and overvoltage protection
(OVP) mode.
Output voltage regulation can be achieved in a two-
loop configuration. A required conventional control loop
can be set up by using the internal error amplifier with
its inverting input connected to FB. The bandwidth of
this loop is set to be as high as possible utilizing con-
ventional compensation techniques. The noninverting
input of this amplifier is connected to a reference volt-
The normal mode is the default state where each cur-
rent sink regulator is maintaining a constant current
through each of the LED strings. Digitized voltage feed-
back from the drains of the current sink FETs can be
used to establish a secondary control loop by using an
external µC to control the output of the switching stage
for the purpose of achieving low-power dissipation
across these FETs.
2
age that is dynamically adjustable using the I C inter-
face. The optional slower secondary loop consists of
2
the external µC using the I C interface reading out the
voltages at the drains of the current sink FETs and
adjusting the reference voltage for the error amplifier.
UVLO mode occurs when V
goes below 4.3V. In
VCC
To regulate the output voltage, the error amplifier com-
pares the voltage at FB to the internal 1.25V (adjustable
UVLO mode, each of the linear current sinks and the
switching regulator is shut down until the input voltage
exceeds the rising UVLO threshold.
2
down by using the I C interface) reference. The output
of the error amplifier is compared to the sum of the cur-
rent-sense signal and the slope compensation ramp at
RSC to control the duty cycle at DL.
TSD mode occurs when the die temperature exceeds
the internally set thermal limit (+160°C). In TSD mode,
each of the linear regulators and the switching regulator
is shut down until the die temperature cools by 20°C.
Two current-limit comparators also monitor the voltage
across the sense resistor using CS. If the primary cur-
rent-limit threshold is reached, the FET is turned off and
remains off for the reminder of the switching cycle. If
the current through the FET reaches the secondary cur-
rent limit, the switching cycle is terminated and the soft-
start capacitor is discharged. The converter then
restarts in soft-start mode preventing inductor current
runaway due to the delay of the primary cycle-by-cycle
current limit. The switching regulator controller also fea-
tures an overvoltage protection circuit that latches the
gate driver off if the voltage at OVP exceeds the inter-
nal 1.25V reference voltage.
SHDN mode occurs when SYNC/EN is driven low. In
SHDN mode, all internal circuitry with the exception of
the shunt regulator is deactivated to limit current draw
to less than 50µA. SHDN mode disengages when
SYNC/EN is driven high or clocked.
2
STBY mode is initiated using the I C interface. In STBY
mode, each of the linear current sinks and the switching
regulator is shut down. STBY mode is also deactivated
2
using the I C interface. In STBY mode, the internal V
CC
regulator and the shunt regulator remain active. Whenever
______________________________________________________________________________________ 11
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
For stable operation, the shunt regulator requires a min-
imum 10µF of ceramic capacitance from IN to GND.
Shunt Regulator
The MAX16826 has an internal 26V (typ) shunt regula-
tor to provide the primary protection against an auto-
motive load dump. When the input voltage is below
26V, the shunt voltage at IN tracks the input voltage.
When the input voltage exceeds 26V, the shunt regula-
tor turns on to sink current, and the voltage at IN is
clamped to 26V. During a load dump, the input voltage
can reach 40V, and the shunt regulator through the
resistor connected to IN is forced to sink large amounts
of current for up to 400ms to limit the voltage that
appears at IN to the shunt regulation voltage. The sink-
ing current of the shunt regulator is limited by the value
of resistor (R1 in Figure 1) in series with IN. There are
two criteria that determine the value of R1: the maxi-
mum acceptable shunt current during load dump, and
the voltage drop on R1 under normal operating condi-
tions with low battery voltage. For example, with typical
20mA input current in normal operation, 250mA load
dump current limit, 40V maximum load dump voltage,
the R1 value is:
V
Regulator
CC
The 5.25V V
regulator provides bias for the internal
CC
circuitry including the bandgap reference and gate dri-
vers. Externally bypass V with a minimum 4.7µF
CC
ceramic capacitor. V
has the ability to supply up to
CC
50mA of current, but external loads should be mini-
mized so as not to take away drive capability for inter-
nal circuitry. If IN is powered by a voltage less than
MAX1826
5.5V, connect V
directly to IN.
CC
Switch-Mode Controller
The MAX16826 consists of a current-mode controller
that is capable of operating in the 100kHz to 1MHz fre-
quency range (Figure 2). Current-mode control pro-
vides fast response and simplifies loop compensation.
The error amplifier compares the voltage at FB to 1.25V
and varies the COMP output accordingly to regulate.
The PWM comparator compares the voltage at COMP
with the voltage at RSC to determine the switching duty
cycle. The primary cycle-by-cycle current-limit com-
parator interrupts the on-time if the sense voltage is
larger than 200mV. When the sense voltage is larger
than 270mV, the secondary gross current-limit com-
parator is activated to discharge the soft-start capaci-
tor. This forces the IC to re-soft-start preventing
inductor current runaway due to the delay of the prima-
ry cycle-by-cycle current limit.
V
− V
INREG
7.5 − 5.5
20 ×10−3
INMIN
R1=
=
= 100Ω
I
Q
where V
INREG
is the minimum operating voltage and
INMIN
V
is the minimum acceptable voltage at IN.
Use the following equation to verify that the current
through R1 is less than 250mA under a load-dump con-
dition:
The switch-mode controller also features a low current
shutdown mode, adjustable soft-start, and thermal
shutdown protection.
V
− 26V 40 − 26
LD
I
=
=
= 140mA
LD
R1
100
R1
IN
V
IN
C4
+
-
5V
REFERENCE
MAX16826
Figure 1. Shunt Regulator Block Diagram
12 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
FB
ERROR AMPLIFIER
V
CC
-
COMP
+
ANALOG
MUX
6µA
-
CSS
+
SOFT-START COMPARATOR
2
I C BUS
SWR DAC
1.25V
OVP
V
CC
SET
-
10µA
Q
S
+
R
Q
PWM COMPARATOR
-
SET
OVP COMPARATOR
CLR
DL
Q
S
+
R
Q
CLR
SHDN
STBY
SYNC
RTCT
CS
OSCILLATOR
MAX16826
200mV
270mV
+
-
+
-
CURRENT-
RAMP
GENERATOR
CURRENT-LIMIT
COMPARATORS
26µA/µs
RSC
Figure 2. Switch Regulator Controller Block Diagram
______________________________________________________________________________________ 13
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Oscillator
The MAX16826 oscillator frequency is programmable
using an external capacitor (C33 in the Typical
Application Circuit) and a resistor (R19) at RTCT. R19 is
Current Limit (CS)
The MAX16826 includes a primary cycle-by-cycle, cur-
rent-limit comparator and a secondary gross current-
limit comparator to terminate the on-time or switch
cycle during an overload or fault condition. The current-
sense resistor (R12 in the Typical Application Circuit)
connected between the source of the switching FET
and GND and the internal threshold, set the current
limit. The current-sense input (CS) has a voltage trip
connected from RTCT to V
and C33 is connected
CC
from RTCT to GND. C33 charges through RT until V
RTCT
reaches 2.85V. CT then discharges through an 8.4mA
internal current sink until V drops to 1.2V. C33 is
RTCT
then allowed to charge through R19 again. The period
of the oscillator is the sum of the charge and discharge
times of C3. Calculate these times as follows:
level (V ) of 200mV. Use the following equation to cal-
CS
MAX1826
culate R39:
The charge time is:
R12 = V /I
CS PK
t = 0.55 x R19 x C33
where I
is the peak current that flows through the
PK
C
switching FET. When the voltage across R12 exceeds
the current-limit comparator threshold, the FET driver
(DL) turns the switch off within 80ns. In some cases, a
small RC filter may be required to filter out the leading-
edge spike on the sensed waveform. Set the time con-
stant of the RC filter at approximately 100ns and adjust
as needed.
The discharge time is:
t
= R19 × C33 × ln R19 − 281.86 R19 − 487.45
(
) (
)
)
(
D
where t and t is in seconds, R19 is in ohms (Ω), and
C33 is in farads (F).
C
D
The oscillator frequency is then:
If, for any reason, the voltage at CS exceeds the 270mV
trip level of the gross current limit as set by a second
comparator, then the switching cycle is immediately
terminated and the soft-start capacitor is discharged.
This allows a new soft-start cycle and prevents inductor
current buildup.
1
+ t
D
f
=
OSC
t
C
The charge time (t ) in relation to the period (t + t )
C
C
D
sets the maximum duty cycle of the switching regulator.
Therefore, the charge time (t ) is constrained by the
C
Soft-Start (CSS)
Soft-start is achieved by charging the external soft-start
capacitor (C30 in the Typical Application Circuit) at
startup. An internal fixed 6µA current source charges
desired maximum duty cycle. Typically, the duty cycle
should be limited to 95%. The oscillator frequency is
programmable from 100kHz to 1MHz. The MAX16826
can be synchronized to an external oscillator through
SYNC/EN.
the soft-start capacitor until V
reaches V . To
CC
CSS
achieve the required soft-start timing for the switching
regulator output voltage to reach regulation, the value
of the soft-start capacitor at CSS is calculated as:
Slope Compensation (RSC)
The MAX16826 uses an internal ramp generator for
slope compensation to stabilize the current loop when
the duty cycle exceeds 50%. A slope compensation
resistor (R17 in the Typical Application Circuit) is con-
nected between RSC and the switching current-sense
resistor at the source of the external switching FET.
When the voltage at DL transitions from low to high, a
ramped current with a slope of 26µA/µs is generated
and flows through the slope compensation resistor. It is
effectively summed with the current-sense signal. When
the voltage at DL is low, the current ramp is reset to 0.
Calculate R17 as follows:
C30 = 6µA x t /V
SS REF
where t is the required time to achieve the switching
SS
regulator output regulation and V
is the set FB regu-
REF
lation voltage. When the IC is disabled, the soft-start
capacitor is discharged to GND.
Synchronization and Enable Input
The SYNC/EN input provides both external clock syn-
chronization (if desired) and enable control. When
SYNC/EN is held low, all circuits are disabled and the
IC enters low-current shutdown mode. When SYNC/EN
is high, the IC is enabled and the switching regulator
clock uses the RTCT network to set the operating fre-
quency. See the Oscillator section for details. The
SYNC/EN can also be used for frequency synchroniza-
tion by connecting it to an external clock signal from
100kHz to 1MHz. The switching cycle initiates on the
(V
− V
) ×R12
34.28 ×L1
OUT
INMIN
R17 =
where V
INMIN
is the switching regulator output and
is the minimum operating input voltage.
OUT
V
14 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
rising edge of the clock. When using external synchro-
nization, the clock frequency set by RTCT must be 10%
lower than the synchronization signal frequency.
(Q2 to Q5 in the Typical Application Circuit). The source of
each MOSFET is connected to GND through a current-
sense resistor. CS1–CS4 are connected to the respective
inverting input of the amplifiers and also to the source of
the external current sink FETs where the LED string cur-
rent-sense resistors are connected. The noninverting input
of each amplifier is connected to the output of an internal
Overvoltage Protection (OVP)
OVP limits the maximum voltage of the switching regu-
lator output for protection against overvoltage due to
circuit faults, for example a disconnected FB. Connect
OVP to the center of a resistor-divider connected
between the switching regulator output and GND to set
the output-voltage OVP limit. Typically, the OVP output
voltage limit is set higher than the load dump voltage.
2
DAC. The DAC output is programmable using the I C inter-
face to output between 97mV and 316mV. The regulated
string currents are set by the value of the current-sense
resistors (R28 to R31 in the Typical Application Circuit) and
the corresponding DAC output voltages.
Calculate the value of R15 and R16 as follows:
LED PWM Dimming (DIM1–DIM4)
The MAX16826 features a versatile dimming scheme for
controlling the brightness of the four LED strings.
Independent LED string dimming is accomplished by dri-
ving the appropriate DIM1–DIM4 inputs with a PWM sig-
nal with a frequency up to 100kHz. Although the
brightness of the corresponding LED string is proportional
to the duty cycle of its respective PWM dimming signal,
finite LED current rise and fall times limit this linearity when
the dim pulse width approaches 2µs. Each LED string
can be independently controlled. Simultaneous control of
the PWM dimming and the LED string currents in an ana-
log way over a 3:1 range provides great flexibility allowing
independent two-dimensional brightness control that can
be used for color point setup and brightness control.
R15 = (V
/1.25 - 1) x R16
OVP
Or to calculate V
:
OVP
V
OVP
= 1.25 x (1 + R15/R16)
where R15 and R16 are shown in the Typical Application
Circuit. The internal OVP comparator compares the volt-
age at OVP with the internal reference (1.25V typ) to
decide if an overvoltage error occurs. If an overvoltage
error is detected, switching stops, the switching regula-
tor gate-drive output is latched off, and the soft-start
capacitor is discharged. The latch can only be reset by
2
toggling SYNC/EN, activating the I C standby mode, or
cycling power.
The internal ADC also uses OVP to sense the switching
regulator output voltage. Output voltage measurement
Analog-to-Digital Converter (ADC)
The MAX16826 has an internal ADC that measures the
drain voltage of the external current sink driver FETs
(Q2 to Q5 in the Typical Application Circuit) using
DR1 - DR4 and the switching regulator output voltage
using OVP. Fault monitoring and switching stage out-
put-voltage optimization is possible by using an exter-
nal microcontroller to read out these digitized voltages
2
information can be read back from the I C interface.
Voltage is digitized to 7-bit resolution.
Undervoltage Lockout (UVLO)
When the voltage at V
is below the V
undervolt-
CC
CC
age threshold (V
, typically 4.3V falling), the
VCC_UVLO
MAX16826 enters undervoltage lockout. V
UVLO
CC
forces the linear regulators and the switching regulator
into shutdown mode until the V voltage is high
2
through the I C interface. The ADC is a 7-bit SAR (suc-
CC
enough to allow the device to operate normally. In V
cessive-approximation register) topology. It sequential-
ly samples and converts the drain voltage of each
CC
UVLO, the V
regulator remains active.
CC
channel and V
. An internal 5-channel analog MUX
OVP
Thermal Shutdown
is used to select the channel the ADC is sampling.
Conversions are driven by an internally generated
1MHz clock and gated by the external dimming sig-
nals. After a conversion, each measurement is stored
into its respective register and can be accessed
The MAX16826 contains an internal temperature sensor
that turns off all outputs when the die temperature
exceeds +160°C. The outputs are enabled again when
the die temperature drops below +140°C. In thermal
shutdown, all internal circuitry is shut down with the
exception of the shunt regulator.
2
through the I C interface. The digital circuitry that con-
trols the analog MUX includes a 190ms timer. If the
ADC does not complete a conversion within this 190ms
measurement window then the analog MUX will
sequence to the next channel. For the ADC to complete
one full conversion, the cumulative PWM dimming on-
time must be greater than 10µs within the 190ms mea-
surement window. The minimum PWM dimming on-time
Linear Current Sources
(CS1–CS4, DL1–DL4)
The MAX16826 uses transconductance amplifiers to con-
trol each LED current sink. The amplifier outputs
(DL1–DL4) drive the gates of the external current sink FETs
______________________________________________________________________________________ 15
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
is 2µs, so the ADC requires at least 5 of these minimum
pulses within the 190ms measurement window to com-
plete a conversion. During PWM dimming, LED current
pulse widths of less than 2µs are possible, but the ADC
may not have enough sampling time to complete a con-
version in this scenario and the corresponding data may
be incomplete or inaccurate. Therefore, adaptive volt-
age optimization may not be possible when the LED
current-pulse duration is less than 2µs. The LED current
pulse duration is shorter than the pulse applied at the
DIM_ inputs because of the LED turn-on delay.
exceeded, the shorted string is latched off and the cor-
responding bit of register OAh is set.
After the internal ADC completes a conversion, the
result is stored in the corresponding register and can
be read out by the external µC. The µC then compares
the conversion data with the preset limit to determine if
there is a fault.
When an LED string opens, the voltage at the corre-
sponding current-sink FET drain node goes to 0V.
However, the ADC can only complete a conversion if
the LED current comes into regulation. If an LED string
opens before the LED current can come into regulation,
the ADC cannot complete a conversion and the MSB
(eighth bit) is set to indicate an incomplete conversion
or timeout condition. Thus, an examination of the MSB
provides an indication that the LED string is open. If the
LED string opens after the LED current is in regulation,
the ADC can make conversions and reports that the
drain voltage is 0V. Therefore, to detect an open condi-
tion, monitor the MSB and the ADC measurement. If the
MSB is set and the CS_ on-time is greater than 2µs, or
if the ADC measures 0 at the drain, then there is an
open circuit.
MAX1826
Faults and Fault Detection
The MAX16826 features circuitry that automatically
detects faults such as overvoltage or shorted LED string.
An internal fault register at the address OAh is used to
record these faults. For example, if a shorted LED string
is detected, the corresponding fault register bit is set and
the faulty output is shut down.
Shorted LED strings are detected with fast comparators
connected to DR1–DR4. The trip threshold of these
comparators is 1.52V (typ). When this threshold is
ADC
DAC
EXTERNAL
EVENTS
REGISTER
FILE UNIT
OVP
SYSTEM
CLOCK
POWER
MANAGEMENT
2
I C
Figure 3. Digital Block Diagram
Table 1. ADC Response
CONDITION
ADC RESPONSE
Load full-scale code into register, no conversions on affected channel until power or enable is
cycled.
Shorted string fault
Shorted string fault while
converting
Immediately load full-scale code into register and cease conversion effort on this channel until
power or enable is cycled.
2
ADC register read when it is
being updated
Previous sample is shifted out through the I C interface and then the register is updated with the
new measurement.
UVLO
STBY
SHDN
Immediately terminate conversions, do not update current register.
Immediately terminate conversions, do not update current register.
Immediately terminate conversions, do not update current register.
16 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
ADC and 1 bit to indicate a timeout during the ADC
Overview of the Digital Section
conversion cycle.
Figure 3 shows the block diagram of the digital section in
2
•
Adjustment of the switching regulator output. This is
used for adaptive voltage optimization to improve
overall efficiency. The switching regulator output is
downward adjustable by changing its reference
voltage. This uses a 7-bit register.
the MAX16826. The I C serial interface provides flexible
control of the IC and is in charge of writing/reading
to/from the register file unit. The ADC block is a 7-bit
5-channel SAR ADC. The eighth bit of the ADC data reg-
ister indicates an incomplete conversion or timeout has
occurred. This bit is set whenever the LED current fails to
come into regulation during the DIM PWM on-time. This
indicates there is either an LED open condition or the
CS_ on-time is less than 2µs.
•
Adjustment of the reference voltage of the current-
sink regulators. The reference voltage at the nonin-
verting input of each of the linear regulator drive
amplifiers can be changed to make adjustments in
the current of each LED string for a given sense
resistor. The output can be adjusted down from a
maximum of 316mV to 97mV in 1.72mV increments.
A reason for this among other possibilities is an open
LED string condition. This eighth or MSB bit can be
tested to determine open string faults.
•
•
Fault reporting. When a shorted string fault or an
overvoltage fault occurs, the fault is recorded.
2
I C Interface
2
The MAX16826 internal I C serial interface provides
flexible control of the amplitude of the LED current in
each string and the switch-mode regulator output volt-
age. It is also able to read the current sink FET drain
voltages, as well as the switching regulator output volt-
age through OVP and thus enable some fault detection
and power dissipation minimization. By using an exter-
nal µC, the MAX16826 internal control and status regis-
ters are also accessed through the standard
Standby mode. When a one is entered into the
standby register the IC goes into standby mode.
2
2
The 7-bit I C address is 58h and the 8-bit I C address
is B1h for a read operation and B0h for a write opera-
tion. Address the MAX16826 using the I C interface to
read the state of the registers or to write to the registers.
Upon a read command, the MAX16826 transmits the
data in the register that the address register is pointing
to. This is done so that the user has the ability to confirm
the data written to a register before the output is
enabled. Use the fault register to diagnose any faults.
2
2
bidirectional, 2-wire, I C serial interface.
2
The I C interface provides the following I/O functions
and programmability:
•
Current sink FET drain and switching regulator out-
put-voltage measurement. The measurement for
each channel and the regulator output is stored in
its respective register and can be accessed
Serial Addressing
2
The I C interface consists of a serial data line (SDA)
and a serial clock line (SCL) to achieve bidirectional
communication between the master and the slave. The
MAX16826 is a slave-only device, relying upon a mas-
ter to generate a clock signal. The master initiates data
transfer to and from the MAX16826 and generates SCL
to synchronize the data transfer (Figure 4).
2
through the I C interface. The SAR ADC measures
the drain voltage of each current sink FET sequen-
tially. This uses one 8-bit register for each channel
to store the measurement made by the 7-bit SAR
SDA
t
BUF
t
SU,STA
t
SU,DAT
t
HD,STA
t
LOW
t
SU,STO
t
HD,DAT
t
SCL
t
HIGH
HD,STA
t
R
t
F
START
CONDITION
STOP
CONDITION
START CONDITION
REPEATED START CONDITION
Figure 4. 2-Wire Serial Interface Timing Detail
______________________________________________________________________________________ 17
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
2
I C is an open-drain bus. Both SDA and SCL are bidi-
rectional lines, connected to a positive supply voltage
using a pullup resistor. They both have Schmitt triggers
and filter circuits to suppress noise spikes on the bus to
ensure proper device operation.
Bit Transfer
Each data bit, from the most significant bit to the least
significant bit, is transferred one by one during each
clock cycle. During data transfer, the SDA signal is
allowed to change only during the low period of the
SCL clock and it must remain stable during the high
period of the SCL clock (Figure 5).
A bus master initiates communication with the
MAX16826 as a slave device by issuing a START con-
dition followed by the MAX16826 address. The
MAX16826 address byte consists of 7 address bits and
a read/write bit (R/W). After receiving the proper
address, the MAX16826 issues an acknowledge bit by
pulling SDA low during the ninth clock cycle.
Acknowledge
The acknowledge bit is used by the recipient to hand-
shake the receipt of each byte of data (Figure 6). After
data transfer, the master generates the acknowledge
clock pulse and the recipient pulls down the SDA line
during this acknowledge clock pulse, such that the
SDA line stays low during the high duration of the clock
pulse. When the master transmits the data to the
MAX16826, it releases the SDA line and the MAX16826
takes the control of SDA line and generates the
acknowledge bit. When SDA remains high during this
9th clock pulse, this is defined as the not acknowledge
signal. The master then generates either a STOP condi-
tion to abort the transfer, or a repeated START condi-
tion to start a new transfer.
MAX1826
START and STOP Conditions
Both SCL and SDA remain high when the bus is not
busy. The master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the MAX16826, it
issues a STOP (P) condition by transitioning SDA from
low to high while SCL is high. The bus is then free for
another transmission (Figure 4). Both START and STOP
conditions are generated by the bus master.
SCL
SDA
STOP
CONDITION
(P)
DATA LINE STABLE
DATA VALID
DATA ALLOWED
TO CHANGE
START
CONDITION
(S)
Figure 5. Bit Transfer
START CONDITION
CLOCK PULSE FOR ACKNOWLEDGMENT
2
8
9
1
SCL
SDA
BY MASTER
S
SDA
BY SLAVE
Figure 6. Acknowledge
18 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
Read Byte(s)
Accessing the MAX16826
The communication between the µC and the MAX16826
is based on the usage of a set of protocols defined on
The read sequence is:
1) The master sends a START condition.
2
top of the standard I C protocol definition. They are
2) The master sends the 7-bit slave address plus a
write bit (low).
exclusively write byte(s) and read byte(s).
Write Byte(s)
3) The addressed slave asserts an ACK on the data
line.
The write byte protocol is as follows:
1) The master sends a START condition.
4) The master sends an 8-bit command byte.
5) The active slave asserts an ACK on the data line.
6) The master sends a repeated START condition.
2) The master sends the 7-bit slave address followed
by a write bit (low).
3) The addressed slave asserts an ACK by pulling
SDA low.
7) The master sends the 7-bit slave address plus a
read bit (high).
4) The master sends an 8-bit command code.
5) The slave asserts an ACK by pulling SDA low.
6) The master sends an 8-bit data byte.
8) The addressed slave asserts an ACK on the data
line.
9) The slave sends an 8-bit data byte.
7) The slave acknowledges the data byte.
10) The master asserts a NACK on the data line to
complete operations or asserts an ACK and
repeats 9 and 10.
8) The master generates a STOP condition or repeats
6 and 7 to write next byte(s).
11) The master generates a STOP condition.
The command is interpreted as the destination address
(register file unit) and data is written in the addressed
location. The slave asserts a NACK at step 5 if the com-
mand is not valid. The master then interrupts the com-
munication by issuing a STOP condition. If the address
is correct, the data byte is written to the addressed reg-
ister. After the write, the internal address pointer is
increased by one. When the last location is reached, it
cycles to the first register.
The data byte read from the device is the content of the
addressed location(s). Once the read is done, the inter-
nal pointer is increased by one. When the last location is
reached, it cycles to the first one. If the device is busy or
the address is not correct (out of memory map), the
command code is not acknowledged and the internal
address pointer is not altered. The master then inter-
rupts the communication by issuing a STOP condition.
WRITE BYTE FORMAT
S
SLAVE ADDRESS
7 BITS
R/W ACK
0
COMMAND
8 BITS
ACK
DATA
ACK
P
8 BITS
COMMAND BYTE: SELECT REGISTER TO WRITE
DATA BYTE DATA GOES INTO THE REGISTER
SET BY THE COMMAND BYTE
Figure 7. Write Byte Format
READ BYTE FORMAT
S
SLAVE ADDRESS
7 BITS
R/W ACK
0
COMMAND
8 BITS
ACK SR
SLAVE ADDRESS
7 BITS
R/W ACK
1
DATA
8 BITS
NACK
P
COMMAND BYTE: PREPARE DEVICE FOR
FOLLOWING READ
DATA BYTE DATA COMES FROM THE
REGISTER SET BY THE COMMAND BYTE
Figure 8. Read Byte Format
______________________________________________________________________________________ 19
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Register File Unit
The register file unit is used to store all the control infor-
mation from the SDA line and configure the MAX16826
for different operating conditions. The register file
assignments of the MAX16826 are in Table 2.
The FB reference voltage can be decreased from 1.25V,
its maximum value, by approximately 2.9mV steps. The
steady-state voltage at FB then is regulated to:
V
FB
= 1.25V - (2.91mV x 04h[6:0])
Registers 05h to 08h: External Current-Sink
FET Drain Voltage ADC Readings
Registers 00h to 03h: String Current Programming
These registers are used to program LED string 1 to
LED string 4 current sink values. For each LED string,
CS1–CS4 inputs are connected to the source of the
external current sink FET and internally are connected
to the inverting input of the internal transconductance
amplifier. The noninverting input of this amplifier is con-
nected to the output of an internal DAC programmed
by these registers. As the DAC is incremented, its out-
put voltage decreases from 316mV to 97mV in 1.72mV
steps by the data written in the register 00h to 03h;
thus, the steady-state voltage at CS1–CS4 is given by
the following formula:
These registers store the drain voltages of the external
current sink FETs. For each register, bits 6–0 are the
conversion data of the ADC outputs. Bit 7 is used to
show if the conversion is terminated by the ADC (indi-
cated by 0) or if there is an internal timeout (indicated
by 1). If the drain voltage exceeds the preset reference
voltage, the corresponding LED string fault bit is assert-
ed. See the Faults and Fault Detection section for more
information on the internal timeout function.
MAX1826
Register 09h: Switching Regulator
Voltage ADC Output
Bits 6-0 of this register store the voltage present at
OVP. This voltage is a scaled down version of the
switching regulator output voltage. Bit 7 is not used.
V
= 316mV - (1.72mV x RegisterValue[6:0])
CS1,2,3,4
For example, if 00h is set to 20h, then the CS1 voltage is:
V
CS1
= 316mV - 1.72mV x 32 = 265.3mV
Register 0Ah: Fault Status Register
This register stores all the external events or fault infor-
mation such as overvoltage and shorted LED string
faults. The fault events are logged only if the system is
not in standby mode and their active states are longer
than one clock cycle. Cycle enable or power to clear the
fault status register. Initiating standby mode using the
Register 04h: Switching Regulator
Output Programming
Set the switching regulator output voltage by connect-
ing FB to the center of a resistive voltage-divider
between the switching regulator output and GND. V
FB
is regulated to a voltage from 876mV to 1.25V (typ) set
2
2
by the register 04h through the I C interface.
I C interface can also be used to clear the fault status
Table 2. Register File Assignments
REGISTER
ADDRESS
USED BIT
RANGE
RESET
VALUE
R/W
DESCRIPTION
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
R/W
R/W
R/W
R/W
R/W
R
[6:0]
[6:0]
[6:0]
[6:0]
[6:0]
[7:0]
[7:0]
[7:0]
[7:0]
[6:0]
[5:0]
[0]
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
—
LED String 1 current programming value.
LED String 2 current programming value.
LED String 3 current programming value.
LED String 4 current programming value.
Switching regulator output voltage programming value.
LED String 1 external FET drain voltage ADC output.
LED String 2 external FET drain voltage ADC output.
LED String 3 external FET drain voltage ADC output.
LED String 4 external FET drain voltage ADC output.
OVP voltage, ADC output.
R
R
R
R
R
Fault status register.
R/W
R
Device standby command.
[2:0]
Device revision code.
20 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
register. First, activate standby mode and then deacti-
Calculating the Value of Peak
Current-Limit Resistor
2
vate this mode using the I C interface. Next, perform a
read operation on the fault status register. The old fault
information is reported in this first read operation. The
conclusion of the read operation clears the data con-
tained in the register. Subsequent read operations con-
firm that the fault status register has been cleared.
The value of R12 sets the peak switching current that
flows in the switching FET (Q1). Set the value of resistor
R12 using the equation below:
R12 = 0.19/(1.2 x I
)
PK
where I is the peak inductor current at minimum input
PK
voltage and maximum load.
The description of this register is as follows:
Bit 0: Overvoltage sense flag. This flag is set if the volt-
age at OVP exceeds 1.25V; switching stops until power
or the enable or standby is cycled.
Boost Inductor Value
The value of the boost inductor is calculated using the
following equation:
• Bit 1: Not used.
V
× V
− V
(
)
• Bit 2: LED string 1 shorted flag. A diode short in LED
string 1 has been detected if this bit is set.
INMIN
OUT INMIN
L1 =
V
× f
× ∆I
OUT
SW L
• Bit 3: LED string 2 shorted flag. A diode short in LED
string 2 has been detected if this bit is set.
where V
is the minimum input voltage, V
is the
INMIN
OUT
desired output voltage, and f
is the switching fre-
SW
• Bit 4: LED string 3 shorted flag. A diode short in LED
string 3 has been detected if this bit is set.
quency, and ∆I is the peak-to-peak ripple in the boost
L
inductor. Higher inductor values lead to lower ripple but
at a higher cost and size. Choose an inductor value
that gives peak-to-peak ripple current in the order of
30% to 40% of the average current in the inductor at
low-line and full-rated load. This choice of inductor is a
compromise between cost, size, and performance for
the boost converter.
• Bit 5: LED string 4 shorted flag. A diode short in LED
string 4 has been detected if this bit is set.
Register 0Bh Bit 0: Device Standby Command
When register 0Bh bit 0 is set to 1, the IC enters a low-
current standby mode. In this mode, the system clock is
off and no operation is allowed. Set this bit to 0 to leave
standby mode and back to normal operation mode.
Setting Output Voltage
Set the switch regulator output voltage by connecting
FB to the center of a resistive voltage-divider between
Register 0Ch Bit 2-0: Device Revision Code
These 3 bits are a hardwired value that identifies the
IC’s revision.
the switching regulator output and GND. V is regulat-
FB
ed to a voltage from 0.88V to 1.25V (typ) set by an
2
internal register through the I C interface. Choose R13
Applications Information
and R14 in the Typical Application Circuit for a reason-
able bias current in the resistive divider and use the fol-
lowing formula to set the output voltage:
Programming LED Currents
The MAX16826 uses sense resistors (R28, R29, R30,
R31 in the Typical Application Circuit) to set the output
current for each LED string. To set the LED current for a
particular string, connect a sense resistor across the
corresponding current-sense input (CS1–CS4) and
GND. For optimal accuracy, connect the low-side of the
current-sense resistors to GND with short traces. The
value needed for the sense resistor for a given current
is calculated with the equation below:
V
OUT
= (1 + R13/R14) x V
FB
where V is the regulated voltage set by the internal
FB
register.
Adaptive Voltage Optimization
The availability of the digitized switching regulator output
voltage and current sink drain voltages and the ability to
change the switching regulator output voltage provide
the ability to do adaptive voltage optimization. A slow
digital control loop is established with an external µC
closing the loop. Firmware residing in the external µC is
tasked to read each one of the current sink FET drain
voltages and select the minimum value of the four LED
strings. The minimum value is subtracted from the scaled
output voltage reading, and then the switching regulator
output is forced to maintain the difference required to
provide current regulation in the current sink FETs.
R31 = V
/I
CS1 OUT1
where V
can be set from 97mV to 316mV by the
2
CS1
internal registers through the I C interface and I
the desired LED string 1 current.
is
OUT1
______________________________________________________________________________________ 21
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
The SEPIC topology is more complex than the simple
boost topology and it requires the use of two additional
energy storage components, L2 and C25, in Figure 9.
SEPIC Topology
The SEPIC power topology is very useful when the
input voltage is expected to be higher or lower than the
output voltage of the switching regulator stage as
required by the number of LEDs used in a single string.
L1
C25
MAX1826
D1
L2
V
OUT
V
IN
Q1
R11
R13
R14
R15
R16
C28
C26
R32
R34
R35
R33
R17
R12
C27
R26
GND
GND
GND
GND
C29
GND
GND
R24
R22
GND
R18
R20
Q5
Q4
Q3
Q2
IN
DL
RSC CS
COMP
FB
DIM1
DIM2
DIM3
DIM4
OVP
SYSTEM
µC
DR4
DR3
DR2
DR1
DIMMING INPUTS
DIM
R30
R31
R29
R28
MAX16826
SDA
SCL
SDA
SCL
DL1
CS1
DL2
CS2
DL3
CS3
DL4
CS4
2
I C INTERFACE
ENABLE
SYNC/EN
GND
CSS
RTCT
V
CC
GND PGND
R27
R25
R23
R21
C44
C43
C42
C41
R19
C32
C30
C33
GND
GND
GND
GND
GND GND GND
GND
Figure 9. SEPIC-Based LED Driver
22 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
•
Place the feedback and even voltage-divider resis-
tors as close to FB and OVP as possible. The
divider center trace should be kept short. Placing
the resistors far away causes the sensing trace to
become antennas that can pick up switching noise.
Avoid running the sensing traces near drain con-
nection of the switching FET.
PCB Layout and Routing
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
•
Minimize the area of the high current-switching loop
of the rectifier diode, switching FET, sense resistor,
and output capacitor to avoid excessive switching
noise. Use wide and short traces for the gate-drive
loop from DL, to the FET gate, and through the cur-
rent-sense resistor, then returning to the IC PGND
and GND.
•
•
Place the input bypass capacitor as close to the
device as possible. The ground connection of the
bypass capacitor should be connected directly to
GND with a wide trace.
•
Connect high-current input and output components
with short and wide connections. The high-current
input loop is from the positive terminal of the input
capacitor to the inductor, to the switching FET, to
the current-sense resistor, and to the negative ter-
minal of the input capacitor. The high-current output
loop is from the positive terminal of the input capac-
itor to the inductor, to the rectifier diode, to the posi-
tive terminal of the output capacitor, reconnecting
between the output capacitor and input capacitor
ground terminals. Avoid using vias in the high-cur-
rent paths. If vias are unavoidable, use multiple vias
in parallel to reduce resistance and inductance.
Minimize the size of the switching FET drain node
while keeping it wide and short. Keep the drain
node away from the feedback node and ground. If
possible, avoid running this node from one side of
the PCB to the other. Use DC traces as shields, if
necessary.
•
•
Provide large enough cooling copper traces for the
external current sink FETs. Calculate the worst-case
power dissipation and allocate sufficient area for
cooling.
Refer to the MAX16826 Evaluation Kit for an exam-
ple of proper board layout.
______________________________________________________________________________________ 23
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Typical Application Circuit
MAX1826
AMX1862
S Y S T E M I N T E R F A C E
24 ______________________________________________________________________________________
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
MAX1826
Pin Configuration
Ordering Information (continued)
PART
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
32 TQFN-EP*
32 TQFN-EP*
TOP VIEW
MAX16826BATJ+
MAX16826BATJ/V+
24 23 22 21 20 19 18 17
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
/V denotes an automotive qualified part.
16
15
DR3 25
CS4 26
DIM4
DIM3
14 DIM2
27
28
29
30
31
32
DL4
DIM1
SCL
13
12
DR4
IN
Chip Information
MAX16826
PROCESS: BiCMOS
11 SDA
CS
EP
10
9
RSC
OVP
V
CC
DL
Package Information
1
2
3
4
5
6
7
8
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
TQFN
(5mm x 5mm)
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
EXPOSED PAD.
32 TQFN-EP
T3255-4
21-0140
______________________________________________________________________________________ 25
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
8/08
Initial release
—
Added automotive version, updated Features, EC table, Typical Operating
Characteristics, Switching Preregulator Stage, Oscillator, Analog-to-Digital
(ADC), Faults and Fault Detection sections
1, 2, 5, 6, 11,
14–17, 20
1
3/09
2
3
12/09
6/10
Improve definition of minimum on-time for proper ADC operation
Added MAX16826B part
5, 10, 16
2–5, 25
MAX1826
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
相关型号：
MAX16826_11
Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection
MAXIM
MAX16828
High-Voltage, 100mA/200mA Adjustable Linear High-Brightness LED Drivers with PWM Dimming
MAXIM
MAX16828ASA+
High-Voltage, 100mA/200mA Adjustable Linear High-Brightness LED Drivers with PWM Dimming
MAXIM
MAX16828ATT+
High-Voltage, 100mA/200mA Adjustable Linear High-Brightness LED Drivers with PWM Dimming
MAXIM
MAX1682EUK+T
Switched Capacitor Converter, 0.05A, 18.6kHz Switching Freq-Max, CMOS, PDSO5, ROHS COMPLIANT, MO-178AA, SOT-23, 5 PIN
MAXIM
MAX1683
3.3V/5V.High-Efficiency.Step-Up DC-DC Converters[MAX756/MAX757/MAX756/MAX757/MAX756/MAX757/MAX756C/D/MAX756CPA/MAX756CSA/MAX756CSA-T/MAX756EPA/MAX756ESA/MAX756ESA-T/MAX756EVKIT-SO/MAX757C/D/MAX757CPA/MAX757CSA/MAX757CSA-T/MAX757EPA/MAX757ESA/MAX757ESA-T ]
MAXIM
©2020 ICPDF网 联系我们和版权申明