LTM4637EVPBF [Linear]
20A DC/DC μModule Step-Down Regulator; 20A DC / DC μModule降压型稳压器
| 型号： | LTM4637EVPBF |
| 厂家： | 
Linear |
| 描述： | 20A DC/DC μModule Step-Down Regulator |
| 文件： | 总28页 (文件大小：585K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM4637
20A DC/DC µModule
Step-Down Regulator
FEATURES
DESCRIPTION
n
The LTM®4637 is a complete 20A output high efficiency
switch mode step-down DC/DC µModule (micromodule)
regulator.Includedinthepackagearetheswitchingcontrol-
ler, power FETs, inductor and compensation components.
Operating over an input voltage range from 4.5V to 20V,
the LTM4637 supports an output voltage range of 0.6V
to 5.5V, set by a single external resistor. Only a few input
and output capacitors are needed.
Complete 20A Switch Mode Power Supply
n
4.5V to 20V Input Voltage Range
n
0.6V to 5.5V Output Voltage Range
n
1.5ꢀ Total DC Output Voltage Error
(–40°C to 125°C)
n
Differential Remote Sense Amplifier for Precision
Regulation for (V
≤ 3.3V)
OUT
n
n
n
n
n
n
n
n
n
n
n
Current Mode Control/Fast Transient Response
Parallel Current Sharing (Up to 80A)
Frequency Synchronization
Current mode operation allows precision current sharing
of up to four LTM4637 regulators to obtain up to 80A
output. High switching frequency and a current mode
architecture enable a very fast transient response to line
and load changes without sacrificing stability. The device
supports frequency synchronization, multiphase/current
sharing,BurstModeoperationandoutputvoltagetracking
forsupplyrailsequencing.Adiode-connectedPNPtransis-
tor is available for use as an internal temperature monitor.
Selectable Pulse-Skipping or Burst Mode® Operation
Soft-Start/Voltage Tracking
Up to 88% Efficiency (12V , 1.8V
)
IN
OUT
Overcurrent Foldback Protection
Output Overvoltage Protection
Internal Temperature Monitor
Overtemperature Protection
15mm × 15mm × 4.32mm LGA Package
The LTM4637 is offered in a 15mm × 15mm × 4.32mm
LGA package. The LTM4637 is RoHS compliant. The
LTM4637 is pin compatible with the LTM4627, a 15A
DC/DC µModule regulator.
L, LT, LTC, LTM, PolyPhase, Burst Mode, µModule, Linear Technology, the Linear logo are
registered trademarks and LTpowerCAD is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210.
APPLICATIONS
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Telecom Servers and Networking Equipment
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Industrial Equipment
Medical Systems
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High Ambient Temperature Systems
TYPICAL APPLICATION
12VIN, 1.2VOUT, 20A DC/DC µModule® Regulator
12VIN Efficiency vs Load Current
2.2µF
100
1.2V
250kHz
CCM
OUT
V
IN
12V
95
90
22µF
16V
×4
10k
PGOOD
V
EXTV
INTV
CC CC
IN
V
1.2V
20A
OUT
0.1µF
COMP
V
OUT
V
OUT_LCL
TRACK/SS
RUN
85
80
75
70
100µF*
6.3V
×2
+
330pF
470µF
6.3V
×2
DIFF_OUT
+
LTM4637
f
V
SET
OSNS
–
MODE_PLLIN
V
OSNS
TEMP
V
FB
SGND GND
R
**
FB
60.4k
65
* SEE TABLE 5
** SEE TABLE 1
4637 TA01a
8
10 12 14 16 18 20
0
6
2
4
OUTPUT CURRENT (A)
4637 TA01b
4637f
1
For more information www.linear.com/LTM4637
LTM4637
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V ............................................................. –0.3V to 22V
IN
MODE_PLLIN
CC
V
............................................................. –0.3V to 6V
INTV
TRACK/SS COMP
OUT
INTV , V
MODE_PLLIN, f , TRACK/SS,
V
IN
1
2
3
4
5
6
7
8
9
10
11
12
, PGOOD, EXTV ............ –0.3V to 6V
SET
CC OUT_LCL
CC
A
B
C
D
E
RUN
V
–
+
IN
f
SET
V
V
, V
, DIFF_OUT...................–0.3V to INTV
OSNS
OSNS CC
COMP (Note 7) ................................. –0.3V to 2.7V
FB,
INTV
CC
TEMP
CC
PGOOD
RUN (Note 5) ............................................... –0.3V to 5V
TEMP ........................................................ –0.3V to 0.8V
EXTV
F
V
FB
INTV Peak Output Current (Note 6) ..................100mA
CC
GND
G
H
J
PGOOD
Internal Operating Temperature Range
SGND
+
(Note 2).................................................. –40°C to 125°C
Storage Temperature Range .................. –55°C to 125°C
Reflow (Peak Body) Temperature.......................... 245°C
V
OSNS
K
L
DIFF_OUT
V
OUT
V
V
OUT_LCL
–
M
OSNS
LGA PACKAGE
133-LEAD (15mm × 15mm × 4.32mm)
T
= 125°C, θ = 9.5°C/W, θ
= 4°C/W, θ
= 6.7°C/W, θ = 4.5°C/W
J(MAX)
θ
JA
JCbottom
JCtop JB
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS; WEIGHT = 2.9g
JA
θ VALUES DETERMINED PER JESD51-12
ORDER INFORMATION
LEAD FREE FINISH
LTM4637EV#PBF
LTM4637IV#PBF
TRAY
PART MARKING*
LTM4637V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM4637EV#PBF
LTM4637IV#PBF
133-Lead (15mm × 15mm × 4.32mm) LGA
133-Lead (15mm × 15mm × 4.32mm) LGA
LTM4637V
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal operating
temperature range (Note 2), otherwise specifications are at TA = 25°C. VIN = 12V, per the typical application in Figure 22.
SYMBOL
PARAMETER
CONDITIONS
MIN
4.5
TYP
MAX
20
UNITS
l
l
l
V
V
V
Input DC Voltage
V
V
V
IN
Range
V
Range
OUT
0.6
5.5
OUT
Output Voltage, Total
Variation with Line and Load
1.477
1.50
1.523
C
C
= 22µF × 3
OUT
OUT(DC)
IN
= 100µF Ceramic, 470µF POSCAP
= 40.2k, MODE_PLLIN = GND
R
FB
IN
V
= 5V to 20V, I
= 0A to 20A (Note 4)
OUT
Input Specifications
V
V
RUN Pin On Threshold
RUN Pin On Hysteresis
V
Rising
1.1
1.25
130
1.4
V
RUN
RUN
mV
RUNHYS
4637f
2
For more information www.linear.com/LTM4637
LTM4637
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal operating
temperature range (Note 2), otherwise specifications are at TA = 25°C. VIN = 12V, per the typical application in Figure 22.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input Supply Bias Current
V
V
V
= 12V, V
= 12V, V
= 12V, V
= 1.5V, Burst Mode Operation, I
= 1.5V, Pulse-Skipping Mode, I
= 1.5V, Switching Continuous, I
= 0.1A
= 0.1A
= 0.1A
17
25
54
40
mA
mA
mA
µA
Q(VIN)
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
Shutdown, RUN = 0, V = 12V
IN
I
Input Supply Current
V
IN
V
IN
= 5V, V
= 1.5V, I = 20A
OUT
OUT
6.8
2.87
A
A
S(VIN)
OUT
= 12V, V
= 1.5V, I
= 20A
OUT
Output Specifications
I
Output Continuous Current
Range
V
= 12V, V
= 1.5V (Note 4)
0
20
A
%/V
%
OUT(DC)
IN
OUT
l
l
∆V
(Line)
OUT
Line Regulation Accuracy
Load Regulation Accuracy
Output Ripple Voltage
Turn-On Overshoot
V
I
= 1.5V, V from 4.5V to 20V
OUT
= 0A
0.02
0.2
30
0.06
0.45
OUT
V
IN
OUT
∆V
(Load)
OUT
V
= 1.5V, I
= 0A to 20A, V = 12V (Note 4)
OUT IN
OUT
V
OUT
V
I
= 0A, C
= 100µF Ceramic, 470µF POSCAP
= 1.5V
mV
P-P
OUT(AC)
OUT
OUT
V
= 12V, V
OUT
IN
∆V
C
V
= 100µF Ceramic, 470µF POSCAP,
= 1.5V, I
15
mV
ms
mV
OUT(START)
OUTLS
OUT
OUT
= 0A, V = 12V
IN
OUT
t
Turn-On Time
C
= 100µF Ceramic, 470µF POSCAP,
0.6
50
START
OUT
No Load, TRACK/SS = 0.001µF, V = 12V
IN
∆V
Peak Deviation for Dynamic Load: 0% to 50% to 0% of Full Load
Load
C
V
= 100µF × 2 Ceramic, 470µF × 3 POSCAP,
OUT
= 12V, V
= 1.5V
OUT
IN
t
I
Settling Time for Dynamic
Load Step
Load: 0% to 50% to 0% of Full Load, V = 5V,
OUT
50
µs
SETTLE
IN
C
= 100µF × 2 Ceramic, 470µF × 3 POSCAP
Output Current Limit
V
V
= 12V, V = 1.5V
OUT
30
30
A
A
OUTPK
IN
IN
= 5V, V
= 1.5V
OUT
Control Section
l
l
V
Voltage at V Pin
I
= 0A, V = 1.5V
OUT
0.594
0.60
–12
0.606
–25
V
nA
V
FB
FB
OUT
I
Current at V Pin
(Note 7)
FB
FB
V
Feedback Overvoltage
Lockout
0.65
1.0
0.67
0.69
OVL
I
Track Pin Soft-Start Pull-Up TRACK/SS = 0V
Current
1.2
1.4
60.75
3.6
µA
TRACK/SS
t
Minimum On-Time
Resistor Between V
(Note 3)
100
ns
ON(MIN)
R
60.05
0
60.40
kΩ
FBHI
OUT_LCL
and V Pins
FB
Remote Sense Amplifier
+
V
V
,
Common Mode Input Range V = 12V, Run > 1.4V
V
V
OSNS
OSNS CM RANGE
IN
–
V
Maximum DIFF_OUT
Voltage
I
= 300µA
INTV – 1.4
DIFF_OUT(MAX)
DIFF_OUT
+
CC
V
A
Input Offset Voltage
Differential Gain
V
= V
= 1.5V, I = 100µA
DIFF_OUT
2
mV
V/V
V/µs
MHz
dB
OS
OSNS
DIFF_OUT
(Note 7)
(Note 6)
(Note 6)
(Note 7)
Sourcing
1
2
V
SR
Slew Rate
GBP
CMRR
Gain Bandwidth Product
Common Mode Rejection
DIFF_OUT Current
3
60
I
2
mA
DIFF_OUT
4637f
3
For more information www.linear.com/LTM4637
LTM4637
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal operating
temperature range (Note 2), otherwise specifications are at TA = 25°C. VIN = 12V, per the typical application in Figure 22.
SYMBOL
PARAMETER
CONDITIONS
5V < V < 20V (Note 7)
MIN
TYP
MAX
UNITS
PSRR
Power Supply Rejection
Ratio
100
dB
IN
R
Input Resistance
V
V
+ to GND
OSNS
80
kΩ
IN
PGOOD Output
V
PGOOD Trip Level
With Respect to Set Output
PGOOD
FB
V
V
–10
10
%
%
Ramping Negative
Ramping Positive
FB
FB
V
PGOOD Voltage Low
I
= 2mA
0.1
0.3
5.2
V
PGL
PGOOD
INTV Linear Regulator
CC
V
V
V
Internal V Voltage
6V < V < 20V
4.8
4.5
5
V
%
INTVCC
INTVCC
EXTVCC
CC
IN
Load Reg INTV Load Regulation
I
= 0 to 50mA
0.5
4.7
50
CC
CC
l
External V Switchover
EXTV Ramping Positive
V
CC
CC
VLDO Ext
EXTV Voltage Drop
I
= 25mA, V = 5V
EXTVCC
100
800
mV
CC
CC
Oscillator and Phase-Locked Loop
f
Frequency Sync Capture
Range
MODE_PLLIN Clock Duty Cycle = 50%
250
kHz
SYNC
f
f
f
I
Nominal Frequency
Lowest Frequency
Highest Frequency
Frequency Set Current
V
V
V
= 1.2V
= 0V
450
210
700
9
500
250
770
10
550
290
850
11
kHz
kHz
kHz
µA
NOM
LOW
HIGH
FREQ
fSET
fSET
fSET
≥ 2.4V
R
MODE_PLLIN Input
Resistance
250
kΩ
MODE_PLLIN
V
V
Clock Input Level High
Clock Input Level Low
2.0
V
V
IH_MODE_PLLIN
0.8
IL_MODE_PLLIN
Temperature Diode
V
TEMP Diode Voltage
I
= 100µA
0.6
V
TEMP
TEMP
l
TC V
Temperature Coefficient
–2.2
mV/°C
TEMP
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: The minimum on-time condition is specified for a peak-to-peak
Note 2: The LTM4637 is tested under pulsed load conditions such that
inductor ripple current of ~40% of I
Information section)
Load. (See the Applications
MAX
T ≈ T . The LTM4637E is guaranteed to meet performance specifications
J
A
over the 0°C to 125°C internal operating temperature range. Specifications
over the full –40°C to 125°C internal operating temperature range are
assured by design, characterization and correlation with statistical process
controls. The LTM4637I is guaranteed to meet specifications over the
full –40°C to 125°C internal operating temperature range. Note that the
maximum ambient temperature consistent with these specifications is
Note 4: See output current derating curves for different V , V
Note 5: Limit current into the RUN pin to less than 2mA.
Note 6: Guaranteed by design.
Note 7: 100% tested at wafer level.
and T .
A
IN OUT
4637f
4
For more information www.linear.com/LTM4637
LTM4637
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current with
8VIN (Limit 5V Output to 15A)
Efficiency vs Load Current with
12VIN (Limit 5V Output to 15A)
Efficiency vs Load Current
with 5VIN
100
95
100
95
100
95
90
90
90
85
80
75
70
85
80
75
70
85
80
75
70
1V , 250kHz, CCM
1V , 250kHz, CCM
OUT
OUT
1V , 250kHz, CCM
1.2V , 250kHz, CCM
OUT
1.2V , 250kHz, CCM
OUT
OUT
1.2V , 250kHz, CCM
1.5V , 350kHz, CCM
1.5V , 350kHz, CCM
OUT
OUT
OUT
1.5V , 350kHz, CCM
1.8V , 350kHz, CCM
1.8V , 350kHz, CCM
OUT
OUT
OUT
1.8V , 350kHz, CCM
2.5V , 450kHz, CCM
2.5V , 450kHz, CCM
OUT
OUT
OUT
2.5V , 450kHz, CCM
3.3V , 600kHz, CCM
3.3V , 600kHz, CCM
OUT
OUT
OUT
3.3V , 600kHz, CCM
OUT
5V , 600kHz, CCM
OUT
5V , 600kHz, CCM
OUT
65
65
65
2
4
8
2
4
8
2
4
8
10 12 14 16 18 20
0
6
10 12 14 16 18 20
0
6
10 12 14 16 18 20
0
6
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4637 G01
4637 G02
4637 G03
Burst Mode Efficiency
vs Load Current
Pulse-Skipping Mode Efficiency
vs Load Current
1V Transient Response
95
90
85
80
75
70
65
95
90
85
80
75
70
65
60
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
LOAD STEP
5A/DIV
4637 G06
V
V
I
= 12V
200µs/DIV
IN
= 1V
OUT
5V , 1.8V , 350kHz
5V , 1.8V , 350k
= 0A TO 10A, C = 330pF
IN
OUT
OUT
OUT
IN
OUT
OUT
FF
8V , 1.8V , 350kHz
8V , 1.8V , 350k
IN OUT
OUTPUT CAPACITORS:
IN
12V , 1.8V , 350kHz
12V , 1.8V , 350k
IN OUT
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
IN
0
1
1.5
2
2.5
3
0
1
1.5
2
2.5
3
0.5
0.5
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4637 G04
4637 G05
1.2V Transient Response
1.5V Transient Response
1.8V Transient Response
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
LOAD STEP
5A/DIV
LOAD STEP
5A/DIV
LOAD STEP
5A/DIV
4637 G08
4637 G09
4637 G07
V
V
I
= 12V
200µs/DIV
V
V
I
= 12V
200µs/DIV
V
V
I
= 12V
200µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 1.5V
= 0A TO 10A, C = 330pF
= 1.8V
= 1.2V
= 0A TO 10A, C = 330pF
= 0A TO 10A, C = 330pF
OUT
FF
OUT
FF
OUT
FF
OUTPUT CAPACITORS:
OUTPUT CAPACITORS:
OUTPUT CAPACITORS:
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
4637f
5
For more information www.linear.com/LTM4637
LTM4637
TYPICAL PERFORMANCE CHARACTERISTICS
2.5V Transient Response
5V Transient Response
3.3V Transient Response
OUTPUT
TRANSIENT
100mV/DIV
200µs/DIV
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
OUTPUT
TRANSIENT
50mV/DIV
200µs/DIV
LOAD STEP
5A/DIV
LOAD STEP
5A/DIV
LOAD STEP
5A/DIV
4637 G12
4637 G10
4637 G11
V
V
I
= 12V
= 5V
OUT
OUTPUT CAPACITORS:
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
200µs/DIV
V
V
I
= 12V
200µs/DIV
V
V
I
= 12V
200µs/DIV
IN
OUT
IN
OUT
IN
OUT
= 2.5V
= 3.3V
= 0A TO 10A, C = 330pF
FF
= 0A TO 10A, C = 330pF
= 0A TO 10A, C = 330pF
FF
OUT
FF
OUT
OUTPUT CAPACITORS:
OUTPUT CAPACITORS:
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
3 × 470µF POSCAP CAPACITORS
2 × 100µF CERAMIC CAPACITORS
Turn-On No Load
Turn-On 20A Load
V
V
IN
IN
2V/DIV
2V/DIV
20ms/DIV
20ms/DIV
V
V
OUT
OUT
200mV/DIV
20ms/DIV
200mV/DIV
20ms/DIV
4637 G13
4637 G14
20ms/DIV
20ms/DIV
12V to 1.5V AT 0A LOAD
TRACK/SS = 0.1µF
12V to 1.5V AT 20A LOAD
TRACK/SS = 0.1µF
Short-Circuit Protection with 20A
Load
Short-Circuit Protection No Load
V
V
OUT
OUT
500mV/DIV
200µs/DIV
500mV/DIV
200µs/DIV
INPUT
CURRENT
1A/DIV
INPUT
CURRENT
200mA/DIV
4637 G15
4637 G16
200µs/DIV
12V to 1.5V AT 0A LOAD
TRACK/SS = 0.1µF
200µs/DIV
12V to 1.5V AT 20A LOAD
TRACK/SS = 0.1µF
4637f
6
For more information www.linear.com/LTM4637
LTM4637
PIN FUNCTIONS
PACKAGE ROW AND COLUMN LABELING MAY VARY
V
(F12): The Negative Input of the Error Amplifier.
FB
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
Internally, this pin is connected to V
with a
OUT_LCL
60.4k precision resistor. Different output voltages can
V
(A1-A6, B1-B6, C1-C6): Power Input Pins. Apply
be programmed with an additional resistor between V
IN
FB
and ground pins. In PolyPhase® operation, tying the
input voltage between these and GND pins. Recommend
placing input decoupling capacitance directly between
V
pins together allows for parallel operation. See the
FB
V and GND pins.
Applications Information section.
IN
V
(J1-J10, K1-K11, L1-L11, M1-M11): Power Output
COMP(A11):CurrentControlThresholdandErrorAmplifier
Compensation Point. The current comparator threshold
increases with this control voltage. Tie all COMP pins
together for parallel operation. The device is internally
compensated.
OUT
Pins. ApplyoutputloadbetweentheseandGNDpins. Rec-
ommend placing output decoupling capacitance between
these pins and GND pins. Review Table 5.
GND (B7, B9, C7, C9, D1-D6, D8, E1-E7, E9, F1-F9, G1-G9,
H1-H9): Power Ground Pins for Both Input and Output.
RUN:(A10)RunControlPin.Avoltageabove1.4Vwillturn
on the module. A 5.1V Zener diode to ground is internal
to the module for limiting the voltage on the RUN pin to
PGOOD (F11, G12): Output Voltage Power Good Indica-
tor. Open-drain logic output is pulled to ground when the
output voltage exceeds a 10% regulation window. Both
pins are tied together internally.
5V, and allowing a pull-up resistor to V for enabling the
IN
device. Limit current into the RUN pin to ≤ 2mA.
INTV : (A7, D9) Internal 5V LDO for Driving the Control
CC
SGND (G11, H11, H12): Signal Ground Pin. Return
ground path for all analog and low power circuitry. Tie a
single connection to the output capacitor GND. See layout
guidelines in Figure 21.
Circuitry and the Power MOSFET Drivers. Both pins are
internally connected. The 5V LDO has a 100mA current
limit. INTV is controlled and enabled when RUN is
CC
activated high.
TEMP (D10): Temperature Monitor. See Applications
Information section.
EXTV (E12): External power input to an internal control
CC
switchallowsanexternalsourcegreaterthan4.7V,butless
MODE_PLLIN(A8):ForcedContinuousMode,BurstMode
Operation, or Pulse-Skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
than6VtosupplyICpowerandbypasstheinternalINTV
CC
LDO. EXTV must be less than V at all times during
CC
IN
power-on and power-off sequences. See the Applications
Informationsection.5Voutputapplicationcanconnectthe
5V output to this pin to improve efficiency. The 5V output
ConnectthispintoINTV toenablepulse-skippingmode.
CC
Connect to ground to enable forced continuous mode.
Floating this pin will enable Burst Mode operation. A clock
onthispinwillenablesynchronizationwithforcedcontinu-
ous operation. See the Applications Information section.
is connected to EXTV in the 5V derating curves.
CC
V
: (L12) This pin connects to V
through a 1M
OUT_LCL
OUT
resistor,andtoV witha60.4kresistor.Theremotesense
FB
f
(B12): A resistor can be applied from this pin to
SET
amplifier output DIFF_OUT is connected to V
, and
OUT_LCL
ground to set the operating frequency, or a DC voltage
can be applied to set the frequency. See the Applications
Information section.
drives the 60.4k top feedback resistor in remote sensing
applications. When the remote sense amplifier is used,
DIFF_OUT effectively eliminates the 1MΩ from V
to
OUT
V
. When the remote sense amplifier is not used,
OUT_LCL
TRACK/SS (A9): Output Voltage Tracking Pin and Soft-
Start Inputs. The pin has a 1.2µA pull-up current source. A
capacitor from this pin to ground will set a soft-start ramp
rate. In tracking, the regulator output can be tracked to a
differentvoltage.SeetheApplicationsInformationsection.
then connect V
to V
directly.
OUT_LCL
OUT
4637f
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For more information www.linear.com/LTM4637
LTM4637
PIN FUNCTIONS
+
V
OSNS
: (J12) (+) Input to the Remote Sense Amplifier.
DIFF_OUT: (K12) Output of the Remote Sense Amplifier.
This pin connects to the V pin for remote sense
This pin connects to the output remote sense point. The
remote sense amplifier can be used for V
nect to ground when not used.
OUT_LCL
≤ 3.3V. Con-
applications. Otherwise float when not used. The remote
sense amplifier can be used for V ≤ 3.3V.
OUT
OUT
–
V
: (M12) (–) Input to the Remote Sense Amplifier.
MTP1, MTP2, MTP3, MTP4, MTP5, MTP6, MTP7,
(A12, B11, C10, C11, C12, D11, D12): Extra mounting
pads used for increased solder integrity strength. Leave
floating.
OSNS
This pin connects to the ground remote sense point. The
remote sense amplifier can be used for V
nect to ground when not used.
≤ 3.3V. Con-
OUT
BLOCK DIAGRAM
PTC
+
OTP
~135°C
499k
INTV
CC
–
+
V
OUT_LCL
V
400mV
OUT
10k
1M
V
IN
PGOOD
> 1.4V = ON
< 1.1V = OFF
MAX = 5V
R1
R2
V
IN
RUN
V
IN
4.5V TO 20V
+
1.5µF
C
5.1V
IN
TEMP
COMP
60.4k
PNP
M1
INTERNAL
COMP
0.6µH
V
OUT
V
OUT
C
1V
SGND
POWER
CONTROL
20A
+
V
FB
10µF
M2
OUT
f
SET
R
FB
GND
R
90.9k
fSET
50k
INTERNAL
LOOP
2.2Ω
SGND
FILTER
INTV
CC
C SOFT-START
TRACK/SS
V
–
MODE_PLLIN
–
OSNS
+
DIFF
AMP
250k
V
+
–
+
OSNS
INTV
CC
2.2µF
C
DIFF_OUT
EXTV
CC
4637 F01
Figure 1. Simplified LTM4637 Block Diagram
4637f
8
For more information www.linear.com/LTM4637
LTM4637
DECOUPLING REQUIREMENTS TA = 25°C. Use Figure 1 configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
IN
External Input Capacitor Requirement
IN
88
µF
I
= 20A, 4× 22µF Ceramic X7R Capacitors
OUT
(V = 4.5V to 20V, V
= 1.5V)
OUT
(See Table 5)
C
External Output Capacitor Requirement
(V = 4.5V to 20V, V = 1.5V)
I
= 20A (See Table 5)
400
µF
OUT
OUT
IN
OUT
OPERATION
Power Module Description
Overtemperature protection will turn off the regulator’s
RUNpinat~130°Cto137°C.SeeApplicationsInformation.
The LTM4637 is a high performance single output stand-
alone nonisolated switching mode DC/DC power supply.
It can provide a 20A output with few external input and
output capacitors. This module provides precisely regu-
lated output voltages programmable via external resistors
Pulling the RUN pin below 1.1V forces the regulator into a
shutdown state. The TRACK/SS pin is used for program-
ming the output voltage ramp and voltage tracking during
start-up. See the Application Information section.
from 0.6V to 5.5V over a 4.5V to 20V input range.
DC
DC
The LTM4637 is internally compensated to be stable over
all operating conditions. Table 5 provides a guideline for
inputandoutputcapacitancesforseveraloperatingcondi-
tions. LTpowerCAD™isavailablefortransientandstability
The typical application schematic is shown in Figure 22.
The LTM4637 has an integrated constant-frequency cur-
rent mode regulator, power MOSFETs, 0.6µH inductor,
andothersupportingdiscretecomponents. Theswitching
frequencyrangeisfrom250kHzto770kHz, andthetypical
analysis.TheV pinisusedtoprogramtheoutputvoltage
FB
with a single external resistor to ground.
operating frequency is shown in Table 5 for each V . For
OUT
Aremotesenseamplifierisprovidedforaccuratelysensing
output voltages ≤3.3V at the load point.
switchingnoise-sensitiveapplications, itcanbeexternally
synchronizedfrom250kHzto800kHz,subjecttominimum
on-time limitations. A single resistor is used to program
the frequency. See the Applications Information section.
Multiphase operation can be easily employed with the
synchronization inputs using an external clock source.
See application examples.
With current mode control and internal feedback loop
compensation, the LTM4637 module has sufficient stabil-
ity margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
High efficiency at light loads can be accomplished with
selectable Burst Mode operation using the MODE_PLLIN
pin. These light load features will accommodate battery
operation. Efficiencygraphsareprovidedforlightloadop-
erationintheTypicalPerformanceCharacteristicssection.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limit in an overcurrent condition. An internal overvoltage
monitor protects the output voltage in the event of an
overvoltage >10%. The top MOSFET is turned off and the
bottom MOSFET is turned on until the output is cleared.
A TEMP pin is provided to allow the internal device tem-
peraturetobemonitoredusinganonboarddiodeconnected
PNP transistor.
4637f
9
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
The typical LTM4637 application circuit is shown in Fig-
ure 22. External component selection is primarily deter-
mined by the maximum load current and output voltage.
RefertoTable5forspecificexternalcapacitorrequirements
for particular applications.
Input Capacitors
The LTM4637 module should be connected to a low AC-
impedance DC source. Additional input capacitors are
neededfortheRMSinputripplecurrentrating.TheI
CIN(RMS)
equation which follows can be used to calculate the input
capacitor requirement. Typically 22µF X7R ceramics are a
good choice with RMS ripple current ratings of ~ 2A each.
A47µFto100µFsurfacemountaluminumelectrolyticbulk
capacitor can be used for more input bulk capacitance.
This bulk input capacitor is only needed if the input source
impedanceiscompromisedbylonginductiveleads,traces
ornotenoughsourcecapacitance.Iflowimpedancepower
planes are used, then this bulk capacitor is not needed.
V to V
IN
Step-Down Ratios
OUT
There are restrictions in the V to V
step-down ratio
IN
OUT
that can be achieved for a given input voltage. The duty
cycle is 94% typical at 500kHz operation. The V to V
IN
OUT
minimumdropoutisafunctionofloadcurrentandoperation
at very low input voltage and high duty cycle applications.
At very low duty cycles the minimum 100ns on-time must
be maintained. See the Frequency Adjustment section and
temperature derating curves.
For a buck converter, the switching duty cycle can be
estimated as:
Output Voltage Programming
V
VIN
OUT
D=
The PWM controller has an internal 0.6V 1% reference
voltage. As shown in the Block Diagram, a 60.4k internal
feedback resistor connects the V
together. When the remote sense amplifier is used, then
DIFF_OUT is connected to the V
sense amplifier is not used, then V
Without considering the inductor ripple current, for each
output the RMS current of the input capacitor can be
estimated as:
and V pins
OUT_LCL
FB
pin. If the remote
connects to
OUT_LCL
IOUT(MAX)
OUT_LCL
ICIN(RMS)
=
• D•(1–D)
V
. The output voltage will default to 0.6V with no feed-
OUT
η%
back resistor. Adding a resistor R from V to ground
FB
FB
where η% is the estimated efficiency of the power mod-
ule. The bulk capacitor can be a switcher-rated aluminum
electrolytic capacitor or a Polymer capacitor.
programs the output voltage:
60.4k+ RFB
VOUT = 0.6V •
RFB
Output Capacitors
Table 1. VFB Resistor Table vs Various Output Voltages
(V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3
Open 90.9 60.4 40.2 30.1 19.1 13.3 8.25
The LTM4637 is designed for low output voltage ripple
V
5.0
OUT
noise. The bulk output capacitors defined as C
are
OUT
R
(k)
FB
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient require-
ments. C
can be a low ESR tantalum capacitor, low
For parallel operation of N LTM4637s, the following
OUT
ESR Polymer capacitor or ceramic capacitors. The typical
outputcapacitancerangeisfrom200µFto800µF.Additional
output filtering may be required by the system designer
if further reduction of output ripple or dynamic transient
spikesisrequired.Table5showsamatrixofdifferentoutput
voltages and output capacitors to minimize the voltage
droop and overshoot during a 10A/µs transient. The table
optimizes total equivalent ESR and total bulk capacitance
equation can be used to solve for R :
FB
60.4k /N
RFB=
V
OUT
–1
0.6V
Tie the V pins together for each parallel output. The
FB
COMP pins must be tied together also.
4637f
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For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
cycles, thus skipping operation cycles. This mode has
lower ripple than Burst Mode operation and maintains a
higher frequency operation than Burst Mode operation.
to optimize the transient performance. Stability criteria
are considered in the Table 5 matrix, and LTpowerCAD is
available for stability analysis. Multiphase operation will
reduceeffectiveoutputrippleasafunctionofthenumberof
phases.ApplicationNote77discussesthisnoisereduction
versus output ripple current cancellation, but the output
capacitance should be considered carefully as a function
of stability and transient response. LTpowerCAD can be
usedtocalculatetheoutputripplereductionasthenumber
of implemented phases increase by N times.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation
should be used. Forced continuous operation can be
enabled by tying the MODE_PLLIN pin to ground. In this
mode, inductor current is allowed to reverse during low
output loads, the COMP voltage is in control of the current
comparator threshold throughout, and the top MOSFET
alwaysturnsonwitheachoscillatorpulse.Duringstart-up,
forced continuous mode is disabled and inductor current
is prevented from reversing until the LTM4637’s output
voltage is in regulation.
Burst Mode Operation
TheLTM4637iscapableofBurstModeoperationinwhich
the power MOSFETs operate intermittently based on load
demand, thus saving quiescent current. For applications
where maximizing the efficiency at very light loads is a
high priority, Burst Mode operation should be applied. To
enableBurstModeoperation,simplyfloattheMODE_PLLIN
pin. During Burst Mode operation, the peak current of the
inductorissettoapproximately30%ofthemaximumpeak
current value in normal operation even though the voltage
at the COMP pin indicates a lower value. The voltage at the
COMP pin drops when the inductor’s average current is
greater than the load requirement. As the COMP voltage
drops below 0.5V, the burst comparator trips, causing
the internal sleep line to go high and turn off both power
MOSFETs.
Multiphase Operation
For outputs that demand more than 20A of load current,
multiple LTM4637 devices can be paralleled to provide
more output current without increasing input and output
ripple voltage. The MODE_PLLIN pin allows the LTM4637
to be synchronized to an external clock and the internal
phase-locked loop allows the LTM4637 to lock onto input
clock phase as well. The f resistor is selected for nor-
SET
mal frequency, then the incoming clock can synchronize
the device over the specified range. See Figure 24 for a
synchronizing example circuit.
In sleep mode, the internal circuitry is partially turned
off, reducing the quiescent current. The load current is
now being supplied from the output capacitors. When the
output voltage drops, causing COMP to rise, the internal
sleep line goes low, and the LTM4637 resumes normal
operation. The next oscillator cycle will turn on the top
power MOSFET and the switching cycle repeats.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
thanthenumberofphasesusedtimestheoutputvoltage).
Theoutputrippleamplitudeisalsoreducedbythenumber
of phases used. See Application Note 77.
Pulse-Skipping Mode Operation
Inapplicationswherelowoutputrippleandhighefficiency
at intermediate currents are desired, pulse-skipping
mode should be used. Pulse-skipping operation allows
the LTM4637 to skip cycles at low output loads, thus
increasing efficiency by reducing switching loss. Tying
The LTM4637 device is an inherently current mode con-
trolled device, so parallel modules will have good current
sharing. This will balance the thermals in the design. Tie
the COMP and V pins of each LTM4637 together to
FB
the MODE_PLLIN pin to INTV enables pulse-skipping
CC
share the current evenly. Figure 24 shows a schematic of
operation. With pulse-skipping mode at light load, the
internalcurrentcomparatormayremaintrippedforseveral
the parallel design.
4637f
11
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
Input RMS Ripple Current Cancellation
inductor current to about 30% to 40% of maximum load
current. For output voltages from 1.5V to 1.8V, 350kHz is
optimal. For output voltages from 2.5V to 5V, 500kHz is
optimal. See efficiency graphs for optimal frequency set
point. Limit 5V output to 15A.
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current can-
cellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reductionasafunctionofthenumberofinterleavedphases
(see Figure 2).
The LTM4637 can be synchronized from 250kHz to
800kHz with an input clock that has a high level above
900
800
700
600
500
400
300
200
100
0
PLL, Frequency Adjustment and Synchronization
TheLTM4637switchingfrequencyissetbyaresistor(R
)
)
fSET
from the f pin to signal ground. A 10µA current (I
SET
FREQ
flowing out of the f pin through R
develops a volt-
SET
fSET
age on f . R
can be calculated as:
SET fSET
FREQ
500kHz / V
1
RfSET
=
+ 0.2V
10µA
0
0.5
1
1.5
2
2.5
4637 F03
The relationship of f voltage to switching frequency is
SET
f
PIN VOLTAGE (V)
SET
shown in Figure 3. For low output voltages from 0.6V to
1.2V, 250kHz operation is an optimal frequency for the
best power conversion efficiency while maintaining the
Figure 3. Relationship Between Switching
Frequency and Voltage at the fSET Pin
0.60
1 PHASE
2 PHASE
0.55
3 PHASE
4 PHASE
6 PHASE
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V /V
)
4637 F02
OUT IN
Figure 2. Normalized Input RMS Ripple Current vs Duty Cycle for One to Six µModule Regulators (Phases)
4637f
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For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
2V and a low level below 0.8V. See the Typical Applica-
tionssectionforsynchronizationexamples.TheLTM4637
minimum on-time is limited to approximately 100ns.
Guardband the on-time to 110ns. The on-time can be
calculated as:
TRACK/SS pin. As mentioned above, the TRACK/SS pin
has a control range from 0V to 0.6V. The master’s
TRACK/SS pin slew rate is directly equal to the master’s
output slew rate in volts/time. The equation:
MR
•60.4k= RTB
1
VOUT
VIN
tON(MIN)
=
•
SR
FREQ
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in volts/time. When coincident
Output Voltage Tracking
tracking is desired, then MR and SR are equal, thus R
TB
Output voltage tracking can be programmed externally
using the TRACK/SS pin. The output can be tracked up
and down with another regulator. The master regulator’s
output is divided down with an external resistor divider
that is the same as the slave regulator’s feedback divider
to implement coincident tracking. The LTM4637 uses an
accurate 60.4k resistor internally for the top feedback
resistor.Figure4showsanexampleofcoincidenttracking.
is equal to 60.4k. R is derived from equation:
TA
0.6V
RTA =
VFB VFB VTRACK
+
–
60.4k RFB
RTB
where V is the feedback voltage reference of the regula-
FB
tor, and V
is 0.6V. Since R is equal to the 60.4k
TB
TRACK
top feedback resistor of the slave regulator in equal slew
rate or coincident tracking, then R is equal to R with
60.4k
RTA
TA
FB
VOUT(SLAVE) = 1+
• VTRACK
V
= V
. Therefore R = 60.4k, and R = 60.4k in
FB
TRACK TB TA
Figure 4.
V
V
is the track ramp applied to the slave’s track pin.
has a control range of 0V to 0.6V, or the internal
TRACK
TRACK
Inratiometrictracking, adifferentslewratemaybedesired
for the slave regulator. R can be solved for when SR
TB
reference voltage. When the master’s output is divided
down with the same resistor values used to set the slave’s
output, then the slave will coincident track with the master
until it reaches its final value. The master will continue
to its final value from the slave’s regulation point (see
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach its final value before the master output.
For example, MR = 1.5V/ms, and SR = 1.2V/ms. Then R
TB
Figure 5). Voltage tracking is disabled when V
is
= 75k. Solve for R to equal 51.1k.
TRACK
TA
more than 0.6V. R in Figure 4 will be equal to R for
TA
FB
For applications that do not require tracking or sequenc-
coincident tracking.
ing, simply tie the TRACK/SS pin to INTV to let RUN
CC
The TRACK/SS pin of the master can be controlled by an
externalramporthesoft-startfunctionofthatregulatorcan
be used to develop that master ramp. The LTM4637 can
be used as a master by setting the ramp rate on its track
pin using a soft-start capacitor. A 1.2µA current source
is used to charge the soft-start capacitor. The following
equation can be used:
control the turn on/off. When the RUN pin is below
its threshold or the V undervoltage lockout, then
IN
TRACK/SS is pulled low.
Overcurrent and Overvoltage Protection
The LTM4637 has overcurrent protection (OCP) in a
short circuit. The internal current comparator threshold
folds back during a short to reduce the output current. An
overvoltage condition (OVP) above 10% of the regulated
outputvoltagewillforcethetopMOSFEToffandthebottom
MOSFETonuntiltheconditioniscleared.Foldbackcurrent
CSS
1.2µA
tSOFT-START = 0.6V •
Ratiometric tracking can be achieved by a few simple
calculationsandtheslewratevalueappliedtothemaster’s
limiting is disabled during soft-start or tracking start-up.
4637f
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For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
2.2µF
V
IN
4.5V TO 16V
C
IN1
22µF
16V
×4
SOFT-START
CAPACITOR
PGOOD
V
EXTV
INTV
CC CC
IN
V
1.5V
20A
OUT2
COMP
V
C
OUT
OUT_LCL
R2
10k
SS
C11
C8
+
TRACK/SS
RUN
V
100µF
6.3V
×2
470µF
6.3V
×2
DIFF_OUT
+
LTM4637
330pF
f
V
OSNS
SET
R4
75k
–
MODE_PLLIN
V
OSNS
TEMP
SGND
V
FB
GND
R
FB1
40.2k
2.2µF
V
IN
4.5V TO 16V
C
IN2
MASTER RAMP
OR OUTPUT
22µF
16V
×4
PGOOD
V
EXTV
INTV
CC CC
IN
V
1.2V
20A
OUT1
R
60.4k
TB
R
TA
COMP
V
OUT
OUT_LCL
C6
C4
60.4k
+
R1
10k
100µF
6.3V
×2
TRACK/SS
RUN
V
470µF
6.3V
×2
DIFF_OUT
+
LTM4637
330pF
f
V
OSNS
SET
R3
50k
–
MODE_PLLIN
V
OSNS
TEMP
V
FB
SGND
GND
R
FB
60.4k
4637 F04
Figure 4. Dual Outputs (1.5V and 1.2V) with Tracking
Temperature Monitoring
Measuring the absolute temperature of a diode is pos-
sible due to the relationship between current, voltage
and temperature described by the classic diode equation:
MASTER OUTPUT
SLAVE OUTPUT
OUTPUT
VOLTAGE
VD
η • V
ID = IS • e
T
or
4637A F05
TIME
I
VD = η • VT •ln D
Figure 5. Output Voltage Coincident Tracking Characteristics
IS
where I is the diode current, V is the diode voltage, η is
D
D
the ideality factor (typically close to 1.0) and I (satura-
S
tion current) is a process dependent parameter. V can
T
be broken out to:
k • T
q
VT =
4637f
14
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
where T is the diode junction temperature in Kelvin, q is
the electron charge and k is Boltzmann’s constant. V is
To obtain a linear voltage proportional to temperature
we cancel the I variable in the natural logarithm term to
T
S
approximately 26mV at room temperature (298K) and
scales linearly with Kelvin temperature. It is this linear
temperature relationship that makes diodes suitable
remove the I dependency from the following equation.
S
This is accomplished by measuring the diode voltage at
two currents I , and I , where I = 10 • I ),
1
2
1
2
temperature sensors. The I term in the equation above
S
Subtracting we get:
is the extrapolated current through a diode junction when
I1
∆VD = T(KELVIN)•KD •ln − T(KELVIN)•KD •ln
IS
I2
IS
the diode has zero volts across the terminals. The I term
S
varies from process to process, varies with temperature,
and by definition must always be less than I . Combining
D
Combining like terms, then simplifying the natural log
terms yields:
all of the constants into one term:
η •k
q
KD =
∆V = T(KELVIN) • K • In(10)
D
D
and redefining constant:
−5
where K = 8.62 , and knowing ln(I /I ) is always posi-
D
D S
198µV
tive because I is always greater than I , leaves us with
the equation that:
D
S
K'D = KD •ln(10) =
K
I
IS
VD = T(KELVIN)•KD •ln D
yields:
∆V = K' • T(KELVIN)
D
D
where V appears to increase with temperature. It is com-
Solving for temperature:
D
mon knowledge that a silicon diode biased with a current
source has an approximate –2mV/°C temperature rela-
tionship (Figure 6), which is at odds with the equation. In
∆VD
K'D
T(KELVIN) =
,
T(KELVIN) = [°C]+ 273.15,
[°C]= T(KELVIN)− 273.15
fact, the I term increases with temperature, reducing the
S
ln(I /I ) absolute value yielding an approximate –2mV/°C
D S
composite diode voltage slope.
means that if we take the difference in voltage across the
diode measured at two currents with a ratio of 10, the
resulting voltage is 198µV per Kelvin of the junction with
a zero intercept at 0 Kelvin.
1.0
I
I
= 100µA
= 10µA
D
D
0.8
ThediodeconnectedPNPtransistorattheTEMPpincanbe
used to monitor the internal temperature of the LTM4637.
Ageneraltemperaturemonitorcanbeimplementedbycon-
∆V
D
0.6
0.4
nectingaresistorbetweenTEMPandV tosetthecurrent
IN
to100µA, andthenmonitoringthediodevoltagedropwith
temperature. A more accurate temperature monitor can
be achieved with a circuit injecting two currents that are
at a 10:1 ratio. See Figure 22 for an example.
–173
–73
27
127
TEMPERATURE (°C)
4636 F06
Figure 6. Diode Voltage VD vs Temperature
T(°C) for Different Bias Currents
4637f
15
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LTM4637
APPLICATIONS INFORMATION
Overtemperature Protection
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configuration
section of the data sheet are consistent with those param-
eters defined by JESD51-12 and are intended for use with
finiteelementanalysis(FEA)softwaremodelingtoolsthat
leverage the outcome of thermal modeling, simulation,
and correlation to hardware evaluation performed on a
µModule package mounted to a hardware test board.
The motivation for providing these thermal coefficients
in found in JESD 51-12 (“Guidelines for Reporting and
Using Electronic Package Thermal Information”).
The internal overtemperature protection monitors the
internal temperature of the module and shuts off the
regulator at ~130°C to 137°C. Once the regulator cools
down the regulator will restart.
Run Enable
The RUN pin is used to enable the power module or se-
quence the power module. The threshold is 1.25V, and
the pin has an internal 5.1V Zener to protect the pin. The
RUN pin can be used as an undervoltage lockout (UVLO)
function by connecting a resistor divider from the input
supply to the RUN pin:
Many designers may opt to use laboratory equipment
and a test vehicle such as the demo board to predict the
µModule regulator’s thermal performance in their appli-
cation at various electrical and environmental operating
conditions to compliment any FEA activities. Without FEA
software, the thermal resistances reported in the Pin Con-
figurationsectionare,inandofthemselves,notrelevantto
providing guidance of thermal performance; instead, the
derating curves provided in this data sheet can be used
in a manner that yields insight and guidance pertaining to
one’s application-usage, and can be adapted to correlate
thermal performance to one’s own application.
V
UVLO
= ((R1+R2)/R2) • 1.25V
See Figure 1, Simplified Block Diagram.
INTV Regulator
CC
The LTM4637 has an internal low dropout regulator from
V
called INTV . This regulator output has a 2.2µF
IN
CC
ceramic capacitor internal. An additional 2.2µF ceramic
capacitor is needed on this pin to ground. This regulator
powers the internal controller and MOSFET drivers. The
gate driver current is ~20mA for 750kHz operation. The
regulator loss can be calculated as:
The Pin Configuration section gives four thermal coeffi-
cients explicitly defined in JESD 51-12; these coefficients
are quoted or paraphrased below:
(V – 5V) • 20mA = P
IN
LOSS
EXTV external voltage source ≥ 4.7V can be applied to
CC
1
θ , the thermal resistance from junction to ambient, is
JA
thispintoeliminatetheinternalINTV LDOpowerlossand
CC
the natural convection junction-to-ambient air thermal
resistance measured in a one cubic foot sealed enclo-
sure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted
to a 95mm × 76mm PCB with four layers.
increase regulator efficiency. A 5V supply can be applied
to run the internal circuitry and power MOSFET driver. If
unused, leave pin floating. EXTV must be less than V
CC
IN
at all times during power-on and power-off sequences.
Stability Compensation
2
θ
, the thermal resistance from junction to the
The LTM4637 has already been internally compensated
for all output voltages. Table 5 is provided for most ap-
plication requirements. LTpowerCAD is available for other
control loop optimization.
JCbottom
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottomofthepackage.InthetypicalµModuleregulator,
the bulk of the heat flows out the bottom of the pack-
age, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test
conditionsdon’tgenerallymatchtheuser’sapplication.
4637f
16
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
3
θ
, the thermal resistance from junction to top of
exclusively through the top or exclusively through bot-
tom of the µModule package—as the standard defines
JCtop
the product case, is determined with nearly all of the
componentpowerdissipationflowingthroughthetopof
the package. As the electrical connections of the typical
µModule regulator are on the bottom of the package, it
is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
for θ
and θ
, respectively. In practice, power
JCtop
JCbottom
loss is thermally dissipated in both directions away from
the package—granted, in the absence of a heat sink and
airflow, a majority of the heat flow is into the board.
Within the LTM4637, be aware there are multiple power
devices and components dissipating power, with a con-
sequence that the thermal resistances relative to different
junctions of components or die are not exactly linear with
respect to total package power loss. To reconcile this
complicationwithoutsacrificingmodelingsimplicity—but
alsonotignoringpracticalrealities—anapproachhasbeen
taken using FEA software modeling along with laboratory
testing in a controlled-environment chamber to reason-
ably define and correlate the thermal resistance values
supplied in this data sheet: (1) Initially, FEA software is
used to accurately build the mechanical geometry of the
LTM4637 and the specified PCB with all of the correct
materialcoefficientsalongwithaccuratepowerlosssource
definitions; (2) this model simulates a software-defined
JEDECenvironmentconsistentwithJESD51-12topredict
powerlossheatflowandtemperaturereadingsatdifferent
interfacesthatenablethecalculationoftheJEDEC-defined
thermalresistancevalues;(3)the modeland FEA software
isusedtoevaluatetheLTM4637withheatsinkandairflow;
(4) having solved for and analyzed these thermal resis-
tance values and simulated various operating conditions
in the software model, a thorough laboratory evaluation
replicates the simulated conditions with thermocouples
As in the case of θ
, this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
JCbottom
4
θ , the thermal resistance from junction to the printed
JB
circuitboard,isthejunction-to-boardthermalresistance
where almost all of the heat flows through the bottom
oftheµModulepackageandintotheboard, andisreally
the sum of the θ
and the thermal resistance of
JCbottom
the bottom of the part through the solder joints and a
portionoftheboard.Theboardtemperatureismeasured
a specified distance from the package.
A graphical representation of the aforementioned ther-
mal resistances is given in Figure 7; blue resistances are
contained within the µModule regulator, whereas green
resistances are external to the µModule package.
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD 51-12 or provided in the
Pin Configuration section replicates or conveys normal
operatingconditionsofaµModuleregulator. Forexample,
in normal board-mounted applications, never does 100%
of the device’s total power loss (heat) thermally conduct
JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS
JUNCTION-TO-CASE (TOP)
CASE (TOP)-TO-AMBIENT
RESISTANCE
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
A
t
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
4637 F07
µMODULE DEVICE
Figure 7. Graphical Representation of JESD 51-12 Thermal Coefficients
4637f
17
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
within a controlled-environment chamber while operat-
ing the device at the same power loss as that which was
simulated. The outcome of this process and due diligence
yields the set of derating curves shown in this data sheet.
module loss as ambient temperature is increased.
The monitored junction temperature of 115°C minus
the ambient operating temperature specifies how much
module temperature rise can be allowed. As an example in
Figure 13 the load current is derated to ~17A at ~80°C with
no air or heat sink and the power loss for the 12V to 1.0V
at17Aoutputisabout3.36W. The3.36Wlossiscalculated
with the ~2.8W room temperature loss from the 12V to
1.0V power loss curve at 17A, and the 1.2 multiplying
factor at 80°C ambient. If the 80°C ambient temperature
is subtracted from the 115°C junction temperature, then
the difference of 35°C divided by 3.36W equals a 10°C/W
The 1V, 2.5V and 5V power loss curves in Figures 8 to 10
can be used in coordination with the load current derating
curves in Figures 11 to 20 for calculating an approximate
θ thermal resistance for the LTM4637 with various heat
JA
sinking and airflow conditions. The power loss curves
are taken at room temperature, and are increased with
multiplicativefactorsaccordingtotheambienttemperature.
These approximate factors are: 1 for 40°C; 1.05 for 50°C;
1.1 for 60°C; 1.15 for 70°C; 1.2 for 80°C; 1.25 for 90°C; 1.3
for 100°C; 1.35 for 110°C and 1.4 for 120°C. The derating
curves are plotted with the output current starting at 20A
andtheambienttemperatureat~40°C.Theoutputvoltages
are 1V, 2.5Vand5V. Thesearechosento includethelower,
middle and higher output voltage ranges for correlating
the thermal resistance. Thermal models are derived
from several temperature measurements in a controlled
temperature chamber along with thermal modeling
analysis. The junction temperatures are monitored while
ambienttemperatureisincreasedwithandwithoutairflow.
Thepowerlossincreasewithambienttemperaturechange
is factored into the derating curves. The junctions are
maintained at ~115°C maximum while lowering output
current or power with increasing ambient temperature.
The decreased output current will decrease the internal
θ thermal resistance. Table 2 specifies a 9.5°C/W value
JA
which is very close. Table 2 provides equivalent thermal
resistancesfor1.0V,2.5Vand5Voutputswithandwithout
airflowandheatsinking.Thederivedthermalresistancesin
Tables2thru 4for thevarious conditionscanbemultiplied
by the calculated power loss as a function of ambient
temperature to derive temperature rise above ambient,
thus maximum junction temperature. Room temperature
power loss can be derived from the efficiency curves
in the Typical Performance Characteristics section and
adjustedwiththeaboveambienttemperaturemultiplicative
factors. The printed circuit board is a 1.6mm thick four
layer board withtwo ounce copper for the two outer layers
and one ounce copper for the two inner layers. The PCB
dimensions are 95mm × 76mm. The BGA heat sinks are
listed in Table 6.
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
7
6
5
4
12V TO 1V P
LOSS
12V TO 5V P
LOSS
12V TO 2.5V P
LOSS
3
2
1
0
5V TO 2.5V P
LOSS
8V TO 5V P
LOSS
5V TO 1V P
LOSS
10
5
OUTPUT CURRENT (A)
10
5
OUTPUT CURRENT (A)
0
15
20
0
15
20
5
10
OUTPUT CURRENT (A)
20
0
15
4637 F08
4637 F09
4637 F10
Figure 10. 5VOUT Power Loss
Figure 9. 2.5VOUT Power Loss
Figure 8. 1VOUT Power Loss
4637f
18
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
25
25
25
20
15
10
5
20
20
15
15
10
5
10
5
0 LFM
0 LFM
0 LFM
200 LFM
400 LFM
200 LFM
400 LFM
200 LFM
400 LFM
0
0
0
40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
80
40 50 60 70
90 100 110 120
TEMPERATURE (°C)
4637 F11
4637 F12
4637 F13
Figure 11. 5VIN to 1.0VOUT No Heat Sink
Figure 13. 12VIN to 1.0VOUT No Heat Sink
Figure 12. 5VIN to 1.0VOUT with Heat Sink
25
20
15
10
25
20
15
10
25
20
15
10
5
5
5
0 LFM
200 LFM
0 LFM
200 LFM
0 LFM
200 LFM
400 LFM
0
40 50 60 70
400 LFM
0
40 50 60 70
400 LFM
0
40 50 60 70
80
80
80
90 100 110 120
90 100 110 120
90 100 110 120
TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4637 F14
4637 F15
4637 F16
Figure 14. 12VIN to 1.0VOUT with Heat Sink
Figure 15. 5VIN to 2.5VOUT No Heat Sink Figure 16. 5VIN to 2.5VOUT with Heat Sink
25
20
15
10
25
20
15
10
5
5
0 LFM
200 LFM
0 LFM
200 LFM
400 LFM
0
40 50 60 70
400 LFM
0
40 50 60 70
80
80
90 100 110 120
90 100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4637 F17
4637 F18
Figure 17. 12VIN to 2.5VOUT No Heat Sink
Figure 18. 12VIN to 2.5VOUT with Heat Sink
4637f
19
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LTM4637
APPLICATIONS INFORMATION
25
25
20
15
20
15
10
10
5
5
0 LFM
0 LFM
200 LFM
400 LFM
200 LFM
400 LFM
0
0
20 30 40 50 50 70 80 90 100 110 120
20 30 40 50 50 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4637 F20
AMBIENT TEMPERATURE (°C)
4637 F19
Figure 19. 12VIN to 5VOUT No Heat Sink, EXTVCC = 5V
(Limit 5V Output to 15A)
Figure 20. 12VIN to 5VOUT with Heat Sink, EXTVCC = 5V
(Limit 5V Output to 15A)
Table 2. 1V Output
DERATING
CURVE
POWER LOSS
AIRFLOW
V
CURVE
Figure 8
Figure 8
Figure 8
Figure 8
Figure 8
Figure 8
(LFM)
HEAT SINK
None
θ
JA
(°C/W)
9.5
7.5
IN
Figures 11, 13
Figures 11, 13
Figures 11, 13
Figures 12, 14
Figures 12, 14
Figures 12, 14
5V, 12V
5V, 12V
5V, 12V
5V, 12V
5V, 12V
5V, 12V
0
200
400
0
None
None
6.5
8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
200
400
6.0
5.0
Table 3. 2.5V Output
DERATING
CURVE
POWER LOSS
CURVE
AIRFLOW
(LFM)
V
HEAT SINK
None
θ
JA
(°C/W)
9.5
7.5
IN
Figures 15, 17
Figures 15, 17
Figures 15, 17
Figures 16, 18
Figures 16, 18
Figures 16, 18
5V, 12V
5V, 12V
5V, 12V
5V, 12V
5V, 12V
5V, 12V
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
0
200
400
0
None
None
6.5
8
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
200
400
6.0
5.0
Table 4. 5V Output (5V Output Connected to EXTVCC Pin)
DERATING
CURVE
POWER LOSS
CURVE
AIRFLOW
(LFM)
V
HEAT SINK
None
θ
JA
(°C/W)
9.5
IN
Figures 19
Figures 19
Figures 19
Figures 20
Figures 20
Figures 20
12V
12V
12V
12V
12V
12V
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
0
200
400
0
None
8.0
None
7.0
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
8.0
200
400
6.5
5.5
4637f
20
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LTM4637
APPLICATIONS INFORMATION
Table 5. Output Voltage Response vs Component Matrix (Refer to Figure 22) 0A to 10A Load Step
C
C
AND
C
OUT2
VENDOR
AND
OUT1
OUT1
OUT2
CERAMIC
C
BULK
C
IN
VENDOR
VALUE
PART NUMBER
VALUE
PART NUMBER VENDOR VALUE
PART NUMBER
25SVP56M
TDK
100µF 6.3V C4532X5ROJ107MZ Sanyo POSCAP 1000µF 2.5V 2R5TPD1000M5
100µF 6.3V GRM32ER60J107M Sanyo POSCAP 470µF 2.5V 2R5TPD470M5
Sanyo 56µF 25V
TDK 22µF 16V
Murata
C3216X651C226M
Sanyo POSCAP 470µF 6.3V
6TPD470M5
Murata 22µF 16V GRM31CR61C226KE15L
PEAK-TO-PEAK
LOAD
V
C
C
C
(CERAMIC)
OUT1
C
C
(pF)
150
V
DROP
(mV)
65
DEVIATION
(mV)
RECOVERY STEP
R
FB
FREQ
OUT
IN
IN
OUT2
AND C
FF
COMP
IN
(V)
†
(V) (CERAMIC) (BULK)
(BULK)
(pF)
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
330
47
TIME (µs) (A/µs) (kΩ) (kHz)
1
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
56µF
5,12
5,12
5,12
5,12
5,12
5,12
7,12
5,12
5,12
5,12
5,12
5,12
5,12
7,12
5,12
5,12
5,12
5,12
5,12
5,12
7,12
5,12
5,12
5,12
5,12
5,12
5,12
7,12
5,12
5,12
5,12
5,12
5,12
5,12
7,12
123
123
120
120
130
150
195
100
100
100
110
120
130
165
150
150
140
130
130
140
190
190
190
180
190
200
250
310
200
200
200
225
250
340
450
30
30
50
60
70
75
80
30
30
50
60
70
75
80
30
30
50
60
70
75
80
30
30
50
60
70
75
80
35
35
35
35
40
40
60
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
90.6
60.4
40.2
30.1
19.1
13.3
8.25
90.6
60.4
40.2
30.1
19.1
13.3
8.25
90.6
60.4
40.2
30.1
19.1
13.3
8.25
90.6
60.4
40.2
30.1
19.1
13.3
8.25
90.6
60.4
40.2
30.1
19.1
13.3
8.25
250
250
350
350
450
600
600
250
250
350
350
450
600
600
250
250
350
350
450
600
600
250
250
350
350
450
600
600
250
250
350
350
450
600
600
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
22µF × 4
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 3
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 2, 470µF × 2
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 4, 470µF × 1
100µF × 5
1.2
1.5
1.8
2.5
3.3
5
150
65
150
65
150
65
150
65
150
75
150
100
50
1
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
1.2
1.5
1.8
2.5
3.3
5
50
50
65
65
70
85
1
75
1.2
1.5
1.8
2.5
3.3
5
75
70
65
65
70
100
95
1
1.2
1.5
1.8
2.5
3.3
5
47
95
47
90
47
95
47
100
125
155
100
100
100
112
125
170
225
47
47
1
47
1.2
1.5
1.8
2.5
3.3
5
47
100µF × 5
100µF × 5
100µF × 5
100µF × 5
100µF × 5
100µF × 5
47
47
47
47
47
†
Bulk capacitance is optional if V has very low input impedance.
IN
4637f
21
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LTM4637
APPLICATIONS INFORMATION
Table 6. Recommended Heat Sinks
HEAT SINK MANUFACTURER
AAVID Thermalloy
PART NUMBER
WEBSITE
375424B00034G
www.aavidthermalloy.com
www.coolinnovations.com
Cool Innovations
4-050503P to 4-050508P
Safety Considerations
• Use large PCB copper areas for high current paths,
including V , GND and V . It helps to minimize the
IN
OUT
TheLTM4637doesnotprovidegalvanicisolationfromV
IN
PCB conduction loss and thermal stress.
to V . There is no internal fuse. If required, a slow blow
OUT
fuse with a rating twice the maximum input current needs
• Place high frequency ceramic input and output
tobeprovidedtoprotecteachunitfromcatastrophicfailure.
capacitors next to the V , GND and V
pins to
IN
OUT
minimize high frequency noise.
The fuse or circuit breaker should be selected to limit the
current to the regulator during overvoltage in case of an
internaltopMOSFETfault. IftheinternaltopMOSFETfails,
then turning it off will not resolve the overvoltage, thus
the internal bottom MOSFET will turn on indefinitely trying
to protect the load. Under this fault condition, the input
voltage will source very large currents to ground through
the failed internal top MOSFET and enabled internal bot-
tom MOSFET. This can cause excessive heat and board
damage depending on how much power the input voltage
can deliver to this system. A fuse or circuit breaker can be
used as a secondary fault protector in this situation. The
LTM4637doessupportovervoltageprotection,overcurrent
protection and overtemperature protection.
• Place a dedicated power ground layer underneath the
unit.
• To minimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on the pad, unless they are
capped or plated over.
• Place test points on signal pins for testing.
• Use a separated SGND ground copper area for
components connected to signal pins. Connect the
SGND to GND underneath the unit.
• Forparallelmodules,tietheCOMPandV pinstogether.
FB
Layout Checklist/Example
Use an internal layer to closely connect these pins
together.
The high integration of the LTM4637 makes the PCB
board layout very simple and easy. However, to optimize
its electrical and thermal performance, some layout
considerations are still necessary.
Figure21givesagoodexampleoftherecommendedlayout.
4637f
22
For more information www.linear.com/LTM4637
LTM4637
APPLICATIONS INFORMATION
V
IN
CONTROL
C
C
IN
IN
GND
SIGNAL
GROUND
C
C
OUT
OUT
V
V
OUT
OUT
4637 F21
Figure 21. Recommended PCB Layout
TYPICAL APPLICATIONS
INTV
CC
0.1µF
V
CC
1.8V
+
–
D
D
V
REF
470pF
LTC2997
4mV/K
V
PTAT
CC
GND
INTV
V
IN
4.5V TO 20V
C
IN
2.2µF
22µF
25V
×4
PGOOD
V
EXTV
INTV
CC
IN
CC
C7
0.1µF
V
1.5V
20A
OUT
R1
10k
COMP
V
OUT
V
OUT_LCL
+
C
*
C
*
OUT1
OUT2
TRACK/SS
RUN
470µF
6.3V
×2
100µF
6.3V
×2
DIFF_OUT
+
LTM4637
C
FF
330pF
f
V
SET
OSNS
CONTINUOUS
MODE
R3
75k
–
MODE_PLLIN
V
OSNS
TEMP
V
FB
SGND GND
R
FB
40.2k
4627 F22
*SEE TABLE 5
Figure 22. 4.5V to 20VIN, 1.5V at 20A Design
4637f
23
For more information www.linear.com/LTM4637
LTM4637
TYPICAL APPLICATIONS
4637f
24
For more information www.linear.com/LTM4637
LTM4637
TYPICAL APPLICATIONS
2.2µF
V
IN
5V TO 16V
INTV
C20
22µF
16V
C22
22µF
16V
CC
V
OUT
1.2V AT 80A
V
EXTV
INTV
CC CC
PGOOD
IN
C28
R1
10k
0.1µF
V
COMP
OUT
C24
C21
+
TRACK/SS
RUN
V
100µF
6.3V
×2
470µF
6.3V
×2
OUT_LCL
DIFF_OUT
+
LTM4637
470pF
f
V
OSNS
SET
–
MODE_PLLIN
V
OSNS
V
TEMP
50k
50k
50k
50k
FB
SGND
GND
R
FB2
15k
INTV
CC
R2
200k
4-PHASE CLOCK
+
SET
LTC6902
V
2.2µF
C2
1µF
MOD
DIV
C14
22µF
16V
C18
22µF
16V
22µF
25V
GND
PH
V
EXTV
INTV
PGOOD
CC
IN
CC
OUT4
OUT3
OUT1
OUT2
COMP
V
OUT
OUT_LCL
C15
C18
TRACK/SS
RUN
V
+
470µF
6.3V
×2
100µF
6.3V
×2
DIFF_OUT
+
LTM4637
f
V
SET
OSNS
–
MODE_PLLIN
V
OSNS
V
TEMP
FB
SGND
GND
2.2µF
C7
22µF
16V
C9
22µF
16V
V
EXTV
INTV
PGOOD
CC
IN
CC
COMP
V
OUT
OUT_LCL
C8
C11
TRACK/SS
RUN
V
+
470µF
6.3V
×2
100µF
6.3V
×2
DIFF_OUT
+
LTM4637
f
V
SET
OSNS
–
MODE_PLLIN
V
OSNS
V
TEMP
SGND
FB
GND
2.2µF
C3
22µF
16V
C1
22µF
16V
22µF
25V
V
EXTV
INTV
PGOOD
CC
IN
CC
COMP
V
OUT
OUT_LCL
C4
C6
TRACK/SS
RUN
V
+
470µF
6.3V
×2
100µF
6.3V
×2
DIFF_OUT
+
LTM4637
f
V
SET
OSNS
–
MODE_PLLIN
V
OSNS
V
TEMP
FB
SGND
GND
4637 F24
Figure 24. 1.2V, 80A, Current Sharing with 4-Phase Operation
4637f
25
For more information www.linear.com/LTM4637
LTM4637
PACKAGE DESCRIPTION
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
Pin Assignment Table (Arranged by Pin Number)
PIN ID
A1
FUNCTION
PIN ID
B1
FUNCTION
PIN ID
C1
FUNCTION
PIN ID
D1
FUNCTION PIN ID FUNCTION
PIN ID
F1
FUNCTION
GND
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
GND
GND
GND
–
E1
E2
GND
GND
GND
GND
GND
GND
GND
–
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
A2
B2
C2
D2
F2
GND
A3
B3
C3
D3
E3
F3
GND
A4
B4
C4
D4
E4
F4
GND
A5
B5
C5
D5
E5
F5
GND
A6
B6
C6
D6
E6
F6
GND
A7
INTV
B7
GND
–
C7
GND
–
D7
E7
F7
GND
CC
A8
MODE_PLLIN
TRACK/SS
RUN
B8
C8
D8
GND
E8
F8
GND
A9
B9
GND
–
C9
GND
MTP3
MTP4
MTP5
D9
INTV
E9
GND
–
F9
GND
CC
A10
A11
A12
B10
B11
B12
C10
C11
C12
D10
D11
D12
TEMP
MTP6
MTP7
E10
E11
E12
F10
F11
F12
–
COMP
MTP2
–
PGOOD
MTP1
f
EXTV
V
FB
SET
CC
PIN ID
G1
FUNCTION
GND
PIN ID
H1
FUNCTION
GND
GND
GND
GND
GND
GND
GND
GND
GND
–
PIN ID
J1
FUNCTION
PIN ID
K1
FUNCTION PIN ID FUNCTION
PIN ID
M1
FUNCTION
V
V
V
V
V
V
V
V
V
V
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
L1
L2
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
G2
GND
H2
J2
K2
M2
G3
GND
H3
J3
K3
L3
M3
G4
GND
H4
J4
K4
L4
M4
G5
GND
H5
J5
K5
L5
M5
G6
GND
H6
J6
K6
L6
M6
G7
GND
H7
J7
K7
L7
M7
G8
GND
H8
J8
K8
L8
M8
G9
GND
H9
J9
K9
L9
M9
G10
G11
G12
–
H10
H11
H12
J10
J11
J12
K10
K11
K12
L10
L11
L12
M10
M11
M12
OUT
SGND
PGOOD
SGND
SGND
–
V
+
OSNS
DIFF_OUT
V
V
–
OSNS
OUT_LCL
PACKAGE PHOTO
4637f
26
For more information www.linear.com/LTM4637
LTM4637
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Z
b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
4637f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
27
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTM4637
TYPICAL APPLICATION
1.8V at 20A Design
5V
C
IN
22µF
25V
×4
PGOOD
V
EXTV
INTV
CC CC
IN
V
1.8V
20A
C7
OUT
0.1µF
COMP
V
OUT
OUT_LCL
C4
R1
10k
100µF
6.3V
X5R
×2
+
TRACK/SS
RUN
V
C6
470µF
6V
DIFF_OUT
+
LTM4637
47pF
f
V
OSNS
SET
CONTINUOUS MODE
R3
75k
–
MODE_PLLIN
V
OSNS
TEMP
V
FB
SGND
GND
R
FB
30.1k
4627 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
Buck-Boost DC/DC µModule Family
Ultralow Noise High V DC/DC µModule Regulator
COMMENTS
All Pin Compatible; Up to 5A; Up to 36V , 34V
LTM4609
15mm × 15mm × 2.82mm
IN
OUT
LTM4612
5A, 5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, 15mm × 15mm × 2.82mm Package
OUT
IN
OUT
LTM4627
15A DC/DC µModule Regulator
4.5V ≤ V ≤ 20V, 0.6V ≤ V
≤ 5V, LGA and BGA Packages
IN
OUT
LTM4620
Dual 13A, Single 26A DC/DC µModule Regulator
Up to 100A with Four in Parallel, 4.5V ≤ V ≤ 16V, 0.6V ≤ V
≤ 2.5V
IN
OUT
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
Manufacturing:
• Selector Guides
• Quick Start Guide
• Demo Boards and Gerber Files
• Free Simulation Tools
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
4637f
LT 0413 • PRINTED IN USA
28 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTM4637
●
●
LINEAR TECHNOLOGY CORPORATION 2013
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