LTC6409CUDB#PBF [Linear]
LTC6409 - 10GHz GBW, 1.1nV/√Hz Differential Amplifier/ADC Driver; Package: QFN; Pins: 10; Temperature Range: 0°C to 70°C;
| 型号： | LTC6409CUDB#PBF |
| 厂家： | 
Linear |
| 描述： | LTC6409 - 10GHz GBW, 1.1nV/√Hz Differential Amplifier/ADC Driver; Package: QFN; Pins: 10; Temperature Range: 0°C to 70°C |
| 文件： | 总24页 (文件大小：445K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6409
10GHz GBW, 1.1nV/√Hz
Differential Amplifier/ADC Driver
FEATURES
DESCRIPTION
The LTC®6409 is a very high speed, low distortion, dif-
ferential amplifier. Its input common mode range includes
ground, so that a ground-referenced input signal can be
DC-coupled, level-shifted, and converted to drive an ADC
differentially.
n
10GHz Gain-Bandwidth Product
n
88dB SFDR at 100MHz, 2V
P-P
n
1.1nV/√Hz Input Noise Density
Input Range Includes Ground
n
n
External Resistors Set Gain (Min 1V/V)
n
3300V/µs Differential Slew Rate
The gain and feedback resistors are external, so that the
exact gain and frequency response can be tailored to each
application. For example, the amplifier could be externally
compensated in a no-overshoot configuration, which is
desired in certain time-domain applications.
n
52mA Supply Current
n
2.7V to 5.25V Supply Voltage Range
n
Fully Differential Input and Output
n
Adjustable Output Common Mode Voltage
n
Low Power Shutdown
n
The LTC6409 is stable in a differential gain of 1. This
allows for a low output noise in applications where gain
is not desired. It draws 52mA of supply current and has
a hardware shutdown feature which reduces current con-
sumption to 100µA.
Small 10-Lead 3mm × 2mm × 0.75mm QFN Package
APPLICATIONS
n
Differential Pipeline ADC Driver
n
High Speed Data-Acquisition Cards
The LTC6409 is available in a compact 3mm × 2mm
10-pin leadless QFN package and operates over a –40°C
to 125°C temperature range.
n
Automated Test Equipment
n
Time Domain Reflectometry
n
Communications Receivers
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
DC-Coupled Interface from a Ground-Referenced Single-Ended
Input to an LTC2262-14 ADC
LTC6409 Driving LTC2262-14 ADC,
fIN = 70MHz, –1dBFS,
1.3pF
fS = 150MHz, 4096-Point FFT
0
–10
V
V
= 3.3V
OUTDIFF
S
V
IN
= 1.8V
P-P
150Ω
150Ω
3.3V
HD2 = –86.5dBc
HD3 = –89.4dBc
SFDR = 81.6dB
SNR = 71.1dB
–20
1.8V
–30
39pF
10Ω
–40
V
DD
33.2Ω
33.2Ω
+
A
A
– +
LTC6409
IN
–50
–60
V
= 0.9V
150Ω
LTC2262-14 ADC
–
OCM
10Ω
39pF
–70
+ –
IN
GND
–80
–90
–100
–110
–120
150Ω
1.3pF
6409 TA01
0
10
20
30
40
50
60
70
FREQUENCY (MHz)
6409 TA01b
6409fb
1
For more information www.linear.com/LTC6409
LTC6409
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
+
–
Total Supply Voltage (V – V ).................................5.5V
Input Current (+IN, –IN, V , SHDN)
10
3
9
8
5
OCM
–OUT
+IN
1
2
7
6
+OUT
–IN
(Note 2)................................................................ 10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range
–
11,V
4
(Note 4).................................................. –40°C to 125°C
Specified Temperature Range
(Note 5).................................................. –40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
UDB PACKAGE
10-LEAD (3mm × 2mm) PLASTIC QFN
= 150°C, θ = 138°C/W, θ = 5.2°C/W
T
JMAX
JA
JC
–
EXPOSED PAD (PIN 11) CONNECTED TO V
http://www.linear.com/product/LTC6409#orderinfo
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
LTC6409CUDB#TRMPBF
LTC6409IUDB#TRMPBF
LTC6409HUDB#TRMPBF
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
LTC6409CUDB#TRPBF
LTC6409IUDB#TRPBF
LTC6409HUDB#TRPBF
LFPF
LFPF
LFPF
10-Lead (3mm × 2mm) Plastic QFN
10-Lead (3mm × 2mm) Plastic QFN
10-Lead (3mm × 2mm) Plastic QFN
–40°C to 85°C
–40°C to 125°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
CONDITIONS
V = 3V
MIN
TYP
MAX
UNITS
V
Differential Offset Voltage (Input Referred)
300
1000
1200
1100
1400
µV
µV
µV
µV
OSDIFF
S
l
l
V = 3V
S
V = 5V
300
S
V = 5V
S
l
l
ΔV
Differential Offset Voltage Drift (Input Referred)
Input Bias Current (Note 6)
V = 3V
2
2
µV/°C
µV/°C
OSDIFF
ΔT
S
V = 5V
S
l
l
I
I
V = 3V
–140
–160
–62
–70
0
0
µA
µA
B
S
V = 5V
S
l
l
Input Offset Current (Note 6)
Input Resistance
V = 3V
2
2
10
10
µA
µA
OS
S
V = 5V
S
R
Common Mode
Differential Mode
165
860
kΩ
Ω
IN
C
Input Capacitance
Differential Mode
0.5
1.1
8.8
6.9
pF
nV/√Hz
pA/√Hz
dB
IN
e
Differential Input Noise Voltage Density
Input Noise Current Density
Noise Figure at 100MHz
f = 1MHz, Not Including R /R Noise
I F
n
i
n
f = 1MHz, Not Including R /R Noise
I F
NF
Shunt-Terminated to 50Ω, R = 50Ω, R = 25Ω,
S I
R = 10kΩ
F
6409fb
2
For more information www.linear.com/LTC6409
LTC6409
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
e
Common Mode Noise Voltage Density
Input Signal Common Mode Range
f = 10MHz
12
nV/√Hz
nVOCM
l
l
V
V = 3V
0
0
1.5
3.5
V
V
ICMR
S
(Note 7)
V = 5V
S
l
l
CMRRI
Input Common Mode Rejection Ratio
V = 3V, V
from 0V to 1.5V
from 0V to 3.5V
75
75
90
90
dB
dB
S
ICM
ICM
(Note 8) (Input Referred) ΔV /ΔV
V = 5V, V
S
ICM
OSDIFF
l
l
CMRRIO Output Common Mode Rejection Ratio (Input
(Note 8) Referred) ΔV /ΔV
V = 3V, V
S
from 0.5V to 1.5V
from 0.5V to 3.5V
55
60
80
85
dB
dB
S
OCM
OCM
V = 5V, V
OCM
OSDIFF
l
l
l
PSRR
Differential Power Supply Rejection (ΔV /ΔV
)
V = 2.7V to 5.25V
60
85
dB
dB
V
S
OSDIFF
S
(Note 9)
PSRRCM Output Common Mode Power Supply Rejection
(Note 9) (ΔV /ΔV
V = 2.7V to 5.25V
S
55
70
)
OSCM
S
V
Supply Voltage Range (Note 10)
Common Mode Gain (ΔV /ΔV
2.7
5.25
S
l
l
G
)
V = 3V, V
S
from 0.5V to 1.5V
from 0.5V to 3.5V
1
1
V/V
V/V
CM
OUTCM
OCM
S
OCM
OCM
V = 5V, V
l
l
ΔG
Common Mode Gain Error, 100 × (G – 1)
V = 3V, V
S
from 0.5V to 1.5V
from 0.5V to 3.5V
0.1
0.1
0.3
0.3
%
%
CM
CM
S
OCM
OCM
V = 5V, V
BAL
Output Balance
ΔV
= 2V
OUTDIFF
Single-Ended Input
Differential Input
l
l
(ΔV
/ ΔV
)
–65
–70
–50
–50
dB
dB
OUTCM
OUTDIFF
l
l
V
Common Mode Offset Voltage (V
– V
)
V = 3V
S
1
1
5
6
mV
mV
OSCM
OUTCM
OCM
S
V = 5V
l
ΔV
Common Mode Offset Voltage Drift
Output Signal Common Mode Range
4
µV/°C
OSCM
ΔT
l
l
V
V = 3V
0.5
0.5
1.5
3.5
V
V
OUTCMR
S
(Note 7) (Voltage Range for the V
Pin)
V = 5V
S
OCM
l
R
Input Resistance, V
Pin
30
40
50
kΩ
INVOCM
OCM
OCM
V
Self-Biased Voltage at the V
Pin
V = 3V, V
S
= Open
= Open
0.85
1.25
V
V
OCM
S
OCM
OCM
l
V = 5V, V
0.9
1.6
l
l
l
l
V
Output Voltage, High, Either Output Pin
V = 3V, I = 0
1.85
1.8
3.85
3.8
2
V
V
V
V
OUT
S
L
V = 3V, I = –20mA
1.95
4
S
L
V = 5V, I = 0
S
L
V = 5V, I = –20mA
3.95
S
L
l
l
Output Voltage, Low, Either Output Pin
V = 3V, 5V; I = 0
0.06
0.2
0.15
0.4
V
V
S
L
V = 3V, 5V; I = 20mA
S
L
l
l
I
Output Short-Circuit Current, Either Output Pin
(Note 11)
V = 3V
S
50
70
70
95
mA
mA
SC
S
V = 5V
A
Large-Signal Open Loop Voltage Gain
Supply Current
65
52
dB
VOL
I
56
58
mA
mA
S
l
l
l
l
l
I
Supply Current in Shutdown
SHDN Pull-Up Resistor
SHDN Input Logic Low
SHDN Input Logic High
Turn-On Time
V
V
≤ 0.6V
100
150
500
185
0.6
µA
kΩ
V
SHDN
SHDN
R
= 0V to 0.5V
115
1.4
SHDN
IL
SHDN
V
V
V
IH
t
t
160
80
ns
ns
ON
OFF
Turn-Off Time
6409fb
3
For more information www.linear.com/LTC6409
LTC6409
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, VCM = VOCM = VICM = 1.25V, VSHDN = open. VS is
defined as (V+ – V–). VOUTCM is defined as (V+OUT + V–OUT)/2. VICM is defined as (V+IN + V–IN)/2. VOUTDIFF is defined as (V+OUT – V–OUT).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SR
Slew Rate
Differential Output, V
= 4V
3300
1720
1580
V/µs
V/µs
V/µs
OUTDIFF
+OUT Rising (–OUT Falling)
+OUT Falling (–OUT Rising)
P-P
GBW
Gain-Bandwidth Product
R = 25Ω, R = 10kΩ, f = 100MHz
TEST
9.5
8
10
GHz
GHz
I
F
l
f
f
–3dB Frequency
R = R = 150Ω, R
= 400Ω, C = 1.3pF
2
GHz
MHz
MHz
–3dB
I
F
LOAD
F
Frequency for 0.1dB Flatness
Full Power Bandwidth
25MHz Distortion
R = R = 150Ω, R
= 400Ω , C = 1.3pF
600
550
0.1dB
I
F
LOAD
F
FPBW
V = 2V
OUTDIFF P-P
HD2
HD3
Differential Input, V
= 2V
,
P-P
OUTDIFF
R = R = 150Ω, R
= 400Ω
I
F
LOAD
2nd Harmonic
–104
–106
dBc
dBc
3rd Harmonic
100MHz Distortion
25MHz Distortion
100MHz Distortion
Differential Input, V
= 2V
,
P-P
OUTDIFF
R = R = 150Ω, R
= 400Ω
I
F
LOAD
2nd Harmonic
–93
–88
dBc
dBc
3rd Harmonic
HD2
HD3
Single-Ended Input, V
= 2V
,
OUTDIFF
P-P
R = R = 150Ω, R
= 400Ω
I
F
LOAD
2nd Harmonic
–101
–103
dBc
dBc
3rd Harmonic
Single-Ended Input, V
= 2V
,
OUTDIFF
P-P
R = R = 150Ω, R
= 400Ω
I
F
LOAD
2nd Harmonic
–88
–93
dBc
dBc
3rd Harmonic
IMD3
OIP3
3rd Order IMD at 25MHz
V
= 2V Envelope, R = R = 150Ω,
–110
dBc
dBc
dBc
OUTDIFF
LOAD
P-P
I
F
f1 = 24.9MHz, f2 = 25.1MHz
R
= 400Ω
3rd Order IMD at 100MHz
f1 = 99.9MHz, f2 = 100.1MHz
V
= 2V Envelope, R = R = 150Ω,
= 400Ω
LOAD
–98
OUTDIFF P-P I F
R
3rd Order IMD at 140MHz
f1 = 139.9MHz, f2 = 140.1MHz
V
= 2V Envelope, R = R = 150Ω,
–88
OUTDIFF
P-P
I
F
R
= 400Ω
LOAD
Equivalent OIP3 at 25MHz (Note 12)
Equivalent OIP3 at 100MHz (Note 12)
Equivalent OIP3 at 140MHz (Note 12)
59
53
48
dBm
dBm
dBm
t
Settling Time
V
= 2V Step, R = R = 150Ω,
S
OUTDIFF P-P I F
LOAD
R
= 400Ω
1% Settling
1.9
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The LTC6409C/LTC6409I are guaranteed functional over the
temperature range of –40°C to 85°C. The LTC6409H is guaranteed
functional over the temperature range of –40°C to 125°C.
Note 5: The LTC6409C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6409C is designed, characterized and expected to
meet specified performance from –40°C to 85°C, but is not tested or
QA sampled at these temperatures. The LTC6409I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6409H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 2: Input pins (+IN, –IN, V , and SHDN) are protected by steering
OCM
diodes to either supply. If the inputs should exceed either supply voltage,
the input current should be limited to less than 10mA. In addition, the
inputs +IN, –IN are protected by a pair of back-to-back diodes. If the
differential input voltage exceeds 1.4V, the input current should be limited
to less than 10mA.
Note 6: Input bias current is defined as the average of the input currents
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
flowing into the inputs (–IN and +IN). Input offset current is defined as the
+
–
difference between the input currents (I = I – I ).
OS
B
B
6409fb
4
For more information www.linear.com/LTC6409
LTC6409
ELECTRICAL CHARACTERISTICS
Note 7: Input common mode range is tested by testing at both V = 1.25V
Effects of Resistor Pair Mismatch in the Applications Information section
of this data sheet). For a better indicator of actual amplifier performance
independent of feedback component matching, refer to the PSRR
specification.
ICM
and at the Electrical Characteristics table limits to verify that the differential
offset (V ) and the common mode offset (V ) have not deviated by
OSDIFF OSCM
more than 1mV and 2mV respectively from the V = 1.25V case.
ICM
The voltage range for the output common mode range is tested by
Note 9: Differential power supply rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
offset voltage. Common mode power supply rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
output common mode offset voltage.
applying a voltage on the V
pin and testing at both V
= 1.25V and
OCM
OCM
at the Electrical Characteristics table limits to verify that the common
mode offset (V ) has not deviated by more than 6mV from the
OSCM
= 1.25V case.
V
OCM
Note 8: Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins +IN or –IN to the change in differential
input referred offset voltage. Output CMRR is defined as the ratio of
Note 10: Supply voltage range is guaranteed by power supply rejection
ratio test.
Note 11: Extended operation with the output shorted may cause the
junction temperature to exceed the 150°C limit.
Note 12: Refer to Relationship Between Different Linearity Metrics in the
Applications Information section of this data sheet for information on how
to calculate an equivalent OIP3 from IMD3 measurements.
the change in the voltage at the V
pin to the change in differential
OCM
input referred offset voltage. This specification is strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs and it is difficult to measure actual amplifier performance (See
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Input Offset Voltage
vs Temperature
Differential Input Offset Voltage
vs Input Common Mode Voltage
Common Mode Offset Voltage
vs Temperature
1.5
1.0
0.5
0
2.0
1.5
1.0
0.5
0
2.5
2.0
1.5
1.0
0.5
0
V
V
= 5V
OCM
S
= 1.25V
R = R = 150Ω
I
F
0.1% FEEDBACK NETWORK RESISTORS
REPRESENTATIVE UNIT
V
V
= 5V
OCM
S
= V
= 1.25V
ICM
R = R = 150Ω
I
F
FIVE REPRESENTATIVE UNITS
V
V
= 5V
OCM
S
= V
= 1.25V
ICM
R = R = 150Ω
I
F
FIVE REPRESENTATIVE UNITS
T
T
T
T
T
= 85°C
= 70°C
= 25°C
= 0°C
A
A
A
A
A
–0.5
–1.0
= –40°C
–0.5
–0.5
–50 –25
0
25
50
75 100 125
0
0.5
1
1.5
2
2.5
3
3.5
4
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
INPUT COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
6409 G01
6409 G03
6409 G02
Shutdown Supply Current vs
Supply Voltage
Supply Current vs Supply Voltage
Supply Current vs SHDN Voltage
60
55
50
45
40
35
30
25
20
15
10
5
60
55
50
45
40
35
30
25
20
15
10
5
140
120
100
80
T
T
T
T
T
T
= 125°C
= 85°C
= 70°C
= 25°C
= 0°C
V
= OPEN
V = 5V
S
A
A
A
A
A
A
SHDN
= –40°C
60
T
T
T
T
T
T
= 125°C
= 85°C
= 70°C
= 25°C
= 0°C
T
T
T
T
T
T
= 125°C
= 85°C
= 70°C
= 25°C
= 0°C
A
A
A
A
A
A
A
A
A
A
A
A
40
20
–
= –40°C
= –40°C
V
SHDN
= V
0
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
SHDN VOLTAGE (V)
SUPPLY VOLTAGE (V)
6409 G04
6409 G05
6409 G06
6409fb
5
For more information www.linear.com/LTC6409
LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Output Voltage Noise
vs Frequency
Differential Output Impedance
vs Frequency
Input Noise Density vs Frequency
1000
100
10
1000
100
10
1000
100
10
1000
100
10
V = 5V
S
V
= 5V
F
V
S
= 5V
S
I
R = R = 150Ω
R = R = 150Ω
I
F
INCLUDES R /R NOISE
I
F
i
n
1
e
0.1
0.01
n
1
1
1
1
10
100
1000
10000
1
1k
1M
1G
1
1k
1M
1G
FREQUENCY (MHz)
FREQUENCY (Hz)
FREQUENCY (Hz)
6409 G09
6409 G18
6409 G07
CMRR vs Frequency
Differential PSRR vs Frequency
Small Signal Step Response
100
90
80
70
60
50
40
30
20
10
–OUT
90
80
70
60
50
+OUT
V
V
= 5V
S
= V = 1.25V
20mV/DIV
OCM
ICM
R
= 400Ω
LOAD
V
V
= 5V
OCM
S
= 1.25V
R = R = 150Ω, C = 1.3pF
R = R = 150Ω, C = 1.3pF
I
L
IN
F
F
I
F
F
C
V
= 0pF
0.1% FEEDBACK NETWORK
RESISTORS
= 200mV , DIFFERENTIAL
V
S
= 5V
P-P
6409 G12
1
10
100
1000
10000
1
10
100
1000
10000
2ns/DIV
FREQUENCY (MHz)
FREQUENCY (MHz)
6409 G10
6409 G11
Overdriven Output Transient
Response
Large Signal Step Response
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–OUT
–OUT
V
V
= 5V
S
= 1.25V
0.2V/DIV
OCM
R
= 200Ω TO
LOAD
GROUND PER
OUTPUT
+OUT
V
= 5V
LOAD
= 2V , DIFFERENTIAL
P-P
S
R
= 400Ω
+OUT
20ns/DIV
V
IN
6409 G14
6409 G13
2ns/DIV
6409fb
6
For more information www.linear.com/LTC6409
LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response vs Closed
Loop Gain
Frequency Response vs Load
Capacitance
60
20
10
C
C
C
C
C
= 0pF
= 0.5pF
= 1pF
= 1.5pF
= 2pF
A
= 400
L
L
L
L
L
V
50
40
A
V
= 100
A
V
(V/V) R (Ω)
R (Ω) C (pF)
F F
I
1
2
5
150
100
50
150
200
250
500
500
1.3
1
0.8
0.4
0.4
0
A
A
A
= 20
= 10
= 5
30
V
0
V
V
20
10
20
50
25
10
A
A
= 2
= 1
V
V
V
V
= 5V
= V
–10
–20
–30
S
= 1.25V
ICM
0
OCM
100
400
25
25
2.5k
10k
R
= 400Ω
LOAD
0
–10
–20
–30
R = R = 150Ω, C = 1.3pF
I
F
F
V
OCM
R
= 5V
= V
S
CAPACITOR VALUES ARE FROM
EACH OUTPUT TO GROUND.
V
= 1.25V
ICM
= 400Ω
LOAD
NO SERIES RESISTORS ARE USED.
1
10
100
1000
10000
10
100
1000
10000
FREQUENCY (MHz)
FREQUENCY (MHz)
6409 G15
6409 G16
Gain 0.1dB Flatness
Slew Rate vs Temperature
3400
3375
3350
3325
3300
3275
3250
3225
3200
0.5
0.4
V
S
= 5V
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
V
V
= 5V
S
= V
= 1.25V
ICM
OCM
LOAD
R
= 400Ω
R = R = 150Ω, C = 1.3pF
I
F
F
–50 –25
0
25
50
75 100 125
1
10
100
1000
10000
TEMPERATURE (°C)
FREQUENCY (MHz)
6409 G08
6409 G17
Harmonic Distortion vs Output
Common Mode Voltage
Harmonic Distortion vs Input
Amplitude
Harmonic Distortion vs Frequency
–50
–60
–30
–40
–80
–90
V
V
= 5V
V
IN
R
= 5V
V
V
= 5V
S
S
S
= V
= 1.25V
f
= 100MHz
= V
= 1.25V
ICM
OCM
LOAD
ICM
OCM
R
= 400Ω
= 400Ω
f
= 100MHz
IN
LOAD
HD3
R = R = 150Ω
R = R = 150Ω
R
= 400Ω
LOAD
I
F
I
F
–50
V
= 2V
V
= 2V
R = R = 150Ω
I F
–70
OUTDIFF
P-P
OUTDIFF
P-P
HD3
DIFFERENTIAL INPUTS
DIFFERENTIAL INPUTS
DIFFERENTIAL INPUTS
–60
–80
HD2
–70
–100
–110
–120
HD2
–90
–80
HD3
–100
–110
–120
–90
HD2
3
–100
–110
1
10
100
1000
0.5
1
1.5
2
2.5
3.5
–4
(0.4V
–2
0
2
4
6
8
10
(2V
)
P-P
)
FREQUENCY (MHz)
OUTPUT COMMON MODE VOLTAGE (V)
INPUT AMPLITUDE (dBm)
P-P
6409 G19
6409 G20
6409 G21
6409fb
7
For more information www.linear.com/LTC6409
LTC6409
TYPICAL PERFORMANCE CHARACTERISTICS
Harmonic Distortion vs Output
Harmonic Distortion vs Input
Amplitude
Harmonic Distortion vs Frequency
Common Mode Voltage
–50
–60
–30
–40
–80
–90
V
V
= 5V
V
IN
R
= 5V
V
V
= 5V
S
OCM
= 100MHz
IN
S
S
= V
= 1.25V
f
= 100MHz
= V
= 1.25V
ICM
OCM
LOAD
ICM
R
= 400Ω
= 400Ω
f
LOAD
HD2
R = R = 150Ω
V
R = R = 150Ω
I F
I
F
–50
= 2V
V
= 2V
OUTDIFF P-P
–70
OUTDIFF
P-P
SINGLE-ENDED INPUT
SINGLE-ENDED INPUT
–60
–80
–70
–100
–110
–120
HD3
–90
–80
HD2
HD3
HD2
–100
–110
–120
–90
R
I
= 400Ω
R = R = 150Ω
LOAD
–100
–110
HD3
10
F
SINGLE-ENDED INPUT
10
(2V )
P-P
1
100
1000
0.5
1
1.5
2
2.5
3
3.5
–4
(0.4V
–2
0
2
4
6
8
)
P-P
FREQUENCY (MHz)
OUTPUT COMMON MODE VOLTAGE (V)
INPUT AMPLITUDE (dBm)
6409 G22
6409 G23
6409 G24
Intermodulation Distortion vs
Frequency
Intermodulation Distortion vs
Output Common Mode Voltage
Intermodulation Distortion vs
Input Amplitude
–30
–40
–80
–90
–50
–60
V
f
= 5V
V
V
f
= 5V
S
OCM
V
V
= 5V
S
IN
R
S
= 100MHz
= 400Ω
= V
= 1.25V
ICM
= V
= 1.25V
ICM
OCM
LOAD
= 100MHz
LOAD
R
= 400Ω
LOAD
IN
R = R = 150Ω
R
= 400Ω
R = R = 150Ω
I
F
I
F
–50
2 TONES, 200kHz TONE
R = R = 150Ω
2 TONES, 200kHz TONE
–70
I F
SPACING, 2V COMPOSITE
2 TONES, 200kHz TONE SPACING
DIFFERENTIAL INPUTS
SPACING, 2V COMPOSITE
P-P
P-P
–60
DIFFERENTIAL INPUTS
DIFFERENTIAL INPUTS
–80
–70
–100
–110
–120
–90
–80
–100
–110
–120
–90
–100
–110
0.5
1
1.5
2
2.5
3
3.5
2
4
6
8
10
(2V
10
100
1000
(0.8V
)
)
OUTPUT COMMON MODE VOLTAGE (V)
P-P
INPUT AMPLITUDE (dBm)
P-P
FREQUENCY (MHz)
6409 G25
6409 G26
6409 G27
PIN FUNCTIONS
+IN, –IN (Pins 2, 6): Non-Inverting and Inverting Input
Pins.
V
(Pin 5): Output Common Mode Reference Voltage.
OCM
The voltage on this pin sets the output common mode
voltage level. If left floating, an internal resistor divider
develops a default voltage of 1.25V with a 5V supply.
SHDN (Pin 3): When SHDN is floating or directly tied to
V+, the LTC6409 is in the normal (active) operating mode.
–
When the SHDN pin is connected to V , the part is dis-
abled and draws approximately 100µA of supply current.
+OUT, –OUT (Pins 7, 1): Differential Output Pins.
–
Exposed Pad (Pin 11): Tie the bottom pad to V . If split
supplies are used, DO NOT tie the pad to ground.
+
–
V , V (Pins 4, 9 and Pins 8, 10): Positive and Negative
Power Supply Pins. Similar pins should be connected to
the same voltage.
6409fb
8
For more information www.linear.com/LTC6409
LTC6409
BLOCK DIAGRAM
2
1
+IN
–OUT
–
+
–
3
5
4
10
9
V
V
V
–
+
–
SHDN
V
V
V
+
+
V
V
V
V
200k
50k
+
–
V
V
OCM
–
–
+
8
V
+
–IN
+OUT
6
7
6409 BD
APPLICATIONS INFORMATION
Functional Description
Moreover, the input pins, as well as VOCM and SHDN
pins, have clamping diodes to either power supply. If
these pins are driven to voltages which exceed either
supply, the current should be limited to 10mA to prevent
damage to the IC.
The LTC6409 is a small outline, wideband, high speed,
low noise, and low distortion fully-differential amplifier
with accurate output phase balancing. The amplifier is
optimized to drive low voltage, single-supply, differential
input analog-to-digital converters (ADCs). The LTC6409
input common mode range includes ground, which makes
it ideal to DC-couple and convert ground-referenced,
single-ended signals into differential signals that are ref-
erenced to the user-supplied output common mode volt-
age. This is ideal for driving these differential ADCs. The
balanced differential nature of the amplifier also provides
even-order harmonic distortion cancellation, and low
susceptibility to common mode noise (like power sup-
ply noise). The LTC6409 can operate with a single-ended
input and differential output, or with a differential input
and differential output.
SHDN Pin
The SHDN pin is a CMOS logic input with a 150k inter-
nal pull-up resistor. If the pin is driven low, the LTC6409
powers down. If the pin is left unconnected or driven
high, the part is in normal active operation. Some care
should be taken to control leakage currents at this pin to
prevent inadvertently putting the LTC6409 into shutdown.
The turn-on and turn-off time between the shutdown and
active states is typically less than 200ns.
General Amplifier Applications
In Figure 1, the gain to V
given by:
from V and V
is
INM
OUTDIFF
INP
The outputs of the LTC6409 are capable of swinging from
+
close-to-ground to 1V below V . They can source or sink
up to approximately 70mA of current. Load capacitances
should be decoupled with at least 10Ω of series resistance
from each output.
RF
RI
VOUTDIFF = V+OUT – V–OUT
≈
• V – V
(
INP INM
)
(1)
Note from Equation (1), the differential output voltage
(V – V ) is completely independent of input and
output common mode voltages, or the voltage at the com-
mon mode pin. This makes the LTC6409 ideally suited
for pre-amplification, level shifting and conversion of
Input Pin Protection
+OUT
–OUT
The LTC6409 input stage is protected against differential
input voltages which exceed 1.4V by two pairs of series
diodes connected back to back between +IN and –IN.
6409fb
9
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
R
R
F
I
that can be processed is even wider. The input common
mode range at the op amp inputs depends on the circuit
configuration (gain), VOCM and VCM (refer to Figure 1). For
V
+IN
V
–OUT
+
–
V
INP
fully differential input applications, where V = –V
,
INP
INM
+
the common mode input is approximately:
V
V
OCM
VOCM
+
–
V
+IN + V–IN
RI
RI +RF
RF
RI +RF
–
V
=
≈ VOCM
•
+ VCM •
V
CM
ICM
–
+
2
V
INM
R
R
F
I
V
–IN
With single-ended inputs, there is an input signal compo-
nent to the input common mode voltage. Applying only
(setting V
age is approximately:
V
+OUT
6409 F01
Figure 1. Circuit for Common Mode Range
V
to zero), the input common mode volt-
INP
INM
single-ended signals to differential output signals for
driving differential input ADCs.
V+IN + V–IN
RI
RI +RF
V
ICM
=
≈ VOCM
•
+
(2)
2
Output Common Mode and V
Pin
OCM
RF
RI +RF
V
RF
RI +RF
INP
VCM
•
+
•
The output common mode voltage is defined as the aver-
age of the two outputs:
2
This means that if, for example, the input signal (VINP
is a sine, an attenuated version of that sine signal also
appears at the op amp inputs.
)
V
+OUT + V–OUT
VOUTCM = VOCM
=
2
As the equation shows, the output common mode voltage
is independent of the input common mode voltage, and
is instead determined by the voltage on the V
means of an internal common mode feedback loop.
Input Impedance and Loading Effects
pin, by
OCM
The low frequency input impedance looking into the V
INP
or V
input of Figure 1 depends on how the inputs are
INM
If the V pin is left open, an internal resistor divider
driven. For fully differential input sources (V = –V ),
OCM
INP
INM
develops a default voltage of 1.25V with a 5V supply. The
the input impedance seen at either input is simply:
V
pin can be overdriven to another voltage if desired.
OCM
R
INP
= R = R
INM I
For example, when driving an ADC, if the ADC makes a
reference available for setting the common mode voltage,
For single-ended inputs, because of the signal imbalance
at the input, the input impedance actually increases over
the balanced differential case. The input impedance look-
ing into either input is:
it can be directly tied to the V
pin, as long as the ADC
OCM
is capable of driving the 40k input resistance presented
by the VOCM pin. The Electrical Characteristics table speci-
fies the valid range that can be applied to the V
pin
OCM
RI
RINP = RINM
=
(V
).
OUTCMR
1
RF
1–
•
2 RI +RF
Input Common Mode Voltage Range
The LTC6409’s input common mode voltage (V ) is
ICM
+IN
has been
Input signal sources with non-zero output impedances
can also cause feedback imbalance between the pair of
feedback networks. For the best performance, it is rec-
ommended that the input source output impedance be
compensated. If input impedance matching is required
defined as the average of the two input pins, V and
V
. The valid range that can be used for V
–IN
ICM
specified in the Electrical Characteristics table (VICMR).
However, due to external resistive divider action of the
gain and feedback resistors, the effective range of signals
6409fb
10
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
by the source, a termination resistor RT should be chosen
(see Figure 2) such that:
R
R
I2
F2
V
+IN
V
–OUT
+
–
V
INP
R
INM •RS
+
RT =
V
RINM –RS
V
OCM
VOCM
–
–
+
According to Figure 2, the input impedance looking into
the differential amp (RINM) reflects the single-ended
source case, given above. Also, R2 is chosen as:
V
INM
R
R
F1
I1
V
–IN
V
+OUT
6409 F03
Figure 3. Real-World Application with Feedback
Resistor Pair Mismatch
RT •RS
R2 = RT ||RS =
RT +RS
Δb is defined as the difference in the feedback factors:
R
INM
RI2
RI1
R
R
R
F
∆b =
–
S
I
RI2 +RF2 RI1 +RF1
R
V
T
T
S
Here, VCM and VINDIFF are defined as the average and
–
+
–
the difference of the two input voltages V and V
,
INP
INM
respectively:
R
CHOSEN SO THAT R || R
= R
S
+
T
INM
S
R2 CHOSEN TO BALANCE R || R
T
R
R
F
V
INP + V
I
INM
VCM
=
6409 F02
2
R2 = R || R
S
T
V
INDIFF
= V – V
INP INM
Figure 2. Optimal Compensation for Signal Source Impedance
When the feedback ratios mismatch (Δb), common mode
to differential conversion occurs. Setting the differential
Effects of Resistor Pair Mismatch
input to zero (V
= 0), the degree of common mode
INDIFF
Figure 3 shows a circuit diagram which takes into consid-
eration that real world resistors will not match perfectly.
Assuming infinite open loop gain, the differential output
relationship is given by the equation:
to differential conversion is given by the equation:
∆b
bAVG
VOUTDIFF = V+OUT – V–OUT ≈ (VCM – VOCM )•
(3)
RF
RI
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of
both signals and noise. Using 0.1% resistors or better
will mitigate most problems and will provide about 54dB
worst case of common mode rejection. A low impedance
ground plane should be used as a reference for both the
VOUTDIFF = V+OUT – V–OUT ≈ V
•
+
INDIFF
∆b
bAVG
∆b
bAVG
VCM
•
– VOCM •
where RF is the average of RF1, and RF2, and RI is the
average of R , and R .
input signal source and the V
pin.
OCM
I1
I2
There may be concern on how feedback factor mismatch
affects distortion. Feedback factor mismatch from using
1% resistors or better, has a negligible effect on distor-
tion. However, in single supply level shifting applications
where there is a voltage difference between the input com-
mon mode voltage and the output common mode voltage,
b
is defined as the average feedback factor from the
AVG
outputs to their respective inputs:
1
bAVG = •
2
RI1
RI2
+
RI1 +RF1 RI2 +RF2
6409fb
11
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
resistor mismatch can make the apparent voltage offset
of the amplifier appear worse than specified.
2
2
e
e
nRF
nRI
R
R
F
I
2
i
i
n+
The apparent input referred offset induced by feedback
factor mismatch is derived from Equation (3):
+
V
V
≈ (V – V
) • Δb
OCM
OSDIFF(APPARENT)
CM
2
OCM
e
no
Using the LTC6409 in a single 5V supply application with
0.1% resistors, the input common mode grounded, and
–
2
n–
the V
pin biased at 1.25V, the worst case mismatch
OCM
2
can induce 1.25mV of apparent offset voltage.
e
ni
2
2
e
nRI
e
nRF
R
I
R
F
Noise and Noise Figure
6409 F04
The LTC6409’s differential input referred voltage and
current noise densities are 1.1nV/√Hz and 8.8pA/√Hz,
respectively. In addition to the noise generated by the
amplifier, the surrounding feedback resistors also contrib-
ute noise. A simplified noise model is shown in Figure 4.
The output noise generated by both the amplifier and the
feedback components is given by the equation:
Figure 4. Simplified Noise Model
1000
100
10
TOTAL (AMPLIFIER AND
FEEDBACK NETWORK)
OUTPUT NOISE
2
RF
RI
2
eni • 1+
+ 2 • i •R
+
(
)
n
F
FEEDBACK
NETWORK
NOISE
1
eno
=
2
RF
RI
2
2 • enRI
•
+ 2 • enRF
0.1
10
100
1000
R = R (Ω)
10000
I
F
6409 F05
If the circuits surrounding the amplifier are well balanced,
Figure 5. LTC6409 Output Noise vs Noise
Contributed by Feedback Network Alone
common mode noise (e
) of the amplifier does not
appear in the differentinaVlOoCuMtput noise equation given
above. A plot of this equation and a plot of the noise
generated by the feedback components for the LTC6409
are shown in Figure 5.
Lower resistor values always result in lower noise at the
penalty of increased distortion due to increased loading
by the feedback network on the output. Higher resistor
values will result in higher output noise, but typically
improved distortion due to less loading on the output.
For this reason, when LTC6409 is configured in a differ-
ential gain of 1, using feedback resistors of at least 150Ω
is recommended.
The LTC6409’s input referred voltage noise contributes
the equivalent noise of a 75Ω resistor. When the feedback
network is comprised of resistors whose values are larger
than this, the output noise is resistor noise and amplifier
current noise dominant. For feedback networks consist-
ing of resistors with values smaller than 75Ω, the output
noise is voltage noise dominant (see Figure 5).
To calculate noise figure (NF), a source resistance and the
noise it generates should also come into consideration.
Figure 6 shows a noise model for the amplifier which
includes the source resistance (RS). To generalize the
6409fb
12
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
2
2
e
nRF
Finally, noise figure can be obtained as:
e
nRI
R
I
R
F
2
eno
eno
2
i +
n
NF = 10log 1+
2
(RS)
R
S
R
T
+
Figure 7 specifies the measured total output noise (e ),
2
V
OCM
no
e
no
excluding the noise contribution of source resistance, and
noise figure (NF) of LTC6409 configured at closed loop
gains (AV = RF/RI) of 1V/V, 2V/V and 5V/V. The circuits
in the left column use termination resistors and trans-
formers to match to the 50Ω source resistance, while the
circuits in the right column do not have such matching.
For simplicity, DC-blocking and bypass capacitors have
not been shown in the circuits, as they do not affect the
noise results.
–
2
i –
n
2
2
e
nRS
e
nRT
2
e
ni
2
2
e
nRI
e
nRF
R
I
R
F
6409 F06
Figure 6. A More General Noise Model Including
Source and Termination Resistors
calculation, a termination resistor (R ) is included and
T
Relationship Between Different Linearity Metrics
its noise contribution is taken into account.
Linearity is, of course, an important consideration in many
amplifier applications. This section relates the inter-mod-
ulation distortion of fully differential amplifiers to other
linearity metrics commonly used in RF style blocks.
Now, the total output noise power (excluding the noise
contribution of R ) is calculated as:
S
2
Intercept points are specifications that have long been
used as key design criteria in the RF communications
world as a metric for the intermodulation distortion
performance of a device in the signal chain (e.g., ampli-
fiers, mixers, etc.). Intercept points, like noise figures,
can be easily cascaded back and forth through a signal
chain to determine the overall performance of a receiver
chain, thus resulting in simpler system-level calculations.
Traditionally, these systems use primarily single-ended RF
amplifiers as gain blocks designed to operate in a 50Ω
environment, just like the rest of the receiver chain. Since
intercept points are given in dBm, this implies an associ-
ated impedance of 50Ω.
RF
RT ||R
2
2
eno 2 = eni • 1+
+ 2 • i •R
F
+
(
)
n
S
RI +
2
RF
2
2 • enRI
•
+ 2 • enRF
+
RT ||R
2
S
RI +
2
RF
RI
2RI ||RS
R + 2R ||R
e
•
•
nRT
(
)
T
I
S
Meanwhile, the output noise power due to noise of R is
However, for LTC6409 as a differential feedback amplifier
with low output impedance, a 50Ω resistive load is not
required (unlike an RF amplifier). This distinction is impor-
tant when evaluating the intercept point for LTC6409. In
fact, the LTC6409 yields optimum distortion performance
when loaded with 200Ω to 1kΩ (at each output), very
similar to the input impedance of an ADC. As a result,
terminating the input of the ADC to 50Ω can actually be
detrimental to system performance.
S
given by:
2
RF
RI
2RI ||RT
2
eno
= e
•
nRS
•
(RS)
R + 2R ||R
(
)
I
T
S
6409fb
13
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
1.3pF
1.3pF
150Ω
150Ω
150Ω
150Ω
150Ω
1:4
+
+
50Ω
50Ω
e
= 4.70nV/√Hz
e
= 5.88nV/√Hz
no
NF = 14.41dB
no
NF = 17.59dB
600Ω
150Ω
V
V
OCM
OCM
+
–
+
–
V
IN
V
IN
–
–
150Ω
1.3pF
150Ω
1.3pF
1pF
1pF
100Ω
200Ω
100Ω
100Ω
200Ω
1:4
+
V
+
50Ω
50Ω
e
= 5.77nV/√Hz
e
= 9.76nV/√Hz
no
NF = 10.43dB
no
NF = 16.66dB
V
OCM
OCM
+
–
+
–
V
IN
V
IN
–
–
100Ω
200Ω
1pF
200Ω
1pF
0.4pF
500Ω
0.8pF
250Ω
100Ω
100Ω
50Ω
50Ω
1:4
+
V
+
50Ω
50Ω
e
= 11.69nV/√Hz
e
= 14.23nV/√Hz
no
NF = 8.81dB
no
NF = 13.56dB
V
OCM
OCM
+
–
+
–
V
IN
V
IN
–
–
500Ω
0.4pF
250Ω
0.8pF
6409 F07
Figure 7. LTC6409 Measured Output Noise and Noise Figure at Different Closed Loop Gains with and without Source Impedance Matching
The definition of 3rd order intermodulation distortion
(IMD3) is shown in Figure 8. Also, a graphical repre-
sentation of how to relate IMD3 to output/input 3rd
order intercept points (OIP3/IIP3) has been depicted in
Figure 9. Based on this figure, Equation (4) gives the
definition of the intercept point, relative to the intermodu-
lation distortion.
P is the output power of each of the two tones at which
IMD3 is measured, as shown in Figure 9. It is calculated
in dBm as:
O
V2
PDIFF
PO = 10log
(5)
2 •RL •10–3
where R is the differential load resistance, and V
is
PDIFF
L
IMD3
OIP3 = PO +
the differential peak voltage for a single tone. Normally,
intermodulation distortion is specified for a benchmark
(4)
2
composite differential peak of 2V at the output of the
P-P
6409fb
14
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
results in a lower intercept point. Therefore, it is impor-
tant to consider the impedance seen by the output of the
LTC6409 when working with intercept points.
∆f = f2 – f1 = f1 – (2f1 – f2) = (2f2 – f1) – f2
P
O
P
O
Comparing linearity specifications between different
amplifier types becomes easier when a common imped-
ance level is assumed. For this reason, the intercept
points for LTC6409 are reported normalized to a 50Ω
load impedance. This is the reason why OIP3 in the
Electrical Characteristics table is 4dBm more than half
the absolute value of IMD3.
IMD3 = P – P
S
O
P
P
S
S
2f1 – f2 f1
f2
2f2 – f1
FREQUENCY
6409 F08
Figure 8. Definition of IMD3
If the top half of the LTC6409 demo board (DC1591A,
shown in Figure 12) is used to measure IMD3 and OIP3,
one should make sure to properly convert the power seen
at the differential output of the amplifier to the power that
appears at the single-ended output of the demo board.
Figure 10 shows an equivalent representation of the top
half of the demo board. This view ignores the DC-blocking
and bypass capacitors, which do not affect the analysis
here. The transmission line transformers (used mainly
for impedance matching) are modeled here as ideal 4:1
impedance transformers together with a –1dB block. This
separates the insertion loss of the transformer from its
ideal behavior. The 100Ω resistors at the LTC6409 output
create a differential 200Ω resistance, which is an imped-
P
OUT
(dBm)
1×
OIP3
P
O
P
S
P
IMD3
IIP3
IN
(dBm)
3×
6409 F10
Figure 9. Graphical Representation of the
Relationship between IMD3 and OIP3
ance match for the reflected R .
L
As previously mentioned, IMD3 is measured for 2VP-P dif-
ferential peak (i.e. 10dBm) at the output of the LTC6409,
amplifier, implying that each single tone is 1V , result-
P-P
ing in V
= 0.5V. Using R = 50Ω as the associated
PDIFF
L
corresponding to 1V (i.e. 4dBm) at each output alone.
P-P
impedance, P is calculated to be close to 4dBm.
O
From LTC6409 output (location A in Figure 10) to the
input of the output transformer (location B), there is
a voltage attenuation of 1/2 (or –6dB) formed by the
As seen in Equation (5), when a higher impedance is used,
the same level of intermodulation distortion performance
C
F
R
F
R
S
R
R
T
T
50Ω
100Ω
100Ω
C
R
R
R
I
1dB
LOSS
IDEAL
1:4
IDEAL
4:1
1dB
LOSS
L
+
V
LTC6409
A
B
S
–
50Ω
I
6409 F10
R
F
C
F
Figure 10. Equivalent Schematic of the Top Half of the LTC6409 Demo Board
6409fb
15
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
lower frequencies (where the input signal frequencies
typically lie, e.g. 100MHz) the amplifier’s gain and thus
the feedback loop gain is larger. This has the important
advantage of further linearizing the amplifier and improv-
ing distortion at those frequencies.
resistive divider between the R • 4 = 200Ω differential
resistance seen at location B aLnd the 200Ω formed by
the two 100Ω matching resistors at the LTC6409 output.
Thus, the differential power at location B is 10 – 6 = 4dBm.
Since the transformer ratio is 4:1 and it has an insertion
loss of about 1dB, the power at location C (across R ) is
L
Looking at the Frequency Response vs Closed Loop Gain
graph in the Typical Performance Characteristics section
of this data sheet, one sees that for a closed loop gain
calculated to be 4 – 6 – 1 = –3dBm. This means that IMD3
should be measured while the power at the output of the
demo board is –3dBm which is equivalent to having 2VP-P
differential peak (or 10dBm) at the output of the LTC6409.
(A ) of 1 (where R = R = 150Ω), f is about 2GHz.
V
I
F
–3dB
However, for A = 400 (where R = 25Ω and R = 10kΩ),
V
I
F
the gain at 100MHz is close to 40dB = 100V/V, implying
GBW vs f
–3dB
a GBW value of 10GHz.
Gain-bandwidth product (GBW) and –3dB frequency
(f–3dB) have been both specified in the Electrical
Characteristics table as two different metrics for the speed
of the LTC6409. GBW is obtained by measuring the gain
of the amplifier at a specific frequency (fTEST) and cal-
Feedback Capacitors
When the LTC6409 is configured in low differential gains,
it is often advantageous to utilize a feedback capacitor (C )
F
F
in parallel with each feedback resistor (R ). The use of C
F
culate gain • f
. To measure gain, the feedback factor
TEST
implements a pole-zero pair (in which the zero frequency
is usually smaller than the pole frequency) and adds posi-
tive phase to the feedback loop gain around the amplifier.
(i.e. b = R /(R + R )) is chosen sufficiently small so that
I
I
F
the feedback loop does not limit the available gain of the
LTC6409 at f , ensuring that the measured gain is the
TEST
Therefore, if properly chosen, the addition of C boosts
F
open loop gain of the amplifier. As long as this condition
is met, GBW is a parameter that depends only on the
internal design and compensation of the amplifier and is
a suitable metric to specify the inherent speed capability
of the amplifier.
the phase margin and improves the stability response of
the feedback loop. For example, with R = R = 150Ω, it is
I
F
recommended for most general applications to use C =
1.3pF across each RF. This value has been selectedFto
maximize f
for the LTC6409 while keeping the peaking
–3dB
of the closed loop gain versus frequency response under
f
, on the other hand, is a parameter of more practi-
–3dB
a reasonable level (<1dB). It also results in the highest
frequency for 0.1dB gain flatness (f
cal interest in different applications and is by definition
the frequency at which the gain is 3dB lower than its low
).
0.1dB
frequency value. The value of f
depends on the speed
–3dB
However, other values of CF can also be utilized and tailored
to other specific applications. In general, a larger value
of the amplifier as well as the feedback factor. Since the
LTC6409 is designed to be stable in a differential signal
for C reduces the peaking (overshoot) of the amplifier in
F
gain of 1 (where R = R or b = 1/2), the maximum f
I
F
–3dB
both frequency and time domains, but also decreases the
is obtained and measured in this gain setting, as reported
closed loop bandwidth (f
). For example, while for a
–3dB
in the Electrical Characteristics table.
closed loop gain (AV) of 5, CF = 0.8pF results in maximum
f
(as previously shown in the Frequency Response vs
In most amplifiers, the open loop gain response exhibits a
conventional single-pole roll-off for most of the frequen-
–3dB
Closed Loop Gain graph of this data sheet), if C = 1.2pF
F
is used, the amplifier exhibits no overshoot in the time
domain which is desirable in certain applications. Both the
circuits discussed in this section have been shown in the
Typical Applications section of this data sheet.
cies before crossover frequency and the GBW and f
–3dB
numbers are close to each other. However, the LTC6409
is intentionally compensated in such a way that its GBW
is significantly larger than its f–3dB. This means that at
6409fb
16
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
Board Layout and Bypass Capacitors
Driving ADCs
For single supply applications, it is recommended that
high quality 0.1µF||1000pF ceramic bypass capacitors
be placed directly between each V+ pin and its closest
V pin with short connections. The V pins (including the
Exposed Pad) should be tied directly to a low impedance
ground plane with minimal routing.
The LTC6409’s ground-referenced input, differential out-
put and adjustable output common mode voltage make
it ideal for interfacing to differential input ADCs. These
ADCs are typically supplied from a single-supply voltage
and have an optimal common mode input range near mid-
supply. The LTC6409 interfaces to these ADCs by provid-
ing single-ended to differential conversion and common
mode level shifting.
–
–
For dual (split) power supplies, it is recommended that
additional high quality 0.1µF||1000pF ceramic capaci-
+
–
tors be used to bypass V pins to ground and V pins to
ground, again with minimal routing.
The sampling process of ADCs creates a transient that is
caused by the switching in of the ADC sampling capaci-
tor. This momentarily shorts the output of the amplifier
as charge is transferred between amplifier and sampling
capacitor. The amplifier must recover and settle from this
load transient before the acquisition period has ended, for
a valid representation of the input signal. The LTC6409
will settle quickly from these periodic load impulses. The
RC network between the outputs of the driver and the
inputs of the ADC decouples the sampling transient of
the ADC (see Figure 11). The capacitance serves to pro-
vide the bulk of the charge during the sampling process,
while the two resistors at the outputs of the LTC6409
are used to dampen and attenuate any charge injected
by the ADC. The RC filter gives the additional benefit of
band limiting broadband output noise. Generally, longer
time constants improve SNR at the expense of settling
time. The resistors in the decoupling network should be
at least 10Ω. These resistors also serve to decouple the
LTC6409 outputs from load capacitance. Too large of a
resistor will leave insufficient settling time. Too small of
a resistor will not properly dampen the load transient of
the sampling process, prolonging the time required for
settling. In 16-bit applications, this will typically require
a minimum of eleven RC time constants. For lowest dis-
tortion, choose capacitors with low dielectric absorption
(such as a C0G multilayer ceramic capacitor).
For driving heavy differential loads (<200Ω), additional
bypass capacitance may be needed for optimal perfor-
mance. Keep in mind that small geometry (e.g., 0603)
surface mount ceramic capacitors have a much higher
self-resonant frequency than do leaded capacitors, and
perform best in high speed applications.
To prevent degradation in stability response, it is highly
recommended that any stray capacitance at the input
pins, +IN and –IN, be kept to an absolute minimum by
keeping printed circuit connections as short as possible.
This becomes especially true when the feedback resistor
network uses resistor values greater than 500Ω in circuits
with R = R .
I
F
At the output, always keep in mind the differential nature
of the LTC6409, because it is critical that the load imped-
ances seen by both outputs (stray or intended), be as bal-
anced and symmetric as possible. This will help preserve
the balanced operation of the LTC6409 that minimizes the
generation of even-order harmonics and maximizes the
rejection of common mode signals and noise.
The VOCM pin should be bypassed to the ground plane
with a high quality ceramic capacitor of at least 0.01µF.
This will prevent common mode signals and noise on this
pin from being inadvertently converted to differential sig-
nals and noise by impedance mismatches both externally
and internally to the IC.
6409fb
17
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
1.3pF
V
IN
150Ω
150Ω
33.2Ω
2
1
+IN
–OUT LTC6409
SHDN
CONTROL
–
V
SHDN
–
V
V
V
10
3
4
+
V
10Ω
10Ω
LTC2262-14
ADC
D13
•
0.1µF||1000pF
5V
+
+
–
A
A
5V
V
IN
+
+
–
V
V
•
39pF
39pF
+
–
0.1µF||1000pF
9
8
V
OCM
D0
–
IN
0.1µF||1000pF
1.8V
V
GND V
DD
CM
1µF
V
OCM
5
0.1µF
–IN
+OUT
6
7
1µF
6409 F11
100Ω
150Ω
150Ω
33.2Ω
1.3pF
Figure 11. Driving an ADC
6409fb
18
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
R5
150Ω, 0.1%
C22
1.3pF
+
V
T1
T2
TCM4-19
4:1
4
TCM4-19
9
1:4
C23
+
C18
V
R9
R3
XFMR MINI-CIRCUITS
+
XFMR MINI-CIRCUITS
S
0.1µF
0.1µF
V
150Ω, 0.1%
100Ω
1
7
Sd
3
1
2
5
R14
0Ω
R1
+IN
V
0Ω
–OUT
Pd
P
6
4
4
6
J1
IN
J2
OUT
C25
C29
0.1µF
C24
0.1µF
C19
0.1µF
0.1µF
LTC6409UDB
CT
2
1
2
3
CT
Sd
OCM
R10
150Ω, 0.1%
R13
OPT
R2
OPT
P
Pd
S
6
3
+OUT
–IN
–
V
R4
100Ω
–
R12
R11
V
SHDN
–
300Ω
300Ω
V
11
10
+
E2
V
8
V
CM
C32
0.1µF
C26
R15
OPT
0.1µF
E4
OCM
C27
1.3pF
V
R17
10Ω
R16
OPT
C28
0.1µF
SHDN1
1
2
3
R8
DIS
EN
150Ω, 0.1%
JP1
CALIBRATION PATH
T3
TCM4-19
1:4
T4
TCM4-19
4:1
C31
0.1µF
C14
0.1µF
R21
75Ω
XFMR MINI-CIRCUITS
Sd
XFMR MINI-CIRCUITS
S
3
1
R18
R27
0Ω
0Ω
Pd
P
6
4
4
6
J3
CAL IN
J4
CAL OUT
R20
300Ω
R22
300Ω
C30
0.1µF
C21
0.1µF
C20
0.1µF
C15
0.1µF
CT
2
1
2
3
CT
Sd
R24
75Ω
R19
OPT
R26
OPT
P
Pd
S
R23
300Ω
R25
300Ω
C1
100pF
R28
150Ω, 0.1%
C13
1.3pF
C2
0.01µF
+
C3
0.1µF
V
4
9
C4
+
V
0.47µF
R31
0Ω
R33
150Ω, 0.1%
R34
50Ω
R36
0Ω
+
V
1
2
5
J5
J7
+IN
C5
100pF
+IN
–OUT
LTC6409UDB
+OUT
–OUT
R32
OPT
R35
OPT
+
V
V
OCM
OCM
R37
0Ω
R39
150Ω, 0.1%
R40
50Ω
R7
0Ω
V
C6
0.01µF
E1
6
3
J6
–IN
J8
+OUT
+
–IN
V
–
7
V
R38
OPT
R6
OPT
C16
0.1µF
–
V
SHDN
–
C7
V
11
10
0.1µF
C12
10µF
C10
1000pF
8
C8
0.47µF
C11
0.1µF
C9
1000pF
C17
1.3pF
R30
10Ω
E3
GND
SHDN2
1
2
3
R29
150Ω, 0.1%
DIS
EN
6409 F12
JP2
Figure 12. Demo Board DC1591A Schematic
6409fb
19
For more information www.linear.com/LTC6409
LTC6409
APPLICATIONS INFORMATION
Figure 13. Demo Board DC1591A Layout
6409fb
20
For more information www.linear.com/LTC6409
LTC6409
TYPICAL APPLICATIONS
DC-Coupled Level Shifting of an I/Q Demodulator Output
C5
0.9pF
5V
5V
DC LEVEL
3.4V
DC LEVEL
1.25V
DIFF OUTPUT Z
130Ω| |2.5pF
LT5575
R5
620Ω
5V
DC LEVEL
3.9V
5pF
5pF
5V
R1
R3
65Ω
65Ω
–8.9dBm
227mV
3.4dBm
936mV
I
75Ω
75Ω
P-P
P-P
+
–OUT
+OUT
–
RF IN
1900MHz
–10dBm
C3
12pF
R2
75Ω
R4
75Ω
LTC6409
+
–
200mV
P-P
C1
10pF
C2
10pF
5V
5V
LO
1920MHz
0dBm
V
OCM
5pF
65Ω
5pF
1.25V
65Ω
R6
620Ω
Q
IDENTICAL
Q CHANNEL
C4
0.9pF
6409 TA02
GAIN: 1.1dB
GAIN: 12.3dB
Single-Ended to Differential Conversion Using LTC6409 and 50MHz Lowpass Filter (Only One Channel Shown)
3.3V
0.8pF
1.8V
0.1µF
1.8V
150Ω
474Ω
INPUT
C5
B6
180nH
68pF
180nH
150pF
37.4Ω
+
66.5Ω
V
+IN
–IN
–OUT
75Ω
+
–
+
+
–
+
–
+
–
A
A
B2
B1
E8
E7
G7
G8
H8
H7
O1A
O1A
DCO
DCO
FR
IN1
IN1
LTC6409
V
OCM
33pF
75Ω
68pF
150pF
180nH
–
+OUT
180nH
37.4Ω
B3
C2
C1
F2
F1
F3
G2
G1
150Ω
474Ω
0.8pF
V
A
A
A
A
V
A
A
SHDN
CM12
+
IN2
LTM9011-14
FR
49.9Ω
66.5Ω
–
IN2
+
IN3
GND
–
IN3
CM34
+
IN4
–
IN4
N1
N2
+
A
A
IN8
–
IN8
6409 TA03
P5 P6
6409fb
21
For more information www.linear.com/LTC6409
LTC6409
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC6409#packaging for the most recent package drawings.
UDB Package
10-Lead Plastic QFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1848 Rev A)
0.25 ±0.05
0.95 ±0.05
0.65 ±0.05
0.90 ±0.05
2.50 ±0.05
1.10 ±0.05
0.05 ±0.05
DETAIL B
DETAIL B
PACKAGE
OUTLINE
0.25 ±0.10
0.75 ±0.05
0.25 ±0.05
0.50 BSC
0.85 ±0.05
3.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.40 ±0.10
0.90 ±0.10
0.05 ±0.10
DETAIL A
R = 0.13
TYP
0.70 ±0.10
8
10
1
2
7
6
0.80
BSC
2.00 ±0.05
0.75 ±0.05
DETAIL A
5
3
0.60 ±0.10
0.50 ±0.10
3.00 ±0.05
0.25 ±0.05
(UDB10) DFN 0910 REV A
0.50 BSC
0.20 REF
BOTTOM VIEW—EXPOSED PAD
SIDE VIEW
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6409fb
22
For more information www.linear.com/LTC6409
LTC6409
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/10 Revised Typical Application drawing
05/17 Corrected spelling of “reflectometry”
21
1
B
6409fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC6409
TYPICAL APPLICATIONS
LTC6409 Externally Compensated for Maximum Gain Flatness and for No-Overshoot Time-Domain Response
1.3pF
Gain 0.1dB Flatness
0.5
0.4
150Ω
5V
0.3
1/2 AGILENT
E5071A
1/2 AGILENT
E5071A
0.1µF 75Ω
0.1µF
0.1µF
0.2
150Ω
= 1.25V
150Ω
150Ω
PORT 1
50Ω
PORT 3
– +
LTC6409
0.1
50Ω
V
0.1µF
75Ω
OCM
0
PORT 2
50Ω
PORT 4
50Ω
+ –
–0.1
–0.2
–0.3
–0.4
–0.5
150Ω
150Ω
1.3pF
1
10
100
1000
10000
FREQUENCY (MHz)
1.2pF
No-Overshoot Step Response
250Ω
5V
–OUT
TEKTRONIX
0.1µF
0.1µF
0.1µF
CSA8200 SCOPE
50Ω
= 1.25V
150Ω
150Ω
CHANNEL 1
50Ω
– +
LTC6409
V
0.1µF
OCM
50Ω
CHANNEL 2
50Ω
+ –
50Ω
+
0.4V
V
IN
P-P
–
49.9Ω
6409 TA04
+OUT
250Ω
1.2pF
2ns/DIV
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
–71dBc IM3 at 240MHz 2V Composite, I = 90mA,
LTC6400-8/LTC6400-14/ 1.8GHz Low Noise, Low Distortion, Differential
LTC6400-20/LTC6400-26 ADC Drivers
P-P
S
A
= 8dB/14dB/20dB/26dB
V
LTC6401-8/LTC6401-14/ 1.3GHz Low Noise, Low Distortion, Differential
LTC6401-20/LTC6401-26 ADC Drivers
–74dBc IM3 at 140MHz 2V Composite, I = 50mA,
P-P S
V
A
= 8dB/14dB/20dB/26dB
LTC6406/LTC6405
3GHz/2.7GHz Low Noise, Rail-to-Rail Input
Differential Amplifier/Driver
–70dBc/–65dBc Distortion at 50MHz, I = 18mA, 1.6nV/
√
Hz Noise,
S
3V/5V Supply
LTC6416
2GHz Low Noise, Differential 16-Bit ADC Buffer
16-Bit, 160Msps ADC
–72.5dBc IM3 at 300MHz 2V Composite, 150mW on 3.6V Supply
P-P
LTC2209
100dB SFDR, V = 3.3V, V = 1.25V
DD CM
LTC2262-14
14-Bit, 150Msps Ultralow Power 1.8V ADC
88dB SFDR, 149mW, V = 1.8V, V = 0.9V
DD CM
6409fb
LT 0517 REV B • PRINTED IN USA
www.linear.com/LTC6409
24
LINEAR TECHNOLOGY CORPORATION 2010
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