LTC6410CUD-6-PBF_技术文档

LTC6410-6

Low Distortion, Low Noise

Differential IF Ampliﬁer with

Conﬁgurable Input Impedance

DESCRIPTION

FEATURES

The LTC^®6410-6 is a low distortion, low noise differential

IF ampliﬁer with conﬁgurable input impedance designed

for use in applications from DC to 1.4GHz. The LTC6410-6

has 6dB of voltage gain. The LTC6410-6 is an excellent

choice for interfacing active mixers to SAW ﬁlters. It fea-

tures an active input termination that allows a customized

input impedance for an optimum interface to differential

active mixers. This feature provides additional power gain

becauseoftheimpedanceconversionandimprovednoise

performance when compared to traditional 50Ω interface

circuits. The LTC6410-6 drives a differential 50Ω load

directly with low distortion, which is suitable for driving

SAW ﬁlters and other 50Ω signal chain blocks.

n

1.4GHz –3dB Bandwidth

n

Fixed Voltage Gain of 6dB (50Ω System)

n

Conﬁgurable Input Impedance Allows:

Simple Interface to Active Mixers

Improved Noise Performance

n

Wide 2.8V to 5.25V Supply Range

n

Low Distortion:

36dBm OIP3 (70MHz)

33dBm OIP3 (140MHz)

31dBm OIP3 (300MHz)

n

Low Noise:

11dB NF (50Ω Z )

8dB NF (200Ω Z )

IN

n

Differential Inputs and Outputs

The LTC6410-6 operates on 3V or 5V supplies. It comes in

acompact16-lead3mm×3mmQFNpackageandoperates

over a –40°C to 85°C temperature range.

Self-Biasing Inputs/Outputs

Shutdown Mode

Minimal Support Circuitry Required

16-Lead 3mm × 3mm × 0.8mm QFN Package

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

APPLICATIONS

n

Post-Mixer Gain Block

n

SAW Filter Interface/Buffering

n

Differential IF Signal Chain Gain Block

Differential Line Driver/Receiver

n

TYPICAL APPLICATION

2-Tone Spectrum Analyzer Plot

Post Mixer Gain Block (140MHz IF)

5V

0

5V

–10

–20

82nH

12pF

680pF

0.1μF

–TERM

–IN

–30

–40

–50

–60

–70

–80

–90

–100

24nH

18pF

+

V

SHDN

–OUT

+OUT

LTC6410-6

24nH

18pF

V

BIAS

+IN

–

V

64106 TA01a

+TERM

12pF

0.1μF

1760MHz

LO

130 132 134 136 138 140 142 144 146 148 150

FREQUENCY (MHz)

LT5527

MIXER

SYSTEM OIP3 = 29dBm AT 1900MHz

SYSTEM NF = 15dB AT 1900MHz

64106 TA01b

64106fa

1

LTC6410-6

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

+

–

TOP VIEW

Total Supply Voltage (V to V )................................5.5V

Ampliﬁer Input Current (DC)

(+IN, –IN, +TERM, –TERM) ............................. 10mA

Ampliﬁer Input Power (AC)

16 15 14 13

–

V

1

2

3

4

12 V

V

11 SHDN

BIAS

(+IN, –IN, +TERM, –TERM) .............................18dBm

17

+

V

10

9

Input Current (V

, SHDN)................................ 10mA

BIAS

–

V

Output Current (+OUT, –OUT) .............................. 50mA

Operating Temperature Range (Note 2).... –40°C to 85°C

Speciﬁed Temperature Range (Note 3) .... –40°C to 85°C

Storage Temperature Range................... –65°C to 150°C

Junction Temperature .......................................... 150°C

Lead Temperature (Soldering, 10 sec) .................. 300°C

5

6

7

8

UD PACKAGE

16-LEAD (3mm × 3mm) PLASTIC QFN

= 150°C, θ = 68°C/W, θ = 4.2°C/W

T

JMAX

JA

JC

–

EXPOSED PAD (PIN 17) IS V , MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

LTC6410CUD-6#PBF

LTC6410IUD-6#PBF

TAPE AND REEL

PART MARKING*

LDBG

PACKAGE DESCRIPTION

TEMPERATURE RANGE (Notes 2, 3)

LTC6410CUD-6#TRPBF

LTC6410IUD-6#TRPBF

16-Lead (3mm × 3mm) Plastic QFN

–40°C to 85°C

LDBG

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

The ^ldenotes the speciﬁcations which apply over the full

3V DC ELECTRICAL CHARACTERISTICS

operating temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 3V, V^–= 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is

shorted to –TERM, V_BIAS= 1.5V, +IN = –IN = 1.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L= 50Ω from

+OUT to –OUT, unless otherwise noted. V_BIASis deﬁned as the voltage on the V_BIASpin. V_OUTCMis deﬁned as (+OUT + –OUT)/2. V_INCM

is deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT). See DC test circuit schematic.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

G

Differential Gain

V

= 0.2V

INDIFF

5.0

4.7

6.0

6.7

7.0

dB

DIFF

l

(Low Frequency S21)

TC G

Differential Gain Temperature

Coefﬁcient

0.003

2.8

0.7

2.1

42

dB/°C

DIFF

SWINGDIFF

SWINGMIN

SWINGMAX

OUT

V

Differential Output Voltage Swing

V

= 2V

2.2

2.0

V

OUTDIFF, INDIFF

P-P

l

Output Swing Low

Single-Ended +OUT, –OUT, V

= 2V

0.9

1.0

V

INDIFF

Output Swing High

Single-Ended +OUT, –OUT, V

1.9

1.8

V

I

Output Current Drive

Input Offset Voltage

Short +OUT to –OUT, V

= 2V (Note 4)

38

36

mA

INDIFF

V

OS

–2.0

–3.0

0.4

2.0

3.0

mV

64106fa

2

LTC6410-6

3V DC ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full

operating temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 3V, V^–= 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is

shorted to –TERM, V_BIAS= 1.5V, +IN = –IN = 1.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L= 50Ω from

+OUT to –OUT, unless otherwise noted. V_BIASis deﬁned as the voltage on the V_BIASpin. V_OUTCMis deﬁned as (+OUT + –OUT)/2. V_INCM

is deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT). See DC test circuit schematic.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

–0.3

13

MAX

UNITS

l

TC V

Input Offset Voltage Drift

Common Mode Offset Voltage

μV/°C

OS

V

– V

INCM

–40

–50

40

50

mV

OSINCM

OUTCM

A

Internal Voltage Gain

2.7

V/V

V

l

I

Input Common Mode Voltage Range,

(Min)

1.0

VRMIN

I

Input Common Mode Voltage Range,

(Max)

2.0

V

VRMAX

R

Differential Input Resistance

V = 100mV (Note 4)

INDIFF

40

30

58

80

100

Ω

INDIFF

l

X

Differential Input Reactance

Input Common Mode Resistance

Common Mode Rejection Ratio

Differential Output Resistance

f = 100MHz

1

1000

60

pF

Ω

INDIFF

R

INCM

l

CMRR

V

= 1.5V, +IN = –IN = 1V to 2V, (ΔV

/Gain)

OUTDIFF

45

dB

BIAS

R

= 100mV (Note 4)

17

13

22

38

47

Ω

ODIFF

OUTDIFF

X

Differential Output Reactance

f = 100MHz

10

7

nH

Ω

OUTDIFF

R

Common Mode Output Resistance

OUTCM

Bias Voltage Control (V

Pin)

BIAS

G

Common Mode Gain

V

= 1.2V to 1.8V (+IN and –IN ﬂoating),

OUTCM

0.7

0.6

0.86

1.0

2.0

100

3.0

3

1.0

V/V

CM

BIAS

ΔV

/(0.6V)

l

V

Output Common Mode Voltage

Adjustment Range, (Min)

1.2

V

OCMMIN

OCMMAX

OSCM

l

Output Common Mode Voltage

Adjustment Range, (Max)

1.8

V

Output Common Mode Offset Voltage

V

– V

–200

–400

300

400

mV

OUTCM

BIAS

l

R

VOCM

V

Input Resistance

Input Capacitance

2.4

2.0

3.6

4.0

kΩ

BIAS

C

pF

VBIAS

BIAS

SHDN Pin

l

V

SHDN Input Low Voltage

SHDN Input High Voltage

SHDN Input Low Current

SHDN Input High Current

0.8

1.0

1.8

V

IL

2

0

IH

I

IL

I

IH

SHDN = 0.8V

SHDN = 2V

–200

–150

–85

–30

μA

Power Supply

l

V

Operating Range

Supply Current

2.8

5.25

V

S

I

104

130

140

mA

S

l

I

Supply Current in Shutdown

Power Supply Rejection Ratio

SHDN = 0.8V

3

5

mA

dB

SSHDN

+

PSRR

V = 2.8V to 5.25V, V

= +IN = –IN = V /2

73

100

BIAS

64106fa

3

LTC6410-6

5V DC ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full

operating temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 5V, V^–= 0V, SHDN = 3V, +IN is shorted to +TERM, –IN is

shorted to –TERM, V_INCM= V_BIAS= 2.5V, +IN = –IN = 2.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L=

50Ω from +OUT to –OUT, unless otherwise noted. V_BIASis deﬁned as the voltage on theV_BIASpin. V_OUTCMis deﬁned as (+OUT + –OUT)/2.

V_INCMis deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT). See DC test circuit schematic.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

G

Differential Gain (Low Frequency S21)

V

= 0.2V

IN

5

6.1

6.7

7.0

dB

DIFF

l

4.7

V

Differential Output Voltage Swing

Output Swing Low

V

, V = 4V

4.1

3.5

4.8

1.1

3.5

125

V

SWINGDIFF

SWINGMIN

SWINGMAX

OUTDIFF IN

P-P

Single-Ended +OUT, –OUT, V = 4V

1.4

1.6

V

IN

Output Swing High

Single-Ended +OUT, –OUT, V = 4V

3.2

3.0

V

IN

I

S

Supply Current

150

160

mA

SHDN Pin

l

V

SHDN Input Low Voltage

SHDN Input High Voltage

SHDN Input Low Current

SHDN Input High Current

1.8

2.0

2.8

V

IL

3

0

IH

I

IL

I

IH

SHDN = 1.8V

SHDN = 3V

–300

–200

–110

–60

μA

AC ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 3V, V^–= 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is shorted to

–TERM, V_INCM= V_BIAS= 1.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L= 50Ω from +OUT to –OUT, +IN

and –IN are AC-coupled, unless otherwise noted. V_BIASis deﬁned as the voltage on theV_BIASpin. V_OUTCMis deﬁned as

(+OUT + –OUT)/2. V_INCMis deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT).

SYMBOL

–3dBBW

0.1dBBW

0.5dBBW

SR

PARAMETER

CONDITIONS

MIN

TYP

1.4

150

300

1.5

3

MAX

UNITS

GHz

MHz

V/ns

ns

–3dB Bandwidth

Bandwidth for 0.1dB Flatness

Bandwidth for 0.5dB Flatness

Slew Rate

V

INDIFF

V

INDIFF

V

INDIFF

= –10dBm

1

t

1% Settling Time

Turn-On Time

1% Settling for a 1V

V

Step

s

P-P OUTDIFF

SHDN = 0V to 3V, +OUT and –OUT Within 10% of Final Values

SHDN = 3V to 0V, +OUT and –OUT Within 10% of Final Values

30

ns

ON

OFF

Turn-Off Time

30

ns

Common Mode Voltage Control (V

Pin)

BIAS

–3dBBWCM Common Mode Small-Signal

–3dB Bandwidth

0.2V at V

, Measured V

BIAS OUTCM

1

GHz

V/μs

P-P

SRCM

Common Mode Slew Rate

100

Noise/Harmonic Performance Input/Output Characteristics

10MHz Signal

HD2

HD3

Second Harmonic Distortion

Third Harmonic Distortion

V

= 0dBm

–85

–71

dBc

OUTDIFF

= 0dBm

64106fa

4

LTC6410-6

AC ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 3V, V^–= 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is shorted to

–TERM, V_INCM= V_BIAS= 1.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L= 50Ω from +OUT to –OUT, +IN

and –IN are AC-coupled, unless otherwise noted. V_BIASis deﬁned as the voltage on theV_BIASpin. V_OUTCMis deﬁned as

(+OUT + –OUT)/2. V_INCMis deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT).

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

IM3

Third Order Intermodulated

Distortion

F1 = 9.5MHz, F2 = 10.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

–72

dBc

OUTDIFF

F1 = 9.5MHz, F2 = 10.5MHz, V

–81

–66

dBc

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

OIP3

Output Third-Order Intercept

F1 = 9.5MHz, F2 = 10.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

36

33

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

P1dB

NF

Output 1dB Compression Point

Noise Figure

12.8

dBm

Z

IN

Z

IN

= 50Ω (Note 5)

= 200Ω

11

8

dB

70MHz Signal

HD2

Second Harmonic Distortion

Third Harmonic Distortion

V

= 0dBm

–85

–69

–72

–79

–72

dBc

OUTDIFF

HD3

OUTDIFF

IM3

Third Order Intermodulated

Distortion

F1 = 69.5MHz, F2 = 70.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

OIP3

Output Third-Order Intercept

F1 = 69.5MHz, F2 = 70.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

36

35

36

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

P1dB

NF

Output 1dB Compression Point

Noise Figure

12.8

dBm

Z

IN

Z

IN

= 50Ω (Note 5)

= 200Ω

11

8

dB

140MHz Signal

HD2

HD3

IM3

Second Harmonic Distortion

V

= 0dBm

–80

–62

–70

–66

dBc

OUTDIFF

Third Harmonic Distortion

OUTDIFF

Third Order Intermodulated

Distortion

F1 = 139.5MHz, F2 = 140.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

F1 = 130MHz, F2 = 150MHz, V

CC

= 0dBm/Tone,

–66

–56

dBc

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

OIP3

P1dB

Output Third-Order Intercept

Output 1dB Compression Point

F1 = 139.5MHz, F2 = 140.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

31

30

33

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

F1 = 130MHz, F2 = 150MHz, V

CC

= 0dBm/Tone,

28

33

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

12.8

dBm

64106fa

5

LTC6410-6

AC ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V⁺= 3V, V^–= 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is shorted to

–TERM, V_INCM= V_BIAS= 1.5V, input source resistance (R_S) is 25Ω on each input (50Ω differential), R_L= 50Ω from +OUT to –OUT, +IN

and –IN are AC-coupled, unless otherwise noted. V_BIASis deﬁned as the voltage on theV_BIASpin. V_OUTCMis deﬁned as

(+OUT + –OUT)/2. V_INCMis deﬁned as (+IN + –IN)/2. V_INDIFFis deﬁned as (+IN – –IN). V_OUTDIFFis deﬁned as (+OUT – –OUT).

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

NF

Noise Figure

Z

IN

Z

IN

= 50Ω (Note 5)

= 200Ω

11

7

dB

240MHz Signal

HD2

HD3

IM3

Second Harmonic Distortion

V

= 0dBm

–66

–52

–54

–63

–64

dBc

OUTDIFF

Third Harmonic Distortion

OUTDIFF

Third Order Intermodulated

Distortion

F1 = 239.5MHz, F2 = 240.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

OIP3

Output Third-Order Intercept

F1 = 239.5MHz, F2 = 240.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

27

32

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

P1dB

NF

Output 1dB Compression Point

Noise Figure

12.8

dBm

Z

IN

Z

IN

= 50Ω (Note 5)

= 200Ω

11

8

dB

380MHz Signal

HD2

HD3

IM3

Second Harmonic Distortion

V

= 0dBm

–57

–45

–51

–64

–60

dBc

OUTDIFF

Third Harmonic Distortion

OUTDIFF

Third Order Intermodulated

Distortion

F1 = 379.5MHz, F2 = 380.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

OIP3

Output Third-Order Intercept

F1 = 379.5MHz, F2 = 380.5MHz, V

= 0dBm/Tone

= –5dBm/Tone

= 0dBm/Tone,

26

27

30

dBm

OUTDIFF

V

= 5V, V

= 2.5V, SHDN = 3V

BIAS

CC

P1dB

NF

Output 1dB Compression Point

Noise Figure

10.8

dBm

Z

IN

Z

IN

= 50Ω (Note 5)

= 200Ω

12

8

dB

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC6410C-6/LTC6410I-6 is guaranteed functional over the

operating temperature range of –40°C to 85°C.

Note 3: The LTC6410C-6 is guaranteed to meet speciﬁed performance

from 0°C to 70°C. It is designed, characterized and expected to meet

speciﬁed performance from –40°C and 85°C but is not tested or QA

sampled at these temperatures. The LT6410I-6 is guaranteed to meet

speciﬁed performance from –40°C to 85°C.

Note 4: This parameter is pulse tested.

Note 5: e can be calculated from Z = 50Ω NF with the formula:

n

IN

NF

e_n= (10¹⁰–1)4kT50

where

k = Boltzmann’s constant and

T = absolute temperature

64106fa

6

LTC6410-6

TYPICAL PERFORMANCE CHARACTERISTICS

Output Third Order Intercept

vs Frequency

Output Third Order Intercept

Third Order Intermodulation

vs Frequency (Z_IN= 200Ω)

Distortion vs Frequency vs Power

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

40

38

36

34

32

30

28

26

24

22

38

36

34

32

30

28

26

24

22

+

–

+

–

+

–

V

Z

= 3V

V

Z

= 3V

V

Z

= 3V

= 0V

= 50Ω

= 200Ω

= 50Ω

= 1.5V

IN

R

L

R

L

V

BIAS

P

OUT

= 1.5V

V

P

BIAS

OUT

= 0dBm

380MHz

240MHz

30MHz

140MHz

10MHz

70MHz

200 250

0

50 100 150

300 350 400

200 250

–5

–2.5

0

5

0

50 100 150

300 350 400

2.5

OUTPUT POWER (dBm)

FREQUENCY (MHz)

64106 G01

64106 G03

64106 G02

Third Order Intermodulation

Distortion vs Frequency

vs Power (Z_IN= 200Ω)

Third Order Intermodulation

Distortion vs Temperature

Output 1dB Compression

vs Frequency

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

19

18

17

16

15

14

13

12

11

10

–50.0

–52.5

–55.0

–57.5

–60.0

–62.5

–65.0

–67.5

–70.0

+

–

V

Z

= 3V

Z

= 50Ω

= 3V

IN

+

= 0V

V

–

= 200Ω

= 50Ω

= 1.5V

= 0V

IN

R

= 1.5V

L

BIAS

380MHz

V

BIAS

240MHz

140MHz

+

–

V

= 3V

= 0V

Z

= 50Ω

IN

R

L

70MHz

10MHz

FREQ = 139.5MHz, 140.5MHz

30MHz

P

V

= 0dBm

= 1.5V

OUT

BIAS

–5

–2.5

0

2.5

5

50 75

TEMPERATURE (°C)

200 250

300 350 400

–50 –25

0

25

100 125 150

0

50 100 150

OUTPUT POWER (dBm)

FREQUENCY (MHz)

64106 G04

64106 G05

64106 G06

Output Third Order Intercept

vs Frequency

Output 1dB Compression

vs Frequency

Distortion

vs Common Mode Voltage

19

18

17

16

15

14

13

12

11

10

40

38

40

35

30

25

+

–

V

= 5V

= 0V

Z

= 50Ω

= 2.5V

= 0dBm

IN

R

L

36

V

BIAS

P

OUT

34

32

30

28

20

15

+

–

V

= 3V

= 0V

10

5

Z

= 50Ω

IN

+

–

R

L

V

= 5V

= 0V

FREQ = 139.5MHz, 140MHz

= 0dBm

P

OUT

= 2.5V

BIAS

26

0

200 250

1.3

1.4

1.6

0

50 100 150

300 350 400

1.2

1.7

1.8

100 150 200 250

FREQUENCY (MHz)

400

0

50

300 350

1.5

FREQUENCY (MHz)

V

(V)

BIAS

64106 G08

64106 G09

64106 G07

64106fa

7

LTC6410-6

TYPICAL PERFORMANCE CHARACTERISTICS

Differential Gain

vs Frequency (S21)

Differential Input Return Loss

vs Frequency (S11)

Differential Output Return Loss

vs Frequency (S22)

0

–5

10

8

0

–5

+

V

Z

= 3V

V

Z

= 3V

–

= 0V

= 50Ω

IN

6

4

–10

–15

–20

–25

2

–10

–15

–20

–25

0

–2

–4

–6

–8

–10

+

–

V

= 3V

= 0V

Z

= 50Ω

IN

1

10

100

1000

1

10

100

1000

1

10

100

1000

FREQUENCY (MHz)

64106 G12

64106 G10

64106 G11

Differential Reverse Isolation

vs Frequency (S12)

Differential Input Return Loss

Differential Output Return Loss

vs Frequency on a Smith Chart (S11)

vs Frequency on a Smith Chart (S22)

0

–5

+

–

FREQ = 1MHz TO 2GHz

V

Z

= 3V

= 0V

+

–

+

–

V

= 3V

= 0V

V

= 3V

= 0V

= 50Ω

IN

–10

–15

–20

–25

–30

–35

–40

–45

–50

100MHz

1GHz

1MHz

1GHz

1

10

100

1000

64106 G14

64106 G15

FREQUENCY (MHz)

64106 G13

Small-Signal Transient

Large-Signal Transient

Overdrive Recovery

1.9

2.3

1.9

1.5

1.58

1.54

1.50

1.7

1.5

1.3

1.1

0.7

1.46

1.42

0

2.5

5

7.5

10

15

64106 G17

0

5

10

TIME (ns)

15

20

25

64106 G18

0

2.5

5

7.5

10

15

64106 G16

TIME (ns)

64106fa

8

LTC6410-6

TYPICAL PERFORMANCE CHARACTERISTICS

Noise Figure vs Frequency vs Z_IN

Turn-On Time

Turn-Off Time

25.0

22.5

20.0

17.5

15.0

12.5

10.0

7.5

2.0

1.5

1.0

0.5

0

2.0

1.5

1.0

0.5

0

+

–

V

= 3V

= 0V

–OUT

+OUT

–OUT

Z

= 100ꢀ

IN

Z

= 50ꢀ

IN

SHDN

2

0

2

0

5.0

Z

= 400ꢀ

Z

= 200ꢀ

100

IN

2.5

0

–2

0

100

200

300

400

500

0

100

200

300

TIME (ns)

400

500

10

1000

64106 G20

64106 G21

TIME (ns)

FREQUENCY (MHz)

64106 G19

Group Delay and Phase

vs Frequency

Spectrum Analyzer 2-Tone

CMRR vs Frequency

0

10

20

30

40

50

60

70

80

90

100

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

90

100

90

80

70

60

50

40

30

20

10

0

+

–

+

–

V

Z

= 3V

V

Z

= 3V

45

= 0V

= 50ꢀ

= 50Ω

IN

0

–45

–90

–135

–180

–225

–270

–315

–360

PHASE

GROUP DELAY

67.5

68.5

69.5

70.5

71.5

72.5

64106 G22

10

100

1000

10000

1

10

100

1000

10000

FREQUENCY (MHz)

64106 G24

64106 G23

DC TEST CIRCUIT SCHEMATIC

+

V

3

+

5

+

V

8

V

10

+

V

BIAS

V

2

13

14

15

16

+

V

–TERM

–IN

7

6

25Ω

–OUT

V

= +IN – –IN

V

= +OUT – –OUT

OUTDIFF

INDIFF

–IN

+IN

LTC6410-6

R

= 50Ω

+OUT

L

+IN + –IN

2

+OUT + –OUT

2

+IN

=

V

=

OUTCM

INCM

+OUT

12

25Ω

+TERM

–

V

–

V

SHDN

64106 TC

–

11

V

–

9

V

4

1

–

V

64106fa

9

LTC6410-6

PIN FUNCTIONS

–

V (Pins1,4,9,12,17):NegativePowerSupply(Normally

SHDN (Pin 11): This pin is internally pulled high by a typi-

+

TiedtoGround).All5pinsmustbetiedtothesamevoltage.

cally 30k resistor to V . By pulling this pin low the supply

–

V maybetiedtoavoltageotherthangroundaslongasthe

current will be reduced to typically 3mA. See DC Electrical

Characteristics table for the speciﬁc logic levels.

+

–

voltage between V and V is 2.8V to 5.5V. If the V pins

are not tied to ground, bypass each with 680pF and 0.1μF

capacitors as close to the package as possible.

–TERM (Pin 13): Negative Input Termination. When tied

directly to –IN, it provides an active 50Ω differential ter-

mination when +TERM is also tied directly to +IN.

V

(Pin 2): This pin sets the input and output com-

BIAS

mon mode voltage by driving the +IN and –IN through a

–IN (Pin 14): Negative Input. This pin is normally tied to

buffer with a high output resistance of 1k. If the part is

AC-coupled at the input, the V

therefore the V

the input, V

bias V

–TERM, the input termination pin. If AC-coupled, this pin

will set the V

and

BIAS

INCM

will self bias by V

.

BIAS

voltage. If the part is DC-coupled at

OUTCM

+IN (Pin 15): Positive Input. This pin is normally tied to

should be left ﬂoating. Internal resistors

BIAS

+TERM, the input termination pin. If AC-coupled, this pin

to 1.4V on a 3V supply.

BIAS

will self bias by V

.

BIAS

+

V (Pins 3, 5, 8, 10): Positive Power Supply. All 4 pins

+TERM (Pin 16): Positive Input Termination. When tied

directly to +IN, it provides an active 50Ω differential ter-

mination when –TERM is also tied directly to –IN.

must be tied to the same voltage. Split supplies are pos-

+

–

sible as long as the voltage between V and V is 2.8V to

5.5V. Bypass capacitors of 680pF and 0.1μF as close to the

part as possible should be used between supplies.

–

Exposed Pad (Pin 17): V . The Exposed Pad must be

soldered to the PCB metal.

+OUT, –OUT (Pins 6, 7): Outputs. These pins each have

internal series termination resistors forming a differential

output resistance.

BLOCK DIAGRAM

C

EXT

R

T

110ꢀ

EXT

(OPT)

–TERM

–IN

+IN

+

–

V

R

O

–OUT

+OUT

11ꢀ

1k

6.4k

+1

5.7k

– –

V

BIAS

R

11ꢀ

O

A

= 2.7V/V

V

0.1μF

+ +

V

+IN

R

T

110ꢀ

+TERM

R

EXT

C

EXT

(OPT)

64106 BD

(OPT)

64106fa

10

LTC6410-6

APPLICATIONS INFORMATION

Introduction

output will have approximately the same common mode

voltage as the input.

The LTC6410-6 is a low noise differential high speed

ampliﬁer. By default, the LTC6410-6 has 6dB voltage gain

and is designed to operate with 50Ω differential input and

In the case of a DC-coupled input connection, the input

DC common mode voltage will also set the output com-

mon mode voltage. Note that a voltage divider is formed

output impedances. By changing (R ), alternative con-

EXT

between the V

impedance.

buffer output and the DC input source

ﬁgurations provide input resistances of up to 400Ω, with

correspondinglylowernoiseﬁgureandhigherpowergain.

The Block Diagram shows the basic circuit along with key

external components while Table 1 provides conﬁguration

BIAS

The V

pin has an internal voltage divider which will

BIAS

self bias to approximately 1.4V on a 3V supply (0.47 •

). An external capacitor of 0.1ꢁF to ground is

information. If the input is AC-coupled, the V

pin sets

BIAS

V

SUPPLY

the input common mode voltage and therefore the output

common mode voltage.

recommended to bypass the pin. The resistance of the pin

is 3k. See Distortion vs Common Mode graph.

For increased common mode accuracy, the +TERM and

–TERM pins can be AC-coupled to the inputs with capaci-

Input Impedance

LTC6410-6 has been designed with very ﬂexible input

termination circuitry. By default, with the termination pins

connected directly to the inputs, the input impedance is

58Ω, see the Block Diagram. Internally, there is 110Ω

tors (C ). This coupling prevents the feedback from the

EXT

termination resistance from creating additional DC com-

mon mode voltage error. The G and V

of the DC

CM

OSCM

Electrical Characteristics table reﬂect the less accurate

between each input and the opposite output (R ). Divid-

T

DC-coupled scenario.

ing the resistor by the internal noise gain of 2.7 + 1 = 3.7,

29.5Ω input impedance is created (59Ω differential ). In

parallel with the 2k common mode resistance, a total of

58Ωdifferentialinputimpedanceisachieved. Thismethod

ofterminationisusedtoprovidelowernoiseﬁgurethrough

the use of feedback which reduces the effective noise of

the termination resistor. By adding additional resistance in

series with the termination pins, higher input impedances

can be obtained (see Table 1). The optimum impedance

for minimizing the noise ﬁgure of the LTC6410-6 is close

to 400Ω. Because the ampliﬁer is inherently a voltage

ampliﬁer, the difference between the impedance at the

input and the output adds additional power gain as can

be seen in Table 1. These higher impedance levels can be

useful in interfacing with active mixers which can have

output impedance of 400Ω and beyond.

The termination inputs are part of a high speed feedback

loop. The physical length of the termination loop (R

EXT

and C ) must be minimized to maintain stability and

EXT

minimize gain peaking.

Gain

Internally, the LTC6410-6 has a voltage gain of 2.7V/V.

The default source and load resistances in most of the

data sheet are assumed to be 50Ω differential. Due to the

input and output resistance of the LTC6410-6 being 58Ω

and 22Ω respectively, the overall voltage gain in a 50Ω

system is 6dB (2V/V). Other source and load resistances

will produce different gains due to the resistive dividers.

Figure 1 is a system diagram for calculating gain.

Input and Output Common Mode Bias

R

S

R

OUT

R

LOAD

R

LTC6410-6

IN

The LTC6410-6 is internally self-biased through the V

22ꢀ

BIAS

V

S

pin (see the Block Diagram). Therefore the LTC6410-6

64106 F01

can be AC-coupled with no external biasing circuitry. The

Figure 1

64106fa

11

LTC6410-6

APPLICATIONS INFORMATION

Output Impedance

Therefore the differential voltage gain can be calculated

as follows:

The LTC6410-6 is designed to drive a differential load of

50Ω with a total differential output resistance of 22Ω.

While the LTC6410-6 can source and sink approximately

50mA, large DC output current should be avoided. To test

the part on traditional 50Ω test equipment, AC coupling

or balun transformers (or both) may be necessary at the

input and output.

R_IN

R_IN+R_S

R_L

R_L+R_OUT

Voltage Gain = 2•

•2.7 •

The following is an example of the 50Ω gain calculation:

58

58+50

50

Voltage Gain = 2•

•2.7 •

50+ 22

= 2.0V/V = 6.0dB

Supply Rails

Inductance in the supply path can severely effect the per-

formance of the LTC6410-6. Therefore it is recommended

that low inductance bypass capacitors are installed very

close to the part. 680pF and 0.1ꢁF sized capacitors are

recommended. Additionally, the exposed pad of the part

The part also can be used with different input impedances

providing no additional voltage gain, but a higher power

gain.

For example, the calculation for a 100Ω input impedance

shows the effect of an impedance conversion. The voltage

gain is calculated as follows:

–

must be connected to V for low inductance and low

thermal resistance. Failure to provide a low impedance

supply at high frequencies can cause oscillations and

increased distortion.

83

83+100

50

50+ 22

Voltage Gain = 2•

•2.7 •

=1.7V/V = 4.6dB

However the power gain is:

SHDN

+

The SHDN pin self-biases to V through a 30k resistor.

The pin must be pulled below 0.8V in order to shut down

the part.

ꢀ

ꢁ

ꢃ²

ꢄ

83

83+100

50

50+ 22

Power Gain = 2•

•2.7 •

• 2

ꢂ

ꢅ

Applications Circuits

= 5.8mW/mW = 7.6dB

The graphs on the following page are examples of the

four differential input resistances used on the DC1103A

demo board with balun transformers for interfacing with

the 50Ω single-ended measurement equipment.

Table 1. Input Impedance

EXTERNAL

TERMINATION

RESISTOR (Ω)

EFFECTIVE

DIFFERENTIAL

INPUT

VOLTAGE GAIN

(SOURCE AND

LOAD RESISTANCE

AS STATED (V/V)

DIFFERENTIAL

SOURCE

DIFFERENTIAL

LOAD

OUTPUT

POWER

GAIN (dB)

NF AT 10MHz

(dB)

RESISTANCE (Ω)

(R

)

IMPEDANCE (Ω) RESISTANCE (Ω) RESISTANCE (Ω)

EXT

(R )

S

(R )

IN

50

100

200

400

2000

0

58

83

50

22

6.0

7.6

2.0

1.7

1.8

1.9

11

9

49.9

249

750

177

377

2000

10.9

14.2

21.5

7

6

Open

–

64106fa

12

LTC6410-6

APPLICATIONS INFORMATION

Z_IN= 50Ω, T1 = ETC1-1-13, T2 = ETC1-1-13

Z_IN= 100Ω, T1 = WBC2-1TL, T2 = ETC1-1-13

49.9Ω

0.1μF

–TERM

–IN

0.1μF

–TERM

–IN

T1

T2

T1

1:2

T2

–OUT

+OUT

–OUT

+OUT

LTC6410-6

1:1

Z

IN

= 50Ω

Z

= 100Ω

49.9Ω

IN

+IN

IN

OUT

IN

OUT

0.1μF

+TERM

64106 TA03a

25

15

25

15

Z

= 50Ω

Z

= 100Ω

IN

CC

IN

CC

V

= 3V

V

= 3V

NOISE FIGURE

S21

5

S21

S22

–5

S22

S11

–15

–25

–35

–45

–15

–25

–35

–45

S11

S12

10

100

1000

10000

10

100

1000

10000

FREQUENCY (MHz)

64106 TA02b

64106 TA03b

Z_IN= 200Ω, T1 = WBC4-14L, T2 = ETC1-1-13

Z_IN= 400Ω, T1 = WBC8-1L, T2 = ETC1-1-13

750ꢀ

249Ω

0.1μF

–TERM

–IN

0.1μF

–TERM

–IN

T1

T2

T1

T2

–OUT

+OUT

–OUT

+OUT

LTC6410-6

1:8

1:1

1:4

1:1

Z

= 400ꢀ

750ꢀ

Z

= 200Ω

249Ω

IN

+IN

IN

OUT

+IN

IN

OUT

0.1μF

+TERM

64106 TA05a

64106 TA04a

25

15

25

15

Z

V

= 200Ω

= 3V

= 0V

Z

V

= 400Ω

= 3V

= 0V

IN

+

S21

–

NOISE FIGURE

5

NOISE FIGURE

S22

–5

S22

S11

–15

–25

–35

–45

–15

–25

–35

–45

S11

S12

100

10

100

1000

10000

10

1000

10000

FREQUENCY (MHz)

64106 TA04b

64106 TA05b

64106fa

13

LTC6410-6

APPLICATIONS INFORMATION

Demoboard DC1103A Top Silkscreen

TYPICAL APPLICATION

SAW Filter Application

ThedifferentialoutputoftheLTC6410-6allowsdifferential

drivingoftheSAWﬁlterwithouttheneedforatransformer.

The differential nature of the LTC6410-6 allows for ease

of use in differential signal chains, and may reduce the

need for transformers.

3V

0.1μF

–TERM

+

V

47nH

–IN

12.4Ω

–OUT

+OUT

SAWTEK

854923

LTC6410-6

15pF

47nH*

120nH*

+IN

64106 TA07

15pF

–

V

SAW Filter Application

+TERM

0

0.1μF

*COILCRAFT 0805CS

–10

–20

–30

–40

–50

–60

The schematic above shows a typical signal chain applica-

tion with the LTC6410-6 in combination with a 140MHz

centerfrequency24MHzbandwidthSAWﬁlter.Withoutthe

LTC6410-6, theattenuationoftheSAWwouldbe–11.5dB.

The networks between the LTC6410-6 and the SAW ﬁlter,

andaftertheSAWﬁlterareforproperimpedancematching.

–70

90 100 110 120 130 140 150 160 170 180 190

FREQUENCY (MHz)

64106 TA08

64106fa

14

LTC6410-6

PACKAGE DESCRIPTION

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691)

0.70 p0.05

3.50 p 0.05

2.10 p 0.05

1.45 p 0.05

(4 SIDES)

PACKAGE OUTLINE

0.25 p0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 s 45o CHAMFER

R = 0.115

TYP

0.75 p 0.05

3.00 p 0.10

(4 SIDES)

15 16

PIN 1

TOP MARK

(NOTE 6)

0.40 p 0.10

1

2

1.45 p 0.10

(4-SIDES)

(UD16) QFN 0904

0.200 REF

0.25 p 0.05

0.00 – 0.05

0.50 BSC

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

64106fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LTC6410-6

TYPICAL APPLICATION

Demoboard DC1103A Schematic

V

TP1

SHDN

CC

R16 10Ω

JP1

EN

C17

680pF

C18

0.1μF

DS

C31

C26

C30

J4

C2

12 11

10

9

J1

0.1μF

(1)

0.1μF

–OUT

0.1μF

–

+

–

–IN

T1

V

SHDN

V

T2

C11

(1)

R6 0Ω

R8 0Ω

R7 0Ω

R5 0Ω

13

14

15

16

17

8

7

6

5

MABA-007159-

000000

+

MABA-007159-

000000

–TERM

V

C25 OPT

C3

(1)

–IN

–OUT

R15

(1)

LTC6410-6

J2

+IN

J5

+OUT

+IN

+OUT

+

C16

(1)

C22

OPT

+TERM

–

V

C33

–

+

–

C34

(1)

C32

0.1μF

V

C1

0.1μF

V

C4

0.1μF

CC

BIAS

2

(1)

1

3

4

TP4

BIAS

R19

OPT

V

CC

V

C7

0.1μF

C12

680pF

C13

0.1μF

TP5

GND

R20

OPT

C28

0.1μF

C6

0.1μF

J7

J6

TEST OUT

TEST IN

T3

T4

R23 0Ω

MABA-007159-

000000

MABA-007159-

000000

C19 OPT

C20 OPT

64106 TA06

R21

(1)

R24 0Ω

R22

(1)

TP2

V

CC

C29

C5

0.1μF

2.8V TO 5.5V

0.1μF

C14

4.7μF

C15

1μF

NOTE: UNLESS OTHERWISE SPECIFIED

(1) NOT POPULATED

TP3

GND

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

A = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz

LT1993-2

LT1993-4

LT1993-10

LT5514

800MHz Differential Ampliﬁer/ADC Driver

900MHz Differential Ampliﬁer/ADC Driver

700MHz Differential Ampliﬁer/ADC Driver

Ultralow Distortion IF Ampliﬁer/ADC Driver

600MHz to 2.7GHz High Signal Level Downconverting Mixer

V

A = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz

V

A = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz

V

Digitally Controlled Gain Output IP3 47dBm at 100MHz

LT5522

4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB,

50ꢀ Single-Ended RF and LO Ports, R

= 400ꢀ

OUT

LT5524

LT5525

LT5526

LT5527

LT5557

Low Power, Low Distortion ADC Driver with Digitally

Programmable Gain

450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control

High Linearity, Low Power Downconverting Mixer

Single-Ended 50ꢀ RF and LO Ports, 17.6dBm IIP3 at 1900MHz,

I

CC

= 28mA

High Linearity, Low Power Downconverting Mixer

3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF, NF = 11dB,

= 28mA, –65dBm LO-RF Leakage

I

CC

400MHz to 3.7GHz High Signal Level Downconverting Mixer

400MHz to 3.8GHz High Signal Level Downconverting Mixer

CG = 2.3dB at 1900MHz, IIP3 = 23.5dBm at 1900MHz, 440mW,

= 415ꢀ

R

OUT

CG = 2.9dB at 1950MHz, IIP3 = 24.7dBm at 1950MHz, 300mW,

= 560ꢀ

R

OUT

LTC6400-20

LTC6401-20

LT6402-6

1.8GHz Low Noise, Low Distortion ADC Driver for 300MHz IF

1.4GHz Low Noise, Low Distortion ADC Driver for 140MHz IF

300MHz Differential Ampliﬁer/ADC Driver

A = 20dB, Z = 200ꢀ, I

= 105mA at 25°C

= 62mA at 25°C

V

IN

S(MAX)

A = 20dB, Z = 200ꢀ, I

V

IN

A = 6dB, e = 3.8nV/√Hz at 20MHz, 150mW

V

n

LT6402-12

LT6402-20

LT6411

300MHz Differential Ampliﬁer/ADC Driver

A = 12dB, e = 2.6nV/√Hz at 20MHz, 150mW

V n

300MHz Differential Ampliﬁer/ADC Driver

A = 20dB, e = 1.9nV/√Hz at 20MHz, 150mW

V n

650MHz Differential ADC Driver/Dual Selectable Gain Ampliﬁer

3300V/μs Slew Rate, 16mA Current Consumption,

Selectable Gain: A = –1, 1, 2

V

64106fa

LT 0908 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

16

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC6410CUD-6-PBF
厂家：	Linear
描述：	Low Distortion, Low Noise Differential IF Amplifi er with Confi gurable Input Impedance 低失真，低噪声差分IF功率放大器儿与置信可配置输入阻抗放大器功率放大器
文件：	总16页 (文件大小：345K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC6410CUD-6-PBF [Linear]

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