LTC4089-1 [Linear]
USB Power Manager with High Voltage Switching Charger; 高电压开关充电器的USB电源管理器
| 型号： | LTC4089-1 |
| 厂家： | 
Linear |
| 描述： | USB Power Manager with High Voltage Switching Charger |
| 文件： | 总24页 (文件大小：517K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4089-1
USB Power Manager with
High Voltage Switching Charger
U
DESCRIPTIO
FEATURES
TheLTC®4089-1isaUSBpowermanagerplushighvoltage
Li-Ion battery charger. This device controls the total cur-
rent used by the USB peripheral for operation and battery
charging. Battery charge current is automatically reduced
such that the sum of the load current and the charge cur-
rent does not exceed the programmed input current limit.
The LTC4089-1 also accommodates high voltage power
supplies, such as 12V AC-DC wall adapters, FireWire, or
automotive power.
■
Seamless Transition Between Power Sources: Li-Ion
Battery, USB, and 6V to 36V External Supply
High Efficiency 1.2A Charger from 6V to 36V Input
Load Dependent Charging from USB Input
Guarantees Current Compliance
215m Internal Ideal Diode plus Optional External
Ideal Diode Controller Provides Low Loss Power
Path When External Supply/USB Not Present
Constant-Current/Constant-Voltage Operation with
Thermal Feedback to Maximize Charging Rate
without Risk of Overheating
Selectable 100% or 20% Current Limit (e.g., 500mA/
100mA) from USB Input
Preset 4.1V Charge Voltage with 0.8% Accuracy
C/10 Charge Current Detection Output
NTC Thermistor Input for Temperature Qualified
Charging
■
■
■
■
■
The LTC4089-1 provides a fixed 5V output from the high
voltage input to charge single cell Li-Ion batteries. The
charge current is programmable and an end-of-charge
status output (CHRG) indicates full charge. Also featured
is programmable total charge time, an NTC thermistor
input used to monitor battery temperature while charging
and automatic recharging of the battery.
■
■
■
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Burst Mode is a registered trademark of Linear Technology Corporation.
Protected by U.S. Patents including 6522118 and 6700364.
■
Tiny (6mm 3mm 0.75mm) 22-Pin DFN Package
U
APPLICATIO S
■
Portable USB Devices—GPS Receivers, Cameras,
MP3 Players, PDAs
U
TYPICAL APPLICATIO
LTC4089-1 High Voltage
Battery Charger Efficiency
0.1
F
10
H
90
CC CURRENT = 970mA
BOOST
SW
HVIN
HIGH (6V-36V)
85
80
75
70
65
60
55
50
45
40
NO OUTPUT LOAD
10
F
VOLTAGE INPUT
1
F
FIGURE 10 SCHEMATIC
HVEN
WITH R
= 52k
PROG
HVOUT
HVPR
LTC4089-1
5V (NOM)
IN
FROM USB
LTC4089-1
4.7
F
CABLE V
1k
BUS
TO LDOs
, ETC.
R
4.7
F
OUT
BAT
EGS
HVIN = 8V
HVIN = 12V
HVIN = 24V
HVIN = 36V
TIMER
CLPROG GND PROG
V
(TYP)
AVAILABLE INPUT
HV INPUT (LTC4089-1)
USB ONLY
OUT
5V
5V
2k 100k
0.1
F
2.5
3
3.5
4
4.5
+
BATTERY VOLTAGE (V)
Li-Ion BATTERY
V
BAT ONLY
BAT
4089-1 TA01b
4089-1 TAO1
40891f
1
LTC4089-1
W W W U
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Notes 1, 2, 3, 4, 5)
TOP VIEW
Terminal Voltage
GND
GND
1
2
3
4
5
6
7
8
9
22 HVEN
21 HVIN
20 BOOST
19 SW
BOOST ...................................................... –0.3V to 50V
BOOST above SW .....................................................25V
HVIN, HVEN .............................................. –0.3V to 40V
IN, OUT, HVOUT
HVOUT
V
C
NTC
VNTC
HVPR
CHRG
PROG
18 HVOUT
17 TIMER
16 SUSP
15 HPWR
14 CLPROG
13 OUT
t < 1ms and Duty Cycle < 1% .................. –0.3V to 7V
DC............................................................ –0.3V to 6V
BAT .............................................................. –0.3V to 6V
NTC, TIMER, PROG, CLPROG.......–0.3V to (V + 0.3V)
CHRG, HPWR, SUSP, HVPR......................... –0.3V to 6V
Pin Current, DC
23
CC
GATE 10
BAT 11
12 IN
IN, OUT, BAT (Note 6) ..............................................2.5A
Operating Temperature Range ................. –40°C to 85°C
Maximum Operating Junction Temperature .......... 110°C
Storage Temperature Range................... –65°C to 125°C
DJC PACKAGE
22-LEAD (6mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 23) IS GND
(MUST BE SOLDERED TO PCB)
T
= 110°C,
= 40°C/W
JMAX
JA
ORDER PART NUMBER
LTC4089EDJC-1
DJC PART MARKING
40891
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. HVIN = 12V, BOOST = 17V, V = 5V, V = 3.7V, HVEN = 12V,
A
IN
BAT
HPWR = 5V, R
= 100k, R
= 2k, SUSP = 0V, unless otherwise noted.
PROG
CLPROG
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
USB Input Current Limit
●
V
USB Input Supply Voltage
Input Bias Current
4.35
5.5
V
IN
●
●
I
I
I
I
= 0 (Note 7)
0.5
50
1
100
mA
µA
IN
BAT
Suspend Mode; SUSP = 5V
●
●
Current Limit
R
R
= 2k, HPWR = 5V
= 2k, HPWR = 0V
475
90
500
100
525
110
mA
mA
LIM
CLPROG
CLPROG
Maximum Input Current Limit
(Note 8)
= 80mA Load
2.4
A
IN(MAX)
R
ON Resistance V to V
I
OUT
0.215
ON
IN
OUT
●
●
V
CLPROG Pin Voltage
R
R
= 2k
= 1k
0.98
0.98
1.00
1.00
1.02
1.02
V
V
CLPROG
CLPROG
CLPROG
I
Soft-Start Inrush Current
Input Current Limit Enable
5
mA/µs
SS
V
(V – V ) Rising
20
–80
50
–50
80
–20
mV
mV
CLEN
IN
OUT
Threshold Voltage (V – V
)
(V – V ) Falling
IN
OUT
IN
OUT
40891f
2
LTC4089-1
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. HVIN = 12V, BOOST = 17V, V = 5V, V = 3.7V, HVEN = 12V,
A
IN
BAT
HPWR = 5V, R
= 100k, R
= 2k, SUSP = 0V, unless otherwise noted.
PROG
CLPROG
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
3.8
MAX
UNITS
V
V
Input Undervoltage Lockout
V
V
Powers Part, Rising Threshold
3.6
4
●
UVLO
IN
IN
dV
UVLO
Input Undervoltage Lockout
Hysteresis
Rising – V Falling
130
mV
IN
High Voltage Regulator
V
HVIN Supply Voltage
HVIN Bias Current
6
36
V
HVIN
HVIN
I
Not Switching
Shutdown; HVEN = 0V
1.9
0.01
2.5
2
mA
µA
●
●
V
V
Output Voltage with HVIN Present
Assumes HVOUT to OUT Connection
4.85
5
5.15
5
V
V
OUT
High Voltage Input Undervoltage
Lockout
V
Rising
HVIN
4.7
HVUVLO
f
SW
Switching Frequency
V
V
> 3.95V
= 0V
685
750
35
815
kHz
kHz
HVOUT
HVOUT
DC
Maximum Duty Cycle
Switch Current Limit
88
95
%
A
MAX
I
(Note 9)
1.5
1.95
330
2.3
SW(MAX)
V
Switch V
I
SW
= 1A
mV
µA
V
SAT
CESAT
I
LK
Switch Leakage Current
Minimum Boost Voltage Above SW
BOOST Pin Current
2
V
I
I
= 1A
= 1A
1.85
30
2.2
50
SWD
BST
SW
I
mA
SW
Battery Management
V
Input Voltage
BAT
4.3
V
BAT
BAT
●
●
●
I
Battery Drain Current
V
= 4.3V, Charging Stopped
15
22
60
27
35
100
µA
µA
µA
BAT
Suspend Mode; SUSP = 5V
V
= V = 0V, BAT Powers OUT, No Load
HVIN
IN
V
Regulated Output Voltage
I
I
= 2mA
= 2mA; (0°C – 85°C)
4.066
4.059
4.100
4.100
4.134
4.141
V
V
FLOAT
BAT
BAT
●
I
I
Current Mode Charge Current
R
R
= 100k, No Load
465
900
500
535
mA
mA
CHG
PROG
PROG
= 50k, No Load; (0°C – 85°C)
1000
1080
Maximum Charge Current
PROG Pin Voltage
(Note 8)
1.2
A
CHG(MAX)
●
●
V
R
PROG
R
PROG
= 100k
= 50k
0.98
0.98
1.00
1.00
1.02
1.02
V
V
PROG
●
●
●
k
Ratio of End-of-Charge Current to
Charge Current
V
= V
(4.1V)
0.085
0.1
0.11
mA/mA
EOC
BAT
FLOAT
I
Trickle Charge Current
V
= 2V, R = 100k
PROG
35
50
60
3
mA
V
TRIKL
BAT
V
V
Trickle Charge Threshold Voltage
Charger Enable Threshold Voltage
2.75
2.9
TRIKL
CEN
(V
(V
– V ) Falling; V = 4V
– V ) Rising; V = 4V
55
80
mV
mV
OUT
OUT
BAT
BAT
BAT
BAT
V
Recharge Battery Threshold Voltage
TIMER Accuracy
V
V
- V
RECHRG
65
100
135
10
mV
%
RECHRG
FLOAT
t
= 4.3V
–10
TIMER
BAT
Recharge Time
Percent of Total Charge Time
Percent of Total Charge Time, V < 2.8V
50
25
%
Low Battery Trickle Charge Time
%
BAT
T
LIM
Junction Temperature in Constant
Temperature Mode
105
°C
40891f
3
LTC4089-1
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. HVIN = 12V, BOOST = 17V, V = 5V, V = 3.7V, HVEN = 12V,
A
IN
BAT
HPWR = 5V, R
= 100k, R
= 2k, SUSP = 0V, unless otherwise noted.
PROG
CLPROG
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Internal Ideal Diode
R
Incremental Resistance, V
Regulation
I
I
= 100mA
= 600mA
125
215
m
m
FWD
ON
BAT
R
ON Resistance V to V
DIO,ON
FWD
BAT
OUT
BAT
●
V
V
Voltage Forward Drop (V - V
)
I
I
I
= 5mA
= 100mA
= 600mA
10
30
55
160
50
mV
mV
mV
BAT
OUT
BAT
BAT
BAT
Diode Disable Battery Voltage
2.8
V
OFF
I
Load Current Limit, for V
Regulation
550
mA
FWD
ON
I
Diode Current Limit
2.2
20
A
D(MAX)
External Ideal Diode
External Diode Forward Voltage
V
mV
FWD, EXT
Logic
●
V
V
V
Output Low Voltage (CHRG, HVPR)
Input High Voltage
I
= 5mA
0.1
0.4
0.3
V
V
OL
SINK
HVEN, SUSP, HPWR Pin Low to High
HVEN, SUSP, HPWR Pin High to Low
SUSP, HPWR
2.3
IH
Input Low Voltage
V
IL
I
Logic Input Pull Down Current
HVEN Pin Bias Current
2
µA
PULLDN
HVEN
I
V
V
= 2.3V
= 0V
6
0.01
20
0.1
µA
µA
HVEN
HVEN
●
●
V
Charger Shutdown Threshold
Voltage on TIMER
0.14
5
0.4
V
CHG,SD
CHG,SD
I
Charger Shutdown Pull-Up Current
on TIMER
V
= 0V
14
µA
TIMER
NTC
●
●
I
VNTC Pin Current
V
= 2.5V
1.4
4.4
2.5
4.85
0
3.5
mA
V
VNTC
VNTC
V
I
VNTC Bias Voltage
I
= 500µA
= 1V
NTC
VNTC
VNTC
NTC Input Leakage Current
V
µA
±1
NTC
V
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
0.738 • VVNTC
0.018 • VVNTC
V
V
COLD
HOT
DIS
V
V
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
0.326 • VVNTC
0.015 • VVNTC
V
V
●
NTC Disable Voltage
NTC Input Voltage to GND (Falling)
Hysteresis
75
100
35
125
mV
mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The LTC4089-1 is guaranteed to meet specified performance from
0°C to 85°C and are designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and 85°C.
Note 6: Guaranteed by long term current density limitations.
Note 2: V is the greater of V , V
or V
BAT
CC
IN OUT
Note 7: Total input current is equal to this specification plus 1.002 • I
BAT
Note 3: All voltage values are with respect to GND.
where I is the charge current.
BAT
Note 4: This IC includes over-temperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 110°C when over-temperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.
Note 9: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at high duty cycle.
40891f
4
LTC4089-1
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, unless otherwise specified.
A
Battery Regulation (Float)
Voltage vs Temperature
Battery Current and Voltage
vs Time
V
Load Regulation
FLOAT
4.20
4.15
4.120
4.115
4.110
4.105
5
4
3
2
1
0
1500
1200
900
600
300
0
V
BAT
= 5V
R
= 34k
IN
PROG
I
= 2mA
V
V
V
BAT
OUT
CHRG
BAT
4.10
4.05
I
4.100
4.095
C/10
4.00
3.95
3.90
4.090
4.085
4.080
1250mAh
CELL
TERMINATION
150
HVIN = 12V
R
= 50k
PROG
–25
0
50
–50
75
100
25
0
200
400
I
600
(mA)
800
1000
100
0
50
200
TEMPERATURE (°C)
TIME (MIN)
BAT
4089-1 G02
4089-1 G01
4089-1 G03
Ideal Diode Current vs Forward
Voltage and Temperature (No
External Device)
Charge Current vs Temperature
(Thermal Regulation)
Charging from USB, I vs V
BAT
BAT
1000
900
800
700
600
500
400
300
200
100
0
600
500
400
300
600
500
V
V
R
R
= 5V
V
V
= 3.7V
IN
OUT
BAT
IN
= NO LOAD
= 100k
= 0V
PROG
= 2k
CLPROG
400
300
200
200
100
0
HPWR = 5V
HPWR = 0V
–50 C
V
V
θ
= 5V
BAT
= 50°C/W
0 C
50 C
100
0
IN
= 3.5V
100 C
JA
50
TEMPERATURE (°C)
100 125
100
(mV)
200
–50 –25
0
25
75
0
50
3.5
4
4.5
150
0
0.5
1
1.5
2
2.5
(V)
3
V
V
FWD
BAT
4089-1 G05
4089-1 G06
4089-1 G04
Ideal Diode Current vs Forward
Voltage and Temperature with
External Device
High Voltage Regulator Efficiency
vs Output Load
100
95
90
85
80
75
70
65
60
55
50
5000
HVIN = 8V
V
V
= 3.7V
BAT
IN
HVIN = 12V
4500
4000
3500
3000
2500
2000
1500
1000
500
= 0V
Si2333 PFET
HVIN = 24V
HVIN = 36V
–50°C
0°C
50°C
100°C
FIGURE 10 SCHEMATIC
= 4.11V (I = 0)
V
BAT
BAT
0
0
0.2
0.4
I
0.6
(A)
0.8
1.0
0
20
40
V
60
80
100
(mV)
OUT
FWD
4089-1 G09
4089-1 G17
40891f
5
LTC4089-1
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, unless otherwise specified.
A
High Voltage Regulator
Maximum Load Current, L = 10µH
High Voltage Regulator
Maximum Load Current, L = 33µH
High Voltage Regulator
Switch Voltage Drop
1.8
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
550
500
450
400
350
300
250
200
150
100
50
TYPICAL
TYPICAL
T
= 85°C
A
T
= 25°C
A
T
= –40°C
A
MINIMUM
MINIMUM
0
25
35
5
10
15
20
(V)
30
25
35
5
10
15
20
(V)
30
0.8
1.8
0
0.4 0.6
1.0 1.2 1.4 1.6
SWITCH CURRENT (A)
0.2
V
V
IN
IN
4089-1 G11
4089-1 G10
4089-1 G12
High Voltage Regulator
Switch Frequency
High Voltage Regulator
Frequency Foldback
High Voltage Regulator
Soft-Start
800
780
760
740
720
700
680
660
640
620
600
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
800
700
600
500
400
300
200
100
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
4089-1 G13
400 500
600 700 800
0
100 200 300
0
0.25 0.50 0.75
1
1.25 1.50 1.75
2
FEEDBACK VOLTAGE (mV)
SHDN PIN VOLTAGE (V)
4089-1 G14
4089-1 G15
High Voltage Regulator
Typical Minimum Input Voltage
High Voltage Switch Current Limit
7.0
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
6.8
6.6
6.4
TO START
6.2
6.0
5.8
5.6
5.4
5.2
5.0
TO RUN
T
T
T
T
= –40°C
= –5°C
= 25°C
= 90°C
A
A
A
A
0
10 20 30 40 50 60 70 80 90 100
1
10
100
1000
DUTY CYCLE (%)
LOAD CURRENT (mA)
4089-1 G17
4089-1 G16
40891f
6
LTC4089-1
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, unless otherwise specified.
A
Input Disconnect Waveforms
Response to HPWR
Input Connect Waveforms
HPWR
5V/DIV
V
V
IN
IN
5V/DIV
V
5V/DIV
V
I
IN
OUT
5V/DIV
OUT
5V/DIV
0.5A/DIV
I
I
IN
IN
I
BAT
0.5A/DIV
0.5A/DIV
0.5A/DIV
I
I
BAT
0.5A/DIV
BAT
0.5A/DIV
1ms/DIV
100 s/DIV
1ms/DIV
4089-1 G19
4089-1 G20
4089-1 G18
V
I
= 3.85V
= 100mA
V
I
= 3.85V
= 50mA
V
I
= 3.85V
= 100mA
BAT
OUT
BAT
OUT
BAT
OUT
Wall Disconnect Waveforms
Response to Suspend
Wall Connect Waveforms
WALL
5V/DIV
SUSP
5V/DIV
WALL
5V/DIV
V
OUT
V
V
OUT
OUT
5V/DIV
5V/DIV
5V/DIV
I
WALL
0.5A/DIV
I
I
IN
WALL
I
BAT
0.5A/DIV
0.5A/DIV
0.5A/DIV
I
BAT
0.5A/DIV
I
BAT
0.5A/DIV
1ms/DIV
100 s/DIV
1ms/DIV
4089-1 G22
4089-1 G23
4089-1 G21
V
I
= 3.85V
= 100mA
= 100k
V
I
= 3.85V
= 50mA
V
I
= 3.85V
= 100mA
= 100k
BAT
BAT
OUT
BAT
OUT
OUT
R
R
PROG
PROG
High Voltage Regulator Load
Transient
High Voltage Regulator Load
Transient
H
H
VOUT
50mV/DIV
VOUT
50mV/DIV
I
I
L
OUT
0.5A/DIV
0.5A/DIV
20 S/DIV
20 S/DIV
4089-1 G24
4089-1 G25
40891f
7
LTC4089-1
U U
U
PI FU CTIO S
GND(Pins1, 2):Ground. TietheGNDpintoalocalground
PROG (Pin 9): Charge Current Program. Connecting a
resistor, R , to ground programs the battery charge
plane below the LTC4089-1 and the circuit components.
PROG
current. The battery charge current is programmed
HVOUT (Pins 3, 18): Voltage Output of the High Voltage
Regulator. When sufficient voltage is present at HVOUT,
the low voltage power path from IN to OUT will be discon-
nected and the HVPR pin will be pulled low to indicate
that a high voltage wall adapter has been detected. The
LTC4089-1 high voltage regulator will provide a fixed 5V
output to the battery charger MOSFET. HVOUT should be
bypassed with at least 10µF to GND. Connect pins 3 and
18 with a resistance no greater than 1 .
as follows:
50,000V
ICHG(A) =
RPROG
GATE (Pin 10): External ideal diode gate pin. This pin can
be used to drive the gate of an optional external PFET con-
nected between BAT (drain) and OUT (source). By doing
so, the impedance of the ideal diode between BAT and
OUT can be reduced. When not in use, this pin should be
left floating. It is important to maintain a high impedance
on this pin and minimize all leakage paths.
V (Pin 4): Leave the V pin floating or bypass to ground
C
C
witha10pFcapacitor.Thisoptional10pFcapacitorreduces
HVOUT ripple in discontinuous mode.
BAT (Pin 11): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and as
an input when supplying power to OUT. When the OUT pin
potential drops below the BAT pin potential, an ideal diode
NTC (Pin 5): Input to the NTC Thermistor Monitoring
Circuits. The NTC pin connects to a negative temperature
coeffcient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or
too cold to charge. If the battery’s temperature is out of
range, chargingispauseduntilthebatterytemperaturere-
enters the valid range. A low drift bias resistor is required
function connects BAT to OUT and prevents V
from
OUT
droppingmorethan100mVbelowV .Aprecisioninternal
BAT
resistor divider sets the final float (charging) potential on
thispin. Theinternalresistordividerisdisconnectedwhen
IN and HVIN are in undervoltage lockout.
from V
to NTC and a thermistor is required from NTC
NTC
to ground. If the NTC function is not desired, the NTC pin
IN (Pin 12): Input Supply. Connect to USB supply, V
.
BUS
should be grounded.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as de-
termined by the state of the HPWR pin. Charge current
(to the BAT pin) supplied through the input is set to the
current programmed by the PROG pin but will be limited
by the input current limit if charge current is set greater
than the input current limit.
VNTC(Pin6):OutputBiasVoltageforNTC.Aresistorfrom
this pin to the NTC pin will bias the NTC thermistor.
HVPR (Pin 7): High Voltage Present Output. Active low
open drain output pin. A low on this pin indicates that the
high voltage regulator has sufficient voltage to charge the
battery. This feature is disabled if no power is present on
HVIN, IN or BAT (i.e., below UVLO thresholds).
OUT (Pin 13): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB V
CHRG(Pin8):Open-DrainChargeStatusOutput.Whenthe
battery is being charged, the CHRG pin is pulled low by an
internal N-channel MOSFET. When the timer runs out or
the charge current drops below 10% of the programmed
charge current or the input supply is removed, the CHRG
pin is forced to a high impedance state.
BUS
(IN), anexternalhighvoltagesupply(HVIN), orthebattery
(BAT) when no other supply is present. The high voltage
supply is prioritized over the USB V
input. OUT should
BUS
be bypassed with at least 4.7µF to GND.
40891f
8
LTC4089-1
U U
U
PI FU CTIO S
CLPROG (Pin 14): Current Limit Program and Input Cur-
TIMER (Pin 17): Timer Capacitor. Placing a capacitor,
rent Monitor. Connecting a resistor, R
, to ground
CTIMER, to GND sets the timer period. The timer period is:
CLPROG
programs the input to output current limit. The current
limit is programmed as follows:
CTIMER •RPROG • 3hours
tTIMER(hours) =
0.1µF • 100k
1000V
ICL(A) =
RCLPROG
Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).
In USB applications, the resistor R
should be set
CLPROG
to no less than 2.1k. The voltage on the CLPROG pin is
always proportional to the current flowing through the
IN to OUT power path. This current can be calculated
as follows:
Shorting the TIMER pin to GND disables the battery
charging functions.
SW (Pin 19): The SW pin is the output of the internal high
voltage power switch. Connect this pin to the inductor,
catch diode and boost capacitor.
VCLPROG
RCLPROG
IIN(A) =
•1000
HPWR(Pin15):HighPowerSelect.Thislogicinputisused
to control the input current limit. A voltage greater than
2.3V on the pin will set the input current limit to 100% of
the current programmed by the CLPROG pin. A voltage
less than 0.3V on the pin will set the input current limit to
20% of the current programmed by the CLPROG pin. A
2µA pull-down current is internally connected to this pin
to ensure it is low at power up when the pin is not being
driven externally.
BOOST (Pin 20): The BOOST pin is used to provide a
drive voltage, higher than the input voltage, to the internal
bipolar NPN power switch.
HVIN (Pin 21): The HVIN pin supplies current to the inter-
nal high voltage regulator and to the internal high voltage
power switch. The presence of a high voltage input takes
priority over the USB V
input (i.e., when a high volt-
BUS
age input supply is detected, the USB IN to OUT path is
disconnected). This pin must be locally bypassed.
SUSP (Pin 16): Suspend Mode Input. Pulling this pin
above 2.3V will disable the power path from IN to OUT.
The supply current from IN will be reduced to comply
with the USB specification for suspend mode. Both the
ability to charge the battery from HVIN and the ideal diode
function (from BAT to OUT) will remain active. Suspend
HVEN (Pin 22): The HVEN pin is used to disable the high
voltageinputpath.Tietogroundtodisablethehighvoltage
input or tie to at least 2.3V to enable the high voltage path.
If this feature is not used, tie to the HVIN pin. This pin can
also be used to soft-start the high voltage regulator; see
the Applications Information section.
mode will reset the charge timer if V
is less than V
OUT
BAT
EXPOSED PAD (Pin 23): Ground. The exposed package
pad is ground and must be soldered to the PC board for
proper functionality and for maximum heat transfer (use
several vias directly under the LTC4089-1).
while in suspend mode. If V
is kept greater than V
,
OUT
BAT
such as when the high voltage input is present, the charge
timer will not be reset when the part is put in suspend.
A 2µA pull-down current is internally applied to this pin
to ensure it is low at power-up when the pin is not being
driven externally.
40891f
9
LTC4089-1
W
BLOCK DIAGRA
D2
BOOST
C3
L1
HVIN
10
SW
Q1
+
–
D1
+
–
R
S
Q
Q
DRIVER
V
PART NUMBER
SET
OSCILLATOR
5V LTC4089-1
HVOUT
–
V
C
V
10
GM
SET
5V
+
C1
10pF
1.8V
–
+
ENABLE
+
–
R3
C4
HVEN
10
10
75mV (RISING)
25mV (FALLING)
+
–
HVPR
19
4.25V (RISING)
3.15V (FALLING)
IN
CURRENT LIMIT
I
CNTL
IN
LIM
SOFT-START
1V
+
–
I
IN
OUT
GATE
BAT
I
LIM
1000
ENABLE
21
21
21
CURRENT CONTROL
DIE
CL
–
CLPROG
+
22
13
25mV
–
CC/CV REGULATOR
CHARGER
+
2k
25mV
+
–
TEMP 105°C
ENABLE
500mA/100mA
EDA
HPWR
IDEAL
DIODE
+
–
IN OUT BAT
2µA
TA
BAT
+
I
CHG
CHARGE CONTROL
0.25V
–
SOFT-START2
+
–
1V
CHG
+
–
2.8V
BATTERY
UVLO
PROG
23
15
14
100k
VOLTAGE DETECT
UVLO
+
–
4V
V
NTC
RECHARGE
BAT UV
–
+
10k
TOO COLD
TOO HOT
RECHRG
NTCERR
TIMER
CHRG
21
18
OSCILLATOR
NTC
CONTROL LOGIC
HOLD
NTC
CLK
100k
–
+
STOP
RESET
COUNTER
EOC
C/10
+
–
NTC ENABLE
2µA
0.1V
GND
16
SUSP
11
4089-1 TA01
40891f
10
LTC4089-1
U
OPERATIO
(Refer to Block Diagram)
The LTC4089-1 is a complete PowerPath™ controller
for battery powered USB applications. The LTC4089-1
is designed to receive power from a low voltage source
(e.g., USB or 5V wall adapter), a high voltage source (e.g.,
FireWire/IEEE1394, automotive battery, 12V wall adapter,
etc.), and a single-cell Li-Ion battery. It can then deliver
power to an application connected to the OUT pin and a
batteryconnectedtotheBATpin(assumingthatanexternal
supply other than the battery is present). Power supplies
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.
The LTC4089-1 also includes a high voltage switching
regulator which has the ability to receive power from a
high voltage input. This input takes priority over the USB
V
input (i.e., if both HVIN and IN are present, load
BUS
current and charge current will be delivered via the high
voltage path). When enabled, the high voltage regulator
regulates the HVOUT voltage using a 750kHz constant
frequency, current mode regulator. An external PFET be-
tween HVOUT (drain) and OUT (source) is turned on via
the HVPR pin allowing OUT to charge the battery and/or
supply power to the application. The LTC4089-1 provides
a fixed 5V output.
that have limited current resources (such as USB V
BUS
supplies) should be connected to the IN pin which has a
programmable current limit. Battery charge current will
be adjusted to ensure that the sum of the charge current
and load current does not exceed the programmed input
current limit (see Figure 1).
Input Current Limit
An ideal diode function provides power from the battery
whenoutput/loadcurrentexceedstheinputcurrentlimitor
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
Whenever the input power path is enabled (i.e., SUSP =
0V and HVIN = 0V) and power is available at IN, power
is delivered to OUT. The current limit and charger control
circuits of the LTC4089-1 are designed to limit input cur-
rent as well as control battery charge current as a function
PowerPath is a registered trademark of Linear Technology Corporation.
HVIN
SW
L1
Q1
D1
HIGH VOLTAGE
BUCK REGULATOR
HVOUT
C1
+
4.25V (RISING)
–
3.15V (FALLING)
HVPR
19
+
–
LOAD
75mV (RISING)
+
25mV (FALLING)
–
ENABLE
IN
OUT
OUT
21
21
USB CURRENT LIMIT
–
+
25mV
–
+
25mV
+
–
GATE
BAT
CC/CV REGULATOR
CHARGER
EDA
IDEAL
DIODE
BAT
21
+
4089-1 F01
LI-ION
Figure 1. Simplified PowerPath Block Diagram
40891f
11
LTC4089-1
U
OPERATIO
of I . The input current limit, I , can be programmed
The LTC4089-1 reduces battery charge current such that
the sum of the battery charge current and the load current
does not exceed the programmed input current limit (one-
fifth of the programmed input current limit when HPWR is
low, see Figure 2). The battery charge current goes to zero
when load current exceeds the programmed input current
limit (one-fifth of the limit when HPWR is low). Even if
the battery charge current is set to exceed the allowable
USB current, the USB specification will not be violated.
The battery charger will reduce its current as needed to
ensure that the USB specification is not exceeded. If the
load current is greater than the current limit, the output
voltage will drop to just under the battery voltage where
the ideal diode circuit will take over and the excess load
current will be drawn from the battery.
OUT
CL
using the following formula:
1000
1000V
RCLPROG
ICL
=
• VCLPROG
=
R
CLPROG
where V
is the CLPROG pin voltage (typically 1V)
CLPROG
and R
is the total resistance from the CLPROG pin
CLPROG
to ground. For best stability over temperature and time,
1% metal film resistors are recommended.
The programmed battery charge current, I
defined as:
, is
CHG
50,000
RPROG
50,000V
RPROG
ICHG
=
• VPROG
=
Input current, I , is equal to the sum of the BAT pin
IN
InUSBapplications,theminimumvalueforR
should
CLPROG
output current and the OUT pin output current. V
CLPROG
< I
be 2.1k. This will prevent the input current from exceeding
500mA due to LTC4089-1 tolerances and quiescent cur-
rents. A 2.1k CLPROG resistor will give a typical current
limit of 476mA in high power mode (HPWR = 1) or 95mA
in low power mode (HPWR = 0).
will typically servo to 1V, however, if I
+ I
OUT
BAT CL
then V
will track the input current according to the
CLPROG
following equation:
VCLPROG
IIN = IOUT +IBAT
=
• 1000
RCLPROG
When SUSP is driven to a logic high, the input power
path is disabled and the ideal diode from BAT to OUT will
supply power to the application.
The current limiting circuitry in the LTC4089-1 can and
should be configured to limit current to 500mA for USB
applications (selectable using the HPWR pin and pro-
grammed using the CLPROG pin).
I
I
IN
IN
500
400
300
200
100
100
80
60
40
20
0
500
I
IN
400
300
200
100
I
I
LOAD
LOAD
I
LOAD
I
= I
BAT CHG
I
= I = I
BAT CL OUT
I
I
I
BAT
(CHARGING)
BAT
(CHARGING)
BAT
(CHARGING)
0
0
100
200
0
300
400
500
I
20
40
0
60
80
100
I
100
200
0
300
400
500
I
BAT
BAT
I
BAT
I
I
LOAD(mA)
LOAD(mA)
LOAD (mA)
(IDEAL DIODE)
4089-1 F02a
(IDEAL DIODE)
4089-1 F02b
(IDEAL DIODE)
4089-1 F02c
(a) High Power Mode/Full Charge
= 100k and R = 2k
(b) Low Power Mode/Full Charge
= 100k and R = 2k
(c) High Power Mode with
= 500mA and I = 250mA
R
R
I
CL
PROG
CLPROG
PROG
CLPROG
CHG
R
= 200k and R
= 2k
PROG
CLPROG
Figure 2. Input and Battery Currents as a Function of Load Current
40891f
12
LTC4089-1
U
OPERATIO
High Voltage Step Down Regulator
Ideal Diode from BAT to OUT
The power delivered from HVIN to HVOUT is controlled
by a 750kHz constant frequency, current mode step down
regulator. An external P-channel MOSFET directs this
power to OUT and prevents reverse conduction from OUT
to HVOUT (and ultimately HVIN).
The LTC4089-1 has an internal ideal diode as well as a
controller for an optional external ideal diode. If a battery
is the only power supply available, or if the load current
exceeds the programmed input current limit, then the
battery will automatically deliver power to the load via an
ideal diode circuit between the BAT and OUT pins. The
ideal diode circuit (along with the recommended 4.7µF
capacitor on the OUT pin) allows the LTC4089-1 to handle
A 750kHz oscillator enables an RS flip-flop, turning on the
internal1.95ApowerswitchQ1.Anamplifierandcompara-
tor monitor the current flowing between the HVIN and SW
pins, turning the switch off when this current reaches a
large transient loads and wall adapter or USB V
con-
BUS
nect/disconnect scenarios without the need for large bulk
capacitors. The ideal diode responds within a few micro-
seconds and prevents the OUT pin voltage from dropping
significantly below the BAT pin voltage. A comparison of
the I-V curve of the ideal diode and a Schottky diode can
be seen in Figure 3.
level determined by the voltage at V . An error amplifier
C
servos the V node to maintain 5V at HVOUT. An active
C
clamp on the V node provides current limit. The V node
C
C
is also clamped to the voltage on the HVEN pin; soft-start
is implemented by a voltage ramp at the HVEN pin using
an external resistor and capacitor.
If the input current increases beyond the programmed
input current limit additional current will be drawn from
the battery via the internal ideal diode. Furthermore, if
Aninternalregulatorprovidespowertothecontrolcircuitry.
Thisregulatorincludesanundervoltagelockouttoprevent
switching when HVIN is less than about 4.7V. The HVEN
pin is used to disable the high voltage regulator. HVIN
input current is reduced to less than 2µA and the external
P-channel MOSFET disconnects HVOUT from OUT when
the high voltage regulator is disabled.
power to IN (USB V ) or HVIN (high voltage input) is
BUS
removed, then all of the application power will be provided
by the battery via the ideal diode. A 4.7µF capacitor at
OUT is sufficient to keep a transition from input power
to battery power from causing significant output voltage
droop.Theidealdiodeconsistsofaprecisionamplifierthat
enables a large P-channel MOSFET transistor whenever
The switch driver operates from either the high voltage
input or from the BOOST pin. An external capacitor and
diode are used to generate a voltage at the BOOST pin that
is higher than the input supply. This allows the driver to
fully saturate the internal bipolar NPN power switch for
efficient operation.
the voltage at OUT is approximately 20mV (V ) below
FWD
the voltage at BAT. The resistance of the internal ideal
diode is approximately 200m . If this is sufficient for the
When HVOUT is below 3.95V the operating frequency
is reduced. This frequency foldback helps to control the
regulator output current during start-up and overload.
CONSTANT
LTC4089
I
0N
I
MAX
CONSTANT
SLOPE: 1/R
DIO(ON)
R
0N
I
FWD
SCHOTTKY
DIODE
CONSTANT
0N
SLOPE: 1/R
FWD
V
0
FORWARD VOLTAGE (V)
V
FWD
4089-1 F03
Figure 3. LTC4089-1 Versus Schottky
Diode Forward Voltage Drop
40891f
13
LTC4089-1
U
OPERATIO
application then no external components are necessary.
However, if more conductance is needed, an external
P-channel MOSFET can be added from BAT to OUT. The
GATE pin of the LTC4089-1 drives the gate of the PFET for
automatic ideal diode control. The source of the external
MOSFETshouldbeconnectedtoOUTandthedrainshould
be connected to BAT. In order to help protect the external
MOSFET in over-current situations, it should be placed in
close thermal contact to the LTC4089-1.
constant-current mode once the voltage on the BAT pin
rises above 2.8V. In constant current mode, the charge
current is set by R
. When the battery approaches the
PROG
finalfloatvoltage,thechargecurrentbeginstodecreaseas
the LTC4089-1 switches to constant-voltage mode. When
the charge current drops below 10% of the programmed
charge current while in constant-voltage mode the CHRG
pin assumes a high impedance state.
An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the CHRG pin assumes a
high impedance state, if it has not already done so. While
charging in constant current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automaticallyincreased.Inotherwords,thechargetimeis
extendedinverselyproportionaltotheactualchargecurrent
deliveredtothebattery.ForLi-Ionandsimilarbatteriesthat
require accurate final float potential, the internal bandgap
reference,voltageamplifierandtheresistordividerprovide
regulation with ±0.8% accuracy.
Battery Charger
ThebatterychargercircuitsoftheLTC4089-1aredesigned
for charging single cell lithium-ion batteries. Featuring
an internal P-channel power MOSFET, the charger uses a
constant-current/constant-voltage charge algorithm with
programmable current and a programmable timer for
charge termination. Charge current can be programmed
up to 1.2A. The final float voltage accuracy is ±0.8%
typical. No blocking diode or sense resistor is required
when powering either the IN or the HVIN pins. The CHRG
open-drain status output provides information regarding
the charging status of the LTC4089-1 at all times. An NTC
input provides the option of charge qualification using
battery temperature.
Trickle Charge and Defective Battery Detection
At the beginning of a charge cycle, if the battery volt-
age is low (below 2.8V) the charger goes into trickle
charge reducing the charge current to 10% of the full-
scale current. If the low battery voltage persists for one
quarter of the total charge time, the battery is assumed
to be defective, the charge cycle is terminated and the
CHRG pin output assumes a high impedance state. If
for any reason the battery voltage rises above ~2.8V the
charge cycle will be restarted. To restart the charge cycle
(i.e., when the dead battery is replaced with a discharged
battery), simply remove the input voltage and reapply it
or cycle the TIMER pin to 0V.
An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
presetvalueofapproximately115°C. Thisfeatureprotects
the LTC4089-1 from excessive temperature, and allows
the user to push the limits of the power handling capabil-
ity of a given circuit board without risk of damaging the
LTC4089-1.AnotherbenefitoftheLTC4089-1thermallimit
is that charge current can be set according to typical, not
worst-case, ambient temperatures for a given application
with the assurance that the charger will automatically
reduce the current in worst-case conditions.
Programming Charge Current
The charge cycle begins when the voltage at the OUT
pin rises above the battery voltage and the battery volt-
age is below the recharge threshold. No charge current
actually flows until the OUT voltage is 100mV above
the BAT voltage. At the beginning of the charge cycle, if
the battery voltage is below 2.8V, the charger goes into
trickle charge mode to bring the cell voltage up to a safe
level for charging. The charger goes into the fast charge
The formula for the battery charge current is:
VPROG
RPROG
ICHG = IPROG • 50,000 =
• 50,000
where V
is the PROG pin voltage and R
is the
PROG
PROG
total resistance from the PROG pin to ground. Keep in
mindthatwhentheLTC4089-1ispoweredfromtheINpin,
40891f
14
LTC4089-1
U
OPERATIO
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.
HPWR input is set to a logic low, then the input current
limit will be reduced from 500mA to 100mA. With no ad-
ditional system load, this means the charge current will
be reduced to 100mA. Therefore, the termination timer
will automatically slow down by a factor of five until the
For example, if typical 500mA charge current is required,
calculate:
charger reaches constant voltage mode (i.e. V = 4.1V)
BAT
1V
500mA
RPROG
=
• 50,000 = 100k
or HPWR is returned to a logic high. The charge cycle is
automaticallylengthenedtoaccountforthereducedcharge
current. The exact time of the charge cycle will depend on
how long the charger remains in constant-current mode
and/or how long the HPWR pin remains a logic low.
For best stability over temperature and time, 1% metal film
resistorsarerecommended.Undertricklechargeconditions,
this current is reduced to 10% of the full-scale value.
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
The Charge Timer
The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:
Connecting the TIMER pin to ground disables the battery
charger.
CTIMER •RPROG • 3hours
tTIMER(hours) =
CHRG Status Output Pin
0.1µF • 100k
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET capable of driv-
ing an LED. When the charge current drops below 10%
of the programmed full charge current while in constant
voltage mode, the pin assumes a high impedance state,
but charge current continues to flow until the charge
time elapses. If this state is not reached before the end
of the programmable charge time, the pin will assume a
high impedance state when a time-out occurs. The CHRG
current detection threshold can be calculated by the fol-
lowing equation:
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leavingshutdownandthevoltageonthebatteryislessthan
the recharge threshold. At power-up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
therechargethresholdthetimerwillnotstartandcharging
is prevented. If after power-up the battery voltage drops
below the recharge threshold, or if after a charge cycle
the battery voltage is still below the recharge threshold,
the charge time is set to one-half of a full cycle.
0.1V
RPROG
5000V
RPROG
The LTC4089-1 has a feature that extends charge time
automatically. Charge time is extended if the charge
current in constant current mode is reduced due to load
current or thermal regulation. This change in charge time
is inversely proportional to the change in charge current.
As the LTC4089-1 approaches constant voltage mode
the charge current begins to drop. This change in charge
current is due to normal charging operation and does not
affect the timer duration.
IDETECT
=
•50,000 =
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Note: The end-of-charge (EOC) comparator that moni-
tors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant volt-
age mode, it will toggle CHRG to a high impedance state.
If, for some reason the charge current rises back above
Consider, for example, a USB charge condition where
R
= 2k, R
= 100k and C
= 0.1µF. This
CLPROG
PROG
TIMER
corresponds to a three hour charge cycle. However, if the
40891f
15
LTC4089-1
U
OPERATIO
the threshold, the CHRG pin will not resume the strong
pull-down state. The EOC latch can be reset by a recharge
Charger Undervoltage Lockout
AninternalundervoltagelockoutcircuitmonitorstheV
OUT
cycle (i.e., V
drops below the recharge threshold) or
BAT
voltage and disables the battery charger circuits until
toggling the input power to the part.
V
OUT
rises above the undervoltage lockout threshold. The
battery charger UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current
in the power MOSFET, the charger UVLO circuit keeps the
NTC Thermistor—Battery Temperature Charge
Qualification
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack. The NTC circuitry is shown in Figure 4.
charger shut down if V
exceeds V . If the charger
BAT
OUT
UVLO comparator is tripped, the charger circuits will
not come out of shutdown until V
by 50mV.
exceeds V
OUT
BAT
To use this feature, connect the NTC thermistor (R
)
NTC
)from
betweentheNTCpinandgroundandaresistor(R
NOM
Suspend
the NTC pin to VNTC. R
should be a 1% resistor with
NOM
a value equal to the value of the chosen NTC thermistor at
25°C(thisvalueis10kforaVishayNTHS0603N02N1002J
thermistor). The LTC4089-1 goes into hold mode when
The LTC4089-1 can be put in suspend mode by forcing
the SUSP pin greater than 2.3V. In suspend mode, the
ideal diode function from BAT to OUT is kept alive. If
power is applied to the HVIN pin, then charging will be
unaffected. Current drawn from the IN pin is reduced to
50µA. Suspend mode is intended to comply with the USB
power specification mode of the same name.
the resistance (R ) of the NTC thermistor drops to 0.48
HOT
times the value of R
, or approximately 4.8k, which
NOM
should be at 45°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a re-
turn to a valid temperature. As the temperature drops, the
resistance of the NTC thermistor rises. The LTC4089-1 is
designed to go into hold mode when the value of the NTC
thermistor increases to 2.82 times the value of R
. This
NOM
resistance is R
. For a Vishay NTHS0603N02N1002J
COLD
VNTC
6
LTC4089-1
TOO_COLD
thermistor, this value is 28.2k which corresponds to ap-
proximately 0°C. The hot and cold comparators each have
approximately 2°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin will disable
the NTC function.
0.738 • VNTC
R
NOM
10k
–
+
NTC
5
R
NTC
Current Limit Undervoltage Lockout
10k
–
+
TOO_HOT
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
0.326 • VNTC
until V rises above the undervoltage lockout threshold.
IN
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
thepowerMOSFET, thecurrentlimitUVLOcircuitdisables
the current limit (i.e., forces the input power path to a high
+
–
NTC_ENABLE
0.1V
impedance state) if V
exceeds V . If the current limit
4089-1 F04
OUT
IN
UVLO comparator is tripped, the current limit circuits will
Figure 4. NTC Circuit
not come out of shutdown until V
falls 50mV below
OUT
the V voltage.
IN
40891f
16
LTC4089-1
U U
W U
APPLICATIO S I FOR ATIO
USB and 5V Wall Adapter Power
will be the programmed charge current plus the largest
expected application load current. For robust operation in
faultconditions,thesaturationcurrentshouldbe~2.3A.To
keep efficiency high, the series resistance (DCR) should
be less than 0.1 . Table 1 lists several vendors and types
that are suitable.
Although the LTC4089-1 is designed to draw power from
a USB port, a higher power 5V wall adapter can also be
used to power the application and charge the battery
(higher voltage wall adapters can be connected directly to
HVIN). Figure 5 shows an example of combining a 5V wall
adapter and a USB power input. With its gate grounded
by 1k, P-channel MOSFET MP1 provides USB power to
the LTC4089-1 when 5V wall power is not available. When
5V wall power is available, D1 both supplies power to the
LTC4089,pullsthegateofMN1hightoincreasethecharge
current (by increasing the input current limit), and pulls
the gate of MP1 high to disable it and prevent conduction
back to the USB port.
Table 1: Inductor Vendors
PART
SERIES
INDUCTANCE
(µH)
SIZE
(mm)
VENDOR
URL
Sumida www.sumida.com CDRH5D28
CDRH6D38
8.2, 10
10
6
7
6
7
3
4
TDK
www.tdk.com
www.toko.com
SLF6028T
D63LCB
10
6
6
2.8
Toko
10
6.3 6.3 3
Catch Diode
5V WALL
Depending on load current, a 1A to 2A Schottky diode is
recommended for the D1 catch diode. The diode must
have a reverse voltage rating equal to, or greater than,
the maximum input voltage. The ON Semiconductor
MBRM140 and the Diodes Inc. DFLS140/160/240 are
good choices.
I
CHG
ADAPTER
BAT
850mA I
CHG
D1
LTC4089-1
USB POWER
IN
PROG
500mA I
+
CHG
Li-Ion
BATTERY
MP1
1k
CLPROG
2.87k
MN1
2k
59k
High Voltage Regulator Capacitor Selection
4089-1 F05
Bypass the HVIN pin of the LTC4089-1 circuit with a 1µF,
or higher value ceramic capacitor of X7R or X5R type. Y5V
typeshavepoorperformanceovertemperatureandapplied
voltageandshouldnotbeused. A1µFceramicisadequate
to bypass the high voltage input and will easily handle the
ripple current. However, if the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a low performance
electrolytic capacitor.
Figure 5. USB or 5V Wall Adapter Power
Inductor Selection and Maximum Output Current
A good choice for the inductor value is L = 10µH. With this
valuethemaximumloadcurrentwillbe1A.TheRMScurrent
rating of the inductor must be greater than the maximum
load current and its saturation current should be about
30% higher. Note that the maximum load current
40891f
17
LTC4089-1
U U
W U
APPLICATIO S I FOR ATIO
Thehighvoltageregulatoroutputcapacitorcontrolsoutput
ripple, supplies transient load currents, and stabilizes the
regulator control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good value is 10µF. Use X5R or
X7R types, and note that a ceramic capacitor biased with
start-up. A voltage ramp at the HVEN pin can be created
by driving the pin through an external RC filter (see Figure
6).BychoosingalargeRCtimeconstant,thepeakstart-up
current will not overshoot the current that is required to
regulatetheoutput.Choosethevalueoftheresistorsothat
it can supply 20µA when the HVEN pin reaches 2.3V.
V
will have less than its nominal capacitance. Table
HVOUT
RUN
2 lists several capacitor vendors.
Table 2: Capacitor Vendors
15k
LTC4089-1
HVEN
PART
SERIES
COM-
MENTS
VENDOR
PHONE
URL
0.1µF
GND
Panasonic (714) 373-7366 www.panasonic.com Ceramic, EEF Series
Polymer,
Tantalum
4089-1 F06
Figure 6. Using the HVEN Pin to Soft-Start the
High Voltage Regulator.
Kemet
Sanyo
(864) 963-6300
www.kemet.com
Ceramic,
Tantalum
T494,
T495
(408) 749-9714 www.sanyovideo.com Ceramic,
POSCAP
Alternate NTC Thermistors
Polymer,
Tantalum
The LTC4089-1 NTC trip points were designed to work
with thermistors whose resistance-temperature charac-
teristics follow Vishay Dale’s “R-T Curve 2.” The Vishay
NTHS0603N02N1002J is an example of such a thermis-
tor. However, Vishay Dale has many thermistor products
that follow the “R-T Curve 2” characteristic in a variety of
Murata
AVX
(404) 436-1300
www.murata.com
www.avxcorp.com
Ceramic
Ceramic,
Tantalum
TPS
Series
Taiyo
Yuden
(864) 963-6300 www.taiyo-yuden.com Ceramic
sizes. Furthermore, any thermistor whose ratio of R
COLD
BOOST Pin Considerations
to R
is about 6.0 will also work (Vishay Dale R-T Curve
HOT
Capacitor C3 and diode D2 (see Block Diagram) are used
to generate a boost voltage that is higher than the input
voltage. In most cases, a 0.1µF capacitor and fast-switch-
ing diode (such as the 1N4148 or 1N914) will work well.
The BOOST pin must be at least 2.2V above the SW pin
for proper operation.
2 shows a ratio of 2.816/0.4839 = 5.82).
Power conscious designs may want to use thermistors
whoseroomtemperaturevalueisgreaterthan10k. Vishay
Dalehasanumberofvaluesofthermistorfrom10kto100k
that follow the “R-T Curve 1.” Using these as indicated
in the NTC Thermistor section will give temperature trip
points of approximately 3°C and 42°C, a delta of 39°C.
This delta in temperature can be moved in either direc-
High Voltage Regulator Soft-Start
The HVEN pin can be used to soft-start the high voltage
regulator and reduce the maximum input current during
tion by changing the value of R
with respect to R
.
NOM
NTC
40891f
18
LTC4089-1
U U
W U
APPLICATIO S I FOR ATIO
Increasing R
will move both trip points to lower
where R
COLD
is the value of the bias resistor, R
and
NOM
NOM
HOT
temperatures. Likewise, a decrease in R
with respect
R
are the values of R
at the desired temperature
NOM
NTC
to R
will move the trip points to higher temperatures.
trip points. Continuing the forementioned example with
a desired hot trip point of 50°C:
NTC
To calculate R
for a shift to lower temperature, for
NOM
example, use the following equation:
RCOLD − RHOT
2.816 − 0.484
RNOM
=
R
RNOM
=
COLD •RNTC at 25°C
2.816
100k •(3.266 − 0.3602)
2.816 − 0.484
where R
is the resistance ratio of R
at the desired
COLD
NTC
=
coldtemperaturetrippoint.Toshiftthetrippointstohigher
temperatures use the following equation:
RHOT
0.484
= 124.6k,124k nearest 1%
RNOM
=
•RNTC at 25°C
0.484
2.816 − 0.484
3.266 − 0.3602 − 0.3602
where R
is the resistance ratio of R
at the desired
NTC
HOT
•
hot temperature trip point.
R1= 100k •
= 24.3k
(
Thefollowingexampleusesa100KR-TCurve1Thermistor
from Vishay Dale. The difference between the trip points
is 39°C, from before—and the desired cold trip point of
0°C, would put the hot trip point at about 39°C. The R
needed is calculated as follows:
)
NOM
The final solution is shown in Figure 7, where
RCOLD
R
= 124k, R1 = 24.3k and R
= 100k at 25°C
NOM
NTC
RNOM
=
•RNTC at 25°C=
2.816
3.266
2.816
VNTC
LTC4089-1
•100kΩ=116kΩ
15
0.738 • VNTC
R
NOM
–
+
The nearest 1% value for R
is 115k. This is the value
124k
NOM
TOO_COLD
TOO_HOT
NTC
14
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 39°C, respectively. To
extend the delta between the cold and hot trip points, a
R1
24.3k
resistor(R1)canbeaddedinserieswithR (seeFigure7).
The values of the resistors are calculated as follows:
–
+
NTC
0.326 • VNTC
R
NTC
100k
RCOLD − RHOT
2.816 − 0.484
RNOM
=
+
–
NTC_ENABLE
0.1V
0.484
2.816 − 0.484
R1=
• RCOLD − RHOT − R
HOT
[
]
4089-1 F07
Figure 7. Modified NTC Circuit
40891f
19
LTC4089-1
U U
W U
APPLICATIO S I FOR ATIO
P = (1− 0.87)• 4V •(0.7A + 0.3A) − 0.4V •
Power Dissipation and High Temperature
Considerations
[
]
D
4V
12V
1−
•(0.7A + 0.3A)+ 0.3V • 0.7A = 463mW
The die temperature of the LTC4089-1 must be lower than
the maximum rating of 110°C. This is generally not a con-
cern unless the ambient temperature is above 85°C. The
total power dissipated inside the LTC4089-1 depends on
manyfactors,includinginputvoltage(INorHVIN),battery
voltage, programmed charge current, programmed input
current limit, and load current.
This example assumes 87% efficiency, V
= 12V, V
BAT
OUT
HVIN
= 3.7V (V
is about 4V), I = 700mA, I
= 300mA
HVOUT
BAT
resulting in less than 0.5W total dissipation.
If the LTC4089-5 is being powered from HVIN, the power
dissipation can be estimated by calculating the regulator
power loss from an efficiency measurement and subtract-
ing the catch diode loss.
In general, if the LTC4089-1 is being powered from IN the
power dissipation can be calculated as follows:
P =(1− η)•(5V •(IBAT +IOUT))
D
PD = (V − VBAT) •IBAT + (V − VOUT) •IOUT
IN
IN
5V
V
HVIN
−V • 1−
•(IBAT +IOUT)
where P is the power dissipated, I
is the battery
BAT
D
D
charge current, and I
is the application load current.
OUT
+(5V − VBAT)•IBAT
For a typical application, an example of this calculation
would be:
The difference between this equation and the LTC4089-1
is the last term which represents the power dissipation in
the battery charger. For a typical application, an example
of this calculation would be:
PD = (5V − 3.7V) • 0.4A + (5V − 4.75V) • 0.1A =
545mW
This example assumes V = 5V, V
= 4.75V, V
=
IN
OUT
BAT
3.7V, I = 400mA, and I
= 100mA resulting in slightly
P =(1− 0.87)•(5V •(0.7A + 0.3A))
BAT
OUT
D
more than 0.5W total dissipation.
5V
12V
−0.4V •(1−
)•(0.7A + 0.3A)
If the LTC4089-1 is being powered from HVIN, the power
dissipation can be estimated by calculating the regulator
powerlossfromanefficiencymeasurement,andsubtract-
ing the catch diode loss.
+(5V − 3.7V)•0.7A =1,327mW
Like the LTC4089-1 example, this example assumes 87%
efficiency, V
= 12V, V = 3.7V, I = 700mA, I
=
HVIN
BAT
BAT
OUT
PD = (1− η) •(VHVOUT •(IBAT +IOUT))− VD •
300mA resulting in 1.3W total dissipation.
VHVOUT
VHVIN
1−
•(IBAT +IOUT)+ 0.3V •IBAT
To prevent power dissipation of this magnitude from
causing high die temperature, it is important to solder the
exposed backside of the package to a ground plane. This
ground should be tied to other copper layers below with
thermalvias;theselayerswillspreadtheheatdissipatedby
the LTC4089-1. Additional vias should be placed near the
catch diodes. Adding more copper to the top and bottom
layers, and tying this copper to the internal planes with
vias, can reduce thermal resistance further. With these
steps, the thermal resistance from die (i.e., junction) to
where is the efficiency of the high voltage regulator and
V is the forward voltage of the catch diode at I = I
D
BAT
+ I . The first term corresponds to the power lost in
OUT
converting V
to V , the second term subtracts
HVOUT
HVIN
the catch diode loss, and the third term is the power dis-
sipated in the battery charger. For a typical application,
an example of this calculation would be:
ambient can be reduced to
= 40°C/W.
JA
40891f
20
LTC4089-1
U U
W
APPLICATIO S I FOR ATIO
The power dissipation in the other power compo-
nents—catch diodes, MOSFETs, boost diodes and induc-
tors—causes additional copper heating and can further
increase the “ambient” temperature of the IC.
High frequency currents, such as the high voltage input
current of the LTC4089-1, tend to find their way along
the ground plane on a mirror path directly beneath the
incident path on the top of the board. If there are slits or
cuts in the ground plane due to other traces on that layer,
the current will be forced to go around the slits. If high
frequency currents are not allowed to flow back through
their natural least-area path, excessive voltage will build
up and radiated emissions will occur. See Figure 9.
Board Layout Considerations
As discussed in the previous section, it is critical that
the exposed metal pad on the backside of the LTC4089-1
package be soldered to the PC board ground. Further-
more, proper operation and minimum EMI requires a
careful printed circuit board (PCB) layout. Note that large,
switched currents flow in the power switch (between the
HVIN and SW pins), the catch diode and the HVIN input
capacitor. These components, along with the inductor and
output capacitor, should be placed on the same side of
the circuit board, and their connections should be made
on that layer. Place a local, unbroken ground plane below
thesecomponents.Theloopformedbythesecomponents
should be as small as possible. Additionally, the SW and
BOOSTnodesshouldbekeptassmallaspossible.Figure8
showstherecommendedcomponentplacementwithtrace
and via locations.
4089 F09
Figure 9. Ground Currents Follow Their Incident Path
at High Speed. Slices in the Ground Plane Cause High
Voltage and Increased Emissions.
V and V
Bypass Capacitor
IN
HVIN
Many types of capacitors can be used for input bypassing,
however,cautionmustbeexercisedwhenusingmultilayer
ceramic capacitors. Because of the self-resonant and high
Q characteristics of some types of ceramic capacitors,
high voltage transients can be generated under some
start-up conditions, such as from connecting the charger
input to a hot power source. For more information, refer
to Application Note 88.
MINIMIZE D1, L1,
C3, U1, SW PIN LOOP
C1 AND D1
GND PADS
SIDE-BY-SIDE
AND SEPERATED
WITH C3 GND PAD
Battery Charger Stability Considerations
Theconstant-voltagemodefeedbackloopisstablewithout
any compensation when a battery is connected with low
impedanceleads.Excessiveleadlength,however,mayadd
enough series inductance to require a bypass capacitor
of at least 1µF from BAT to GND. Furthermore, a 4.7µF
capacitor with a 0.2 to 1 series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
U1 THERMAL PAD
SOLDERED TO PCB.
VIAS CONNECTED TO ALL
GND PLANES WITHOUT
THERMAL RELIEF
MINIMIZE TRACE LENGTH
4089-1 F08
Figure 8. Suggested Board Layout
40891f
21
LTC4089-1
U U
W
APPLICATIO S I FOR ATIO
D2
SD101AWS
L1
C2
0.1 F
6.3V
V
10 H
IN
20
E1
E2
SLF6028T-100M1R3
V
IN
6V
21
C1
1 F
50V
19
E16
H
HVIN
BOOST SW
+
VOUT
TO 36V
C3
22 F
6.3V
C9
22 F
50V
R1
1M
1%
D1
DLFS160
GND
ON
JP1
VIN
D3
HVPR
RED
1
2
3
3
HVOUT
HVOUT
HVPR
OUT
LTC4089-1
R7
22
680
HVEN
18
7
C7
1000pF
OFF
50V
Q1
E3
Si2333DS
USB
4.35V
TO 5.5V
R6
12
15
IN
1k
13
10
11
8
C5
4.7 F
6.3V
R2
1
1%
E4
OUT
HPWR
SUSP
C6
4.7 F
6.3V
JP2
CURRENT
16
Q2
GND
GATE
BAT
C4
1
2
3
Si2333DS
USB
500mA
0.1 F
10%
E6
LI-ION+
17
C8
TIMER
D4
4.7 F
6.3V
R3
2.1k
1%
CHGR
100mA
CHRG
VNTC
NTC
GRN
R9
1
R8
680
14
9
CLPROG
PROG
6
E7
GND
E8
HPWR
R4
71.5k
1%
R5
10k
1%
5
JP3
USB ON/OFF
1
E9
CHGR
OFF
V
C
GND
2
GND
1
E11
NTC
2
3
4
JP4
NTC
10pF
4089-1 F10
ON
1
2
3
EXT
INT
E13
SUSP
E10
CLPROG
R10
10k
1%
E12
PROG
4089-1 TA02
Figure 10. Typical Application Diagram
40891f
22
LTC4089-1
U
PACKAGE DESCRIPTIO
DJC Package
22-Lead Plastic DFN (6mm 3mm)
(Reference LTC DWG # 05-08-1714)
0.889
0.70 ±0.05
R = 0.10
0.889
3.60 ±0.05
1.65 ±0.05
2.20 ±0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
5.35 ± 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. APPLY SOLDER MASK TO AREAS THAT
ARE NOT SOLDERED
3. DRAWING IS NOT TO SCALE
R = 0.115
TYP
0.40 ± 0.05
6.00 ±0.10
(2 SIDES)
0.889
12
22
R = 0.10
TYP
0.889
3.00 ±0.10
(2 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
PIN #1 NOTCH
R0.30 TYP OR
0.25mm × 45°
CHAMFER
11
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
5.35 ± 0.10
(DJC) DFN 0605
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX)
IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
40891f
InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4089-1
RELATED PARTS
PART NUMBER
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High Voltage Power Path Controllers in
ThinSOT
V = 3V to 36V, More Efficient than Diode ORing, Automatic Switching Between DC
IN
Sources, Simplified Load Sharing, ThinSOT Package.
Power Management
LTC3405/LTC3405A 300mA (I ), 1.5MHz, Synchronous
95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 20µA, I < 1µA, ThinSOT Package
OUT Q SD
OUT
IN
Step-Down DC/DC Converter
LTC3406/LTC3406A 600mA (I ), 1.5MHz, Synchronous
95% Efficiency, V = 2.5V to 5.5V, V
= 0.6V, I = 20µA, I < 1µA, ThinSOT Package
Q SD
OUT
IN
OUT
OUT
OUT
Step-Down DC/DC Converter
LTC3411
LTC3440
LTC3455
LT3493
1.25A (I ), 4MHz, Synchronous
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60µA, I < 1µA, MS10 Package
Q SD
OUT
IN
Step-Down DC/DC Converter
600mA (I ), 2MHz, Synchronous
95% Efficiency, V = 2.5V to 5.5V, V
= 2.5V, I = 25µA, I < 1µA, MS Package
Q SD
OUT
IN
Buck-Boost DC/DC Converter
Dual DC/DC Converter with USB Power Seamless Transition Between Power Sources: USB, Wall Adapter and Battery; 95%
Manager and Li-Ion Battery Charger
Efficient DC/DC Conversion
1.2A, 750kHz Step-Down Switching
Regulator
88% Efficiency, V = 3.6V to 36V (40V Maximum), V
= 0.8V, I < 2µA, 2mm 3mm
OUT SD
IN
DFN Package
LTC4055
LTC4066
LTC4085
USB Power Controller and Battery
Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,
200m Ideal Diode, 4mm 4mm QFN16 Package
USB Power Controller and Li-Ion Battery Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 50m
Charger with Low-Loss Ideal Diode
Ideal Diode, 4mm 4mm QFN24 Package
USB Power Manager with Ideal Diode
Controller and Li-Ion Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,
200m Ideal Diode with <50m Option, 4mm 3mm DFN14 Package
ThinSOT is a trademark of Linear Technology Corporation.
40891f
LT 1106 • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
LINEAR TECHNOLOGY CORPORATION 2006
(408)432-1900 FAX: (408) 434-0507 www.linear.com
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