LTC4089EDJC-1#TR_技术文档

LTC4089/LTC4089-5

USB Power Manager with

High Voltage Switching Charger

FEATURES

DESCRIPTION

The LTC^®4089/LTC4089-5 are USB power managers plus

highvoltageLi-Ionbatterychargers.Thesedevicescontrol

the total current used by the USB peripheral for operation

and battery charging. Battery charge current is automati-

cally reduced such that the sum of the load current and

thechargecurrentdoesnotexceedtheprogrammedinput

currentlimit. TheLTC4089/LTC4089-5alsoaccommodate

high voltage power supplies, such as 12V AC-DC wall

adapters, Firewire, or automotive power.

n

Seamless Transition Between Power Sources: Li-Ion

Battery, USB, and 6V to 36V External Supply

High Efﬁciency 1.2A Charger from 6V to 36V Input

with Adaptive Output Control (LTC4089)

Load Dependent Charging from USB Input

Guarantees Current Compliance

n

215m Internal Ideal Diode plus Optional External

Ideal Diode Controller Provides Low Loss Power

Path When External Supply/USB Not Present

Constant-Current/Constant-Voltage Operation with

Thermal Feedback to Maximize Charging Rate

without Risk of Overheating

Selectable 100% or 20% Current Limit (e.g., 500mA/

100mA) from USB Input

Preset 4.2V Charge Voltage with 0.8% Accuracy

C/10 Charge Current Detection Output

n

The LTC4089 provides an adaptive output that tracks the

battery voltage for high efﬁciency charging from the high

voltage input. The LTC4089-5 provides a ﬁxed 5V output

from the high voltage input to charge single cell Li-Ion

batteries. The charge current is programmable and an

end-of-charge status output (CHRG) indicates full charge.

Also featured is programmable total charge time, an NTC

thermistorinputusedtomonitorbatterytemperaturewhile

charging and automatic recharging of the battery.

n

NTC Thermistor Input for Temperature Qualiﬁed

Charging

Tiny (6mm × 3mm × 0.75mm) 22-Pin DFN Package

n

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 6522118, 6700364.

APPLICATIONS

n

Portable USB Devices—GPS Receivers, Cameras,

MP3 Players, PDAs

TYPICAL APPLICATION

LTC4089 High Voltage

0.1μF

SW

10μH

Battery Charger Efﬁciency

90

BOOST

CC CURRENT = 970mA

10μF

HVIN

HIGH (6V-36V)

VOLTAGE INPUT

85

80

75

70

65

60

55

50

45

40

NO OUTPUT LOAD

1μF

LTC4089

HVEN

FIGURE 10 SCHEMATIC

HVOUT

WITH R

= 52k

PROG

5V (NOM)

IN

HVPR

FROM USB

LTC4089

4.7μF

CABLE V

1k

BUS

TO LDOs

, ETC.

R

4.7μF

LTC4089-5

OUT

BAT

EGS

TIMER

HVIN = 8V

HVIN = 12V

HVIN = 24V

HVIN = 36V

CLPROG GND PROG

2k 100k

VOUT (TYP)

AVAILABLE INPUT

0.1μF

V

+0.3V

HV INPUT (LTC4089)

HV INPUT (LTC4089-5)

USB ONLY

BAT

5V

2.5

3

3.5

4

4.5

+

BATTERY VOLTAGE (V)

Li-Ion BATTERY

4089 TA01b

V

BAT

BAT ONLY

4089 TAO1

40895fc

1

LTC4089/LTC4089-5

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Notes 1, 2, 3, 4, 5)

TOP VIEW

Terminal Voltage

GND

1

2

3

4

5

6

7

8

9

22 HVEN

21 HVIN

20 BOOST

19 SW

BOOST ...................................................... –0.3V to 50V

BOOST above SW .....................................................25V

HVIN, HVEN .............................................. –0.3V to 40V

IN, OUT, HVOUT

HVOUT

V

C

NTC

VNTC

HVPR

CHRG

PROG

18 HVOUT

17 TIMER

16 SUSP

15 HPWR

14 CLPROG

13 OUT

t < 1ms and Duty Cycle < 1% .................. –0.3V to 7V

DC............................................................ –0.3V to 6V

BAT .............................................................. –0.3V to 6V

23

NTC, TIMER, PROG, CLPROG.......–0.3V to (V + 0.3V)

CC

CHRG, HPWR, SUSP, HVPR ......................... –0.3V to 6V

GATE 10

BAT 11

Pin Current, DC

12 IN

IN, OUT, BAT (Note 6)...............................................2.5A

Operating Temperature Range

LTC4089E.................................................–40°C to 85°C

Maximum Operating Junction Temperature .......... 110°C

Storage Temperature Range...................–65°C to 125°C

DJC PACKAGE

22-LEAD (6mm s 3mm) PLASTIC DFN

T

= 110°C, θ = 40°C/W

JA

EXPOSED PAD (PIN 23) IS GND, MUST BE SOLDERED TO PCB

JMAX

ORDER INFORMATION

LEAD FREE FINISH

LTC4089EDJC#PBF

LTC4089EDJC-5#PBF

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LTC4089EDJC#TRPBF

4089

–40°C to 85°C

22-Lead (6mm × 3mm) Plastic DFN

LTC4089EDJC-5#TRPBF 40895

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. HVIN = 12V, BOOST = 17V, V_IN= 5V, V_BAT= 3.7V, HVEN = 12V,

HPWR = 5V, R_PROG= 100k, R_CLPROG= 2k, SUSP = 0V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

USB Input Current Limit

l

V

USB Input Supply Voltage

Input Bias Current

IN

4.35

5.5

V

IN

l

I

= 0 (Note 7)

0.5

50

1

100

mA

μA

IN

BAT

Suspend Mode; SUSP = 5V

l

Current Limit

R

= 2k, HPWR = 5V

= 2k, HPWR = 0V

475

90

500

100

525

110

mA

LIM

CLPROG

Maximum Input Current Limit

(Note 8)

= 80mA Load

2.4

A

IN(MAX)

R

ON Resistance V to V

I

OUT

0.215

ON

IN

OUT

l

V

CLPROG Pin Voltage

R

= 2k

= 1k

0.98

1.00

1.02

V

CLPROG

I

Soft-Start Inrush Current

Input Current Limit Enable

IN

(V – V ) V Rising

5

mA/μs

SS

V

20

–80

50

–50

80

–20

mV

CLEN

IN

OUT IN

Threshold Voltage (V – V

)

(V – V ) V Falling

IN

OUT

IN

OUT IN

40895fc

2

LTC4089/LTC4089-5

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. HVIN = 12V, BOOST = 17V, V_IN= 5V, V_BAT= 3.7V, HVEN = 12V,

HPWR = 5V, R_PROG= 100k, R_CLPROG= 2k, SUSP = 0V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

3.8

MAX

UNITS

V

l

V

Input Undervoltage Lockout

V

IN

V

IN

Powers Part, Rising Threshold

3.6

4

UVLO

dV

Input Undervoltage Lockout

Hysteresis

Rising – V Falling

130

mV

UVLO

IN

High Voltage Regulator

V

HVIN Supply Voltage

HVIN Bias Current

6

36

V

HVIN

I

Not Switching

Shutdown; HVEN = 0V

1.9

0.01

2.5

2

mA

μA

V

Output Voltage with HVIN Present

Assumes HVOUT to OUT Connection (LTC4089)

Assumes HVOUT to OUT Connection (LTC4089-5)

3.45

4.85

V

+0.3

4.6

V

OUT

BAT

l

5

5.15

High Voltage Input Undervoltage

Lockout

V

HVIN

Rising

4.7

5

V

HVUVLO

f

SW

Switching Frequency

V

> 3.95V

= 0V

685

750

35

815

kHz

HVOUT

l

DC

Maximum Duty Cycle

Switch Current Limit

88

95

%

A

MAX

I

(Note 9)

1.5

1.95

330

2.3

SW(MAX)

V

Switch V

I

= 1A

mV

μA

V

SAT

CESAT

SW

I

Switch Leakage Current

Minimum Boost Voltage Above SW

BOOST Pin Current

2

LK

V

I

= 1A

1.85

30

2.2

50

SWD

SW

I

mA

BST

SW

Battery Management

V

Input Voltage

BAT

4.3

V

BAT

l

I

Battery Drain Current

V

BAT

= 4.3V, Charging Stopped

15

22

60

27

35

100

μA

Suspend Mode; SUSP = 5V

V

HVIN

= V = 0V, BAT Powers OUT, No Load

IN

V

Regulated Output Voltage

I

= 2mA

= 2mA; (0°C – 85°C)

4.165

4.158

4.200

4.235

4.242

V

FLOAT

BAT

l

I

Current Mode Charge Current

R

= 100k, No Load

465

900

500

535

mA

CHG

PROG

= 50k, No Load; (0°C – 85°C)

1000

1080

Maximum Charge Current

PROG Pin Voltage

(Note 8)

1.2

A

CHG(MAX)

l

V

R

PROG

R

PROG

= 100k

= 50k

0.98

1.00

1.02

V

PROG

l

k

Ratio of End-of-Charge Current to

Charge Current

V

= V

(4.2V)

FLOAT

0.085

0.1

0.11

mA/mA

EOC

BAT

I

Trickle Charge Current

V

BAT

= 2V, R = 100k

PROG

35

50

60

3

mA

V

TRIKL

V

Trickle Charge Threshold Voltage

Charger Enable Threshold Voltage

2.75

2.9

TRIKL

V

(V

– V ) Falling; V = 4V

– V ) Rising; V = 4V

55

80

mV

CEN

OUT

BAT

V

Recharge Battery Threshold Voltage

TIMER Accuracy

V

- V

RECHRG

65

100

135

10

mV

%

RECHRG

TIMER

FLOAT

t

= 4.3V

–10

BAT

Recharge Time

Percent of Total Charge Time

Percent of Total Charge Time, V < 2.8V

50

25

%

Low Battery Trickle Charge Time

%

BAT

T

Junction Temperature in Constant

Temperature Mode

105

°C

LIM

40895fc

3

LTC4089/LTC4089-5

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. HVIN = 12V, BOOST = 17V, V_IN= 5V, V_BAT= 3.7V, HVEN = 12V,

HPWR = 5V, R_PROG= 100k, R_CLPROG= 2k, SUSP = 0V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Internal Ideal Diode

R

Incremental Resistance, V

I

= 100mA

= 600mA

125

215

m

FWD

ON

BAT

Regulation

ON Resistance V to V

DIO,ON

FWD

BAT

OUT

BAT

l

V

Voltage Forward Drop (V - V

)

I

= 5mA

= 100mA

= 600mA

10

30

55

160

50

mV

BAT

OUT

BAT

V

Diode Disable Battery Voltage

2.8

V

OFF

I

Load Current Limit, for V

Regulation

550

mA

FWD

ON

Diode Current Limit

2.2

20

A

D(MAX)

External Ideal Diode

External Diode Forward Voltage

V

mV

FWD, EXT

Logic

l

V

Output Low Voltage (CHRG, HVPR)

Input High Voltage

I

= 5mA

0.1

0.4

0.3

V

OL

SINK

HVEN, SUSP, HPWR Pin Low to High

HVEN, SUSP, HPWR Pin High to Low

SUSP, HPWR

2.3

IH

Input Low Voltage

V

IL

I

Logic Input Pull Down Current

HVEN Pin Bias Current

2

μA

PULLDN

HVEN

V

= 2.3V

= 0V

6

0.01

20

0.1

μA

HVEN

l

V

Charger Shutdown Threshold

Voltage on TIMER

0.14

5

0.4

V

CHG,SD

I

Charger Shutdown Pull-Up Current

on TIMER

V

TIMER

= 0V

14

μA

NTC

l

I

VNTC Pin Current

V

= 2.5V

1.4

4.4

2.5

4.85

0

3.5

1

mA

V

VNTC

V

VNTC Bias Voltage

I

= 500μA

VNTC

I

NTC Input Leakage Current

V

NTC

= 1V

μA

NTC

V

COLD

V

HOT

V

DIS

Cold Temperature Fault Threshold

Voltage

Rising Threshold

Hysteresis

0.74•V_VNTC

0.02•V_VNTC

V

Hot Temperature Fault Threshold

Voltage

Falling Threshold

Hysteresis

0.29•V_VNTC

0.01•V_VNTC

V

l

NTC Disable Voltage

NTC Input Voltage to GND (Falling)

Hysteresis

75

100

35

125

mV

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 5: The LTC4089/LTC4089-5 are guaranteed to meet speciﬁed

performance from 0°C to 85°C and are designed, characterized and

expected to meet these extended temperature limits, but are not tested

at –40°C and 85°C.

Note 2: V is the greater of V , V

or V

BAT

Note 6: Guaranteed by long term current density limitations.

CC

IN OUT

Note 3: All voltage values are with respect to GND.

Note 7: Total input current is equal to this speciﬁcation plus 1.002 • I

BAT

where I is the charge current.

BAT

Note 4: This IC includes over-temperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperatures will exceed 110°C when over-temperature protection is

active. Continuous operation above the speciﬁed maximum operating

junction temperature may result in device degradation or failure.

Note 8: Accuracy of programmed current may degrade for currents greater

than 1.5A.

Note 9: Current limit guaranteed by design and/or correlation to static test.

Slope compensation reduces current limit at high duty cycle.

40895fc

4

LTC4089/LTC4089-5

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise speciﬁed.

Battery Regulation (Float)

Voltage vs Temperature

Battery Current and Voltage vs

Time (LTC4089)

V_FLOATLoad Regulation

4.30

4.25

4.220

4.215

4.210

4.205

5

4

3

2

1

0

1500

1200

900

600

300

0

R

= 34k

V

BAT

= 5V

PROG

IN

I

= 2mA

V

BAT

OUT

CHRGB

BAT

4.20

4.15

I

4.200

4.195

C/10

4.10

4.05

4.00

4.190

4.185

4.180

1250mAh

CELL

TERMINATION

150

HVIN = 12V

R

= 50k

PROG

0

200

400

I

600

(mA)

800

1000

–25

0

50

–50

75

100

50

100

25

0

200

TEMPERATURE (°C)

TIME (MIN)

BAT

40895 G01

40895 G03

40895 G02

Ideal Diode Current vs Forward

Voltage and Temperature (No

External Device)

Charge Current vs Temperature

(Thermal Regulation)

Charging from USB, I_BATvs V_BAT

600

500

400

300

1000

900

800

700

600

500

400

300

200

100

0

600

500

V

R

= 5V

V

= 3.7V

IN

OUT

BAT

IN

= NO LOAD

= 100k

= 0V

HPWR = 5V

PROG

= 2k

CLPROG

400

300

200

100

0

–50°C

0°C

50°C

100°C

HPWR = 0V

V

Q

= 5V

IN

100

0

= 3.5V

BAT

= 50°C/W

JA

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

0

50

100

(mV)

150

200

0

0.5

1

1.5

2

2.5

(V)

3

3.5

4

4.5

V

FWD

BAT

40895 G05

40895 G06

40895 G04

Ideal Diode Current vs Forward

Voltage and Temperature with

External Device

LTC4089-5 High Voltage

Regulator Efﬁciency vs Output

Load

LTC4089 High Voltage Regulator

Efﬁciency vs Output Load

5000

4500

4000

3500

3000

2500

2000

1500

1000

500

100

95

90

85

80

75

70

65

60

55

50

100

95

90

85

80

75

70

65

60

55

50

HVIN = 8V

V

= 3.7V

BAT

IN

HVIN = 12V

= 0V

Si2333 PFET

HVIN = 24V

HVIN = 36V

HVIN = 24V

HVIN = 36V

–50°C

0°C

50°C

100°C

FIGURE 10 SCHEMATIC

= 4.21V (I = 0)

V

BAT

= 4.21V (I

= 0)

V

BAT

0

20

40

60

80

100

0

0.2

0.4

I

0.6

(A)

0.8

1.0

0

0.2

0.4

I

0.6

(A)

0.8

1.0

V

(mV)

FWD

OUT

4085 G17

40895 G08

40895 G09

40895fc

5

LTC4089/LTC4089-5

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise speciﬁed.

High Voltage Regulator

Maximum Load Current, L = 33μH

Maximum Load Current, L = 10μH

Switch Voltage Drop

1.6

1.5

1.4

1.3

1.2

1.1

1.0

0.9

1.8

1.6

1.5

1.4

1.3

1.2

1.1

1.0

0.9

550

500

450

400

350

300

250

200

150

100

50

TYPICAL

T

= 85°C

A

T

= 25°C

A

T

A

= –40°C

MINIMUM

0

25

35

25

35

5

10

15

20

(V)

30

5

10

15

20

(V)

30

0

0.4 0.6 0.8 1.0 1.2

SWITCH CURRENT (A)

1.8

1.4 1.6

0.2

V

IN

40895 G10

40895 G11

40895 G12

High Voltage Regulator

Switch Frequency

High Voltage Regulator

Frequency Foldback

High Voltage Regulator

Soft-Start

800

780

760

740

720

700

680

660

640

620

600

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

800

700

600

500

400

300

200

100

0

–50 –25

0

25 50 75 100 125 150

1

2

0

3

4

5

0

0.25 0.50 0.75

1

1.25 1.50 1.75

2

TEMPERATURE (°C)

SHDN PIN VOLTAGE (V)

HVOUT (V)

40895 G13

40895 G15

40895 G14

High Voltage Regulator

Typical Minimum Input Voltage

High Voltage Switch Current Limit

2.0

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

7.0

6.8

6.6

6.4

TO START

6.2

6.0

5.8

5.6

5.4

5.2

5.0

TO RUN

T

= –40°C

= –5°C

= 25°C

= 90°C

A

0

10 20 30 40 50 60 70 80 90 100

1

10

100

1000

DUTY CYCLE (%)

LOAD CURRENT (mA)

40895 G16

40895 G17

40895fc

6

LTC4089/LTC4089-5

TYPICAL PERFORMANCE CHARACTERISTICS

T_A= 25°C, unless otherwise speciﬁed.

Input Disconnect Waveforms

Response to HPWR

Input Connect Waveforms

HPWR

5V/DIV

V

IN

5V/DIV

V

5V/DIV

V

I

IN

OUT

5V/DIV

OUT

5V/DIV

0.5A/DIV

I

IN

I

BAT

0.5A/DIV

I

BAT

0.5A/DIV

BAT

0.5A/DIV

40895 G18

40895 G19

40895 G20

1ms/DIV

100μs/DIV

1ms/DIV

V

I

= 3.85V

= 100mA

V

I

= 3.85V

= 50mA

V

I

= 3.85V

= 100mA

BAT

OUT

BAT

OUT

BAT

OUT

Wall Disconnect Waveforms

Response to Suspend

Wall Connect Waveforms

WALL

5V/DIV

SUSP

5V/DIV

WALL

5V/DIV

V

OUT

V

OUT

5V/DIV

I

WALL

0.5A/DIV

I

IN

WALL

I

BAT

0.5A/DIV

I

BAT

0.5A/DIV

I

BAT

0.5A/DIV

40895 G22

40895 G23

40895 G21

1ms/DIV

100μs/DIV

1ms/DIV

V

I

= 3.85V

= 100mA

= 100k

V

I

= 3.85V

= 50mA

V

I

= 3.85V

= 100mA

= 100k

BAT

OUT

BAT

OUT

R

PROG

High Voltage Regulator Load

Transient

High Voltage Regulator Load

Transient

H

VOUT

50mV/DIV

VOUT

50mV/DIV

I

L

OUT

0.5A/DIV

40895 G24

40895 G25

20μS/DIV

40895fc

7

LTC4089/LTC4089-5

PIN FUNCTIONS

GND(Pins1, 2):Ground. TietheGNDpintoalocalground

plane below the LTC4089 and the circuit components.

battery. This feature is disabled if no power is present on

HVIN, IN or BAT (i.e., below UVLO thresholds).

HVOUT (Pins 3, 18): Voltage Output of the High Voltage

Regulator. When sufﬁcient voltage is present at HVOUT,

the low voltage power path from IN to OUT will be discon-

nected and the HVPR pin will be pulled low to indicate

that a high voltage wall adapter has been detected. The

LTC4089 high voltage regulator will maintain just enough

differential voltage between HVOUT and BAT to keep the

battery charger MOSFET out of dropout (typically 300mV

from OUT to BAT). The LTC4089-5 high voltage regula-

tor will provide a ﬁxed 5V output to the battery charger

MOSFET. HVOUT should be bypassed with at least 10μF

to GND. Connect pins 3 and 18 with a resistance no

greater than 1 .

CHRG (Pin 8): Open-Drain Charge Status Output. When

the battery is being charged, the CHRG pin is pulled low by

aninternalN-channelMOSFET. Whenthetimerrunsoutor

the charge current drops below 10% of the programmed

charge current or the input supply is removed, the CHRG

pin is forced to a high impedance state.

PROG (Pin 9): Charge Current Program. Connecting a

resistor, R

, to ground programs the battery charge

PROG

current. The battery charge current is programmed

as follows:

50,000V

I_CHG(A) =

R_PROG

V (Pin 4): Leave the V pin ﬂoating or bypass to ground

C

GATE (Pin 10): External ideal diode gate pin. This pin can

be used to drive the gate of an optional external PFET con-

nected between BAT (drain) and OUT (source). By doing

so, the impedance of the ideal diode between BAT and

OUT can be reduced. When not in use, this pin should be

left ﬂoating. It is important to maintain a high impedance

on this pin and minimize all leakage paths.

witha10pFcapacitor.Thisoptional10pFcapacitorreduces

HVOUT ripple in discontinuous mode.

NTC (Pin 5): Input to the NTC Thermistor Monitoring

Circuits. Under normal operation, tie a thermistor from

the NTC pin to ground and a resistor of equal value from

NTC to VNTC. When the voltage on this pin is above 0.74

• V

(Cold, 0°C) or below 0.29 • V

(Hot, 50°C)

VNTC

BAT (Pin 11): Connect to a single cell Li-Ion battery. This

pin is used as an output when charging the battery and as

an input when supplying power to OUT. When the OUT pin

potential drops below the BAT pin potential, an ideal diode

the timer is suspended but not cleared, the charging is

disabled and the CHRG pin remains in its former state.

When the voltage on NTC comes back between 0.74 •

V

and 0.29 • V

, the timer continues where it

VNTC

function connects BAT to OUT and prevents V

from

OUT

left off and charging is re-enabled if the battery voltage

is below the recharge threshold. There is approximately

3°C of temperature hysteresis associated with each of the

input comparators.

droppingmorethan100mVbelowV .Aprecisioninternal

BAT

resistor divider sets the ﬁnal ﬂoat (charging) potential on

thispin. Theinternalresistordividerisdisconnectedwhen

IN and HVIN are in undervoltage lockout.

Connect the NTC pin to ground to disable this feature. This

will disable all of the LTC4089 NTC functions.

IN (Pin 12): Input Supply. Connect to USB supply, V

.

BUS

Input current to this pin is limited to either 20% or 100%

of the current programmed by the CLPROG pin as de-

termined by the state of the HPWR pin. Charge current

(to the BAT pin) supplied through the input is set to the

current programmed by the PROG pin but will be limited

by the input current limit if charge current is set greater

than the input current limit.

VNTC(Pin6):OutputBiasVoltageforNTC.Aresistorfrom

this pin to the NTC pin will bias the NTC thermistor.

HVPR (Pin 7): High Voltage Present Output. Active low

open drain output pin. A low on this pin indicates that the

high voltage regulator has sufﬁcient voltage to charge the

40895fc

8

LTC4089/LTC4089-5

PIN FUNCTIONS

OUT (Pin 13): Voltage Output. This pin is used to provide

timer will not be reset when the part is put in suspend.

A 2μA pull-down current is internally applied to this pin

to ensure it is low at power-up when the pin is not being

driven externally.

controlled power to a USB device from either USB V

BUS

(IN), anexternalhighvoltagesupply(HVIN), orthebattery

(BAT) when no other supply is present. The high voltage

supply is prioritized over the USB V

be bypassed with at least 4.7μF to GND.

input. OUT should

BUS

TIMER (Pin 17): Timer Capacitor. Placing a capacitor,

C

, to GND sets the timer period. The timer period is:

TIMER

CLPROG (Pin 14): Current Limit Program and Input Cur-

rent Monitor. Connecting a resistor, R

programs the input to output current limit. The current

limit is programmed as follows:

C_TIMER•R_PROG• 3hours

, to ground

CLPROG

t_TIMER(hours) =

0.1μF • 100k

Charge time is increased if charge current is reduced

due to undervoltage current limit, load current, thermal

regulation and current limit selection (HPWR).

1000V

I_CL(A) =

R_CLPROG

In USB applications, the resistor R

should be set

Shorting the TIMER pin to GND disables the battery

charging functions.

CLPROG

to no less than 2.1k. The voltage on the CLPROG pin is

always proportional to the current ﬂowing through the

IN to OUT power path. This current can be calculated

as follows:

SW (Pin 19): The SW pin is the output of the internal high

voltage power switch. Connect this pin to the inductor,

catch diode and boost capacitor.

V_CLPROG

R_CLPROG

I_IN(A) =

•1000

BOOST (Pin 20): The BOOST pin is used to provide a

drive voltage, higher than the input voltage, to the internal

bipolar NPN power switch.

HPWR(Pin15):HighPowerSelect.Thislogicinputisused

to control the input current limit. A voltage greater than

2.3V on the pin will set the input current limit to 100% of

the current programmed by the CLPROG pin. A voltage

less than 0.3V on the pin will set the input current limit to

20% of the current programmed by the CLPROG pin. A

2μA pull-down current is internally connected to this pin

to ensure it is low at power up when the pin is not being

driven externally.

HVIN (Pin 21): The HVIN pin supplies current to the inter-

nal high voltage regulator and to the internal high voltage

power switch. The presence of a high voltage input takes

priority over the USB V

input (i.e., when a high volt-

BUS

age input supply is detected, the USB IN to OUT path is

disconnected). This pin must be locally bypassed.

HVEN (Pin 22): The HVEN pin is used to disable the high

voltageinputpath.Tietogroundtodisablethehighvoltage

input or tie to at least 2.3V to enable the high voltage path.

If this feature is not used, tie to the HVIN pin. This pin can

also be used to soft-start the high voltage regulator; see

the Applications Information section.

SUSP (Pin 16): Suspend Mode Input. Pulling this pin

above 2.3V will disable the power path from IN to OUT.

The supply current from IN will be reduced to comply

with the USB speciﬁcation for suspend mode. Both the

ability to charge the battery from HVIN and the ideal diode

function (from BAT to OUT) will remain active. Suspend

Exposed Pad (Pin 23): Ground. The exposed package

pad is ground and must be soldered to the PC board for

proper functionality and for maximum heat transfer (use

several vias directly under the LTC4089).

mode will reset the charge timer if V

is less than V

OUT

BAT

while in suspend mode. If V

is kept greater than V

,

OUT

BAT

such as when the high voltage input is present, the charge

40895fc

9

LTC4089/LTC4089-5

BLOCK DIAGRAM

D2

BOOST

C3

L1

SW

HVIN

10

Q1

+

–

D1

R

S

Q

V

3.6V

5V

PART NUMBER

LTC4089

LTC4089-5

SET

DRIVER

OSCILLATOR

HVOUT

–

V

C

10

GM

V

+

C1

–

+

SET

10pF

1.8V

+

–

+

–

ENABLE

350mV

(LTC4089)

75mV (RISING)

25mV (FALLING)

R3

C4

HVEN

10

+

–

4.25V (RISING)

3.15V (FALLING)

HVPR

19

IN

CURRENT LIMIT

I

CNTL

IN

LIM

SOFT-START

1V

+

–

I

IN

OUT

GATE

BAT

I

LIM

1000

ENABLE

21

CURRENT CONTROL

DIE

CL

–

CLPROG

+

22

13

25mV

–

+

CC/CV REGULATOR

CHARGER

2k

25mV

+

–

TEMP 105°C

ENABLE

500mA/100mA

EDA

HPWR

IDEAL

DIODE

+

–

IN OUT BAT

2μA

TA

BAT

+

I

CHG

CHARGE CONTROL

0.25V

–

SOFT-START2

+

–

1V

CHG

+

–

2.8V

BATTERY

UVLO

PROG

23

15

14

100k

VOLTAGE DETECT

UVLO

+

–

4.1V

RECHARGE

V

NTC

BAT UV

–

+

10k

TOO COLD

TOO HOT

RECHRG

NTCERR

TIMER

21

18

OSCILLATOR

NTC

CONTROL LOGIC

HOLD

NTC

CLK

CHRG

100k

–

+

STOP

RESET

COUNTER

EOC

C/10

+

–

NTC ENABLE

2μA

0.1V

GND

16

SUSP

11

4089 TA01

40895fc

10

LTC4089/LTC4089-5

OPERATION

(Refer to Block Diagram)

The LTC4089/LTC4089-5 is a complete PowerPath™

controller for battery powered USB applications. The

LTC4089/LTC4089-5 is designed to receive power from a

low voltage source (e.g., USB or 5V wall adapter), a high

voltage source (e.g., Firewire/IEEE1394, automotive bat-

tery,12Vwalladapter,etc.),andasingle-cellLi-Ionbattery.

Itcanthendeliverpowertoanapplicationconnectedtothe

OUT pin and a battery connected to the BAT pin (assuming

that an external supply other than the battery is pres-

ent). Power supplies that have limited current resources

forward biased. The forward biased ideal diode will then

provide the output power to the load from the battery.

The LTC4089/LTC4089-5 also includes a high voltage

switching regulator which has the ability to receive power

fromahighvoltageinput. Thisinputtakespriorityoverthe

USB V

input (i.e., if both HVIN and IN are present, load

BUS

current and charge current will be delivered via the high

voltage path). When enabled, the high voltage regulator

regulates the HVOUT voltage using a 750kHz constant

frequency, current mode regulator. An external PFET be-

tween HVOUT (drain) and OUT (source) is turned on via

the HVPR pin allowing OUT to charge the battery and/or

supply power to the application. The LTC4089 maintains

approximately 300mV between the OUT pin and the BAT

pin, while the LTC4089-5 provides a ﬁxed 5V output.

(such as USB V

supplies) should be connected to the

BUS

IN pin which has a programmable current limit. Battery

charge current will be adjusted to ensure that the sum of

the charge current and load current does not exceed the

programmed input current limit (see Figure 1).

An ideal diode function provides power from the battery

whenoutput/loadcurrentexceedstheinputcurrentlimitor

when input power is removed. Powering the load through

the ideal diode instead of connecting the load directly to

the battery allows a fully charged battery to remain fully

charged until external power is removed. Once external

power is removed the output drops until the ideal diode is

Input Current Limit

Whenever the input power path is enabled (i.e., SUSP =

0V and HVIN = 0V) and power is available at IN, power

is delivered to OUT. The current limit and charger control

circuits of the LTC4089/LTC4089-5 are designed to limit

PowerPath is a trademark of Linear Technology Corporation.

HVIN

SW

L1

Q1

D1

HIGH VOLTAGE

BUCK REGULATOR

HVOUT

C1

+

4.25V (RISING)

–

3.15V (FALLING)

HVPR

19

+

–

LOAD

75mV (RISING)

+

25mV (FALLING)

–

ENABLE

IN

OUT

21

USB CURRENT LIMIT

–

+

25mV

–

+

25mV

+

–

GATE

BAT

CC/CV REGULATOR

CHARGER

EDA

IDEAL

DIODE

BAT

21

+

4089 F01

LI-ION

Figure 1. Simpliﬁed PowerPath Block Diagram

40895fc

11

LTC4089/LTC4089-5

OPERATION

input current as well as control battery charge current

for USB applications (selectable using the HPWR pin and

programmed using the CLPROG pin).

as a function of I . The input current limit, I , can be

OUT

CL

programmed using the following formula:

The LTC4089/LTC4089-5 reduces battery charge current

such that the sum of the battery charge current and the

loadcurrentdoesnotexceedtheprogrammedinputcurrent

limit(one-ﬁfthoftheprogrammedinputcurrentlimitwhen

HPWR is low, see Figure 2). The battery charge current

goes to zero when load current exceeds the programmed

input current limit (one-ﬁfth of the limit when HPWR is

low). Even if the battery charge current is set to exceed

the allowable USB current, the USB speciﬁcation will not

be violated. The battery charger will reduce its current as

neededtoensurethattheUSBspeciﬁcationisnotexceeded.

If the load current is greater than the current limit, the

output voltage will drop to just under the battery voltage

where the ideal diode circuit will take over and the excess

load current will be drawn from the battery.

⎡

⎢

⎤

1000

1000V

R_CLPROG

I_CL

=

• V_CLPROG

=

⎥

⎦

R

⎣ CLPROG

where V

and R

is the CLPROG pin voltage (typically 1V)

is the total resistance from the CLPROG pin

CLPROG

to ground. For best stability over temperature and time,

1% metal ﬁlm resistors are recommended.

The programmed battery charge current, I

deﬁned as:

, is

CHG

⎡

⎤

50,000

R_PROG

50,000V

R_PROG

I_CHG

=

• V_PROG

=

⎢

⎣

⎥

⎦

Input current, I , is equal to the sum of the BAT pin

output current and the OUT pin output current. V

will typically servo to 1V, however, if I

CLPROG

following equation:

IN

In USB applications, the minimum value for R

CLPROG

< I

BAT CL

should be 2.1k. This will prevent the input current from

exceeding 500mA due to LTC4089/LTC4089-5 tolerances

andquiescentcurrents. A2.1kCLPROGresistorwillgivea

typical current limit of 476mA in high power mode (HPWR

= 1) or 95mA in low power mode (HPWR = 0).

+ I

OUT

then V

will track the input current according to the

V_CLPROG

R_CLPROG

I_IN= I_OUT+I_BAT

=

• 1000

When SUSP is driven to a logic high, the input power

path is disabled and the ideal diode from BAT to OUT will

supply power to the application.

The current limiting circuitry in the LTC4089/LTC4089-5

can and should be conﬁgured to limit current to 500mA

I

IN

500

400

300

200

100

0

100

80

60

40

20

0

500

400

300

200

100

0

I

IN

I

LOAD

I

LOAD

I

= I

BAT CHG

I

= I = I

BAT CL OUT

I

BAT

(CHARGING)

BAT

(CHARGING)

BAT

(CHARGING)

100

200

0

20

40

60

80

100

I

0

300

400

500

I

100

200

0

300

400

500

I

BAT

I

LOAD(mA)

I

LOAD(mA)

LOAD (mA)

(IDEAL DIODE)

4089 F02b

(IDEAL DIODE)

4089 F02a

4089 F02c

(IDEAL DIODE)

(a) High Power Mode/Full Charge

R_PROG= 100k and R_CLPROG= 2k

(b) Low Power Mode/Full Charge

R_PROG= 100k and R_CLPROG= 2k

(c) High Power Mode with

I_CL= 500mA and I_CHG= 250mA

R_PROG= 200k and R_CLPROG= 2k

Figure 2. Input and Battery Currents as a Function of Load Current

40895fc

12

LTC4089/LTC4089-5

OPERATION

High Voltage Step Down Regulator

Ideal Diode from BAT to OUT

The power delivered from HVIN to HVOUT is controlled

by a 750kHz constant frequency, current mode step down

regulator. An external P-channel MOSFET directs this

power to OUT and prevents reverse conduction from OUT

to HVOUT (and ultimately HVIN).

The LTC4089/LTC4089-5 has an internal ideal diode as

well as a controller for an optional external ideal diode. If

a battery is the only power supply available, or if the load

current exceeds the programmed input current limit, then

the battery will automatically deliver power to the load via

an ideal diode circuit between the BAT and OUT pins. The

ideal diode circuit (along with the recommended 4.7μF

capacitor on the OUT pin) allows the LTC4089/LTC4089-5

to handle large transient loads and wall adapter or USB

A 750kHz oscillator enables an RS ﬂip-ﬂop, turning on the

internal1.95ApowerswitchQ1.Anampliﬁerandcompara-

tor monitor the current ﬂowing between the HVIN and SW

pins, turning the switch off when this current reaches a

V

connect/disconnect scenarios without the need for

BUS

level determined by the voltage at V . An error ampliﬁer

C

large bulk capacitors. The ideal diode responds within

a few microseconds and prevents the OUT pin voltage

from dropping signiﬁcantly below the BAT pin voltage.

A comparison of the I-V curve of the ideal diode and a

Schottky diode can be seen in Figure 3.

servos the V node to maintain approximately 300mV

C

between OUT and BAT (LTC4089). By keeping the voltage

across the battery charger low, efﬁciency is optimized

because power lost to the battery charger is minimized

and power available to the external load is maximized. If

the BAT pin voltage is less than approximately 3.3V, then

If the input current increases beyond the programmed

inputcurrentlimitadditionalcurrentwillbedrawnfromthe

battery via the internal ideal diode. Furthermore, if power

the error ampliﬁer will servo the V node to provide a

C

constant HVOUT output voltage of about 3.6V. An active

clamp on the V node provides current limit. The V node

to IN (USB V ) or HVIN (high voltage input) is removed,

C

BUS

is also clamped to the voltage on the HVEN pin; soft-start

is implemented by a voltage ramp at the HVEN pin using

an external resistor and capacitor.

then all of the application power will be provided by the

battery via the ideal diode. A 4.7μF capacitor at OUT is

sufﬁcient to keep a transition from input power to battery

power from causing signiﬁcant output voltage droop. The

ideal diode consists of a precision ampliﬁer that enables a

large P-channel MOSFET transistor whenever the voltage

Aninternalregulatorprovidespowertothecontrolcircuitry.

Thisregulatorincludesanundervoltagelockouttoprevent

switching when HVIN is less than about 4.7V. The HVEN

pin is used to disable the high voltage regulator. HVIN

input current is reduced to less than 2μA and the external

P-channel MOSFET disconnects HVOUT from OUT when

the high voltage regulator is disabled.

at OUT is approximately 20mV (V ) below the voltage

FWD

at BAT. The resistance of the internal ideal diode is ap-

proximately 200m . If this is sufﬁcient for the application

CONSTANT

LTC4089

The switch driver operates from either the high voltage

input or from the BOOST pin. An external capacitor and

diode are used to generate a voltage at the BOOST pin that

is higher than the input supply. This allows the driver to

fully saturate the internal bipolar NPN power switch for

efﬁcient operation.

I

0N

I

MAX

CONSTANT

0N

SLOPE: 1/R

DIO(ON)

R

I

FWD

SCHOTTKY

DIODE

When HVOUT is below 3.95V the operating frequency

is reduced. This frequency foldback helps to control the

regulator output current during start-up and overload.

CONSTANT

0N

SLOPE: 1/R

FWD

V

0

FORWARD VOLTAGE (V)

V

FWD

4089 F03

Figure 3. LTC4089/LTC4089-5 Versus

Schottky Diode Forward Voltage Drop

40895fc

13

LTC4089/LTC4089-5

OPERATION

then no external components are necessary. However,

if more conductance is needed, an external P-channel

MOSFET can be added from BAT to OUT. The GATE pin of

the LTC4089/LTC4089-5 drives the gate of the PFET for

automatic ideal diode control. The source of the external

MOSFETshouldbeconnectedtoOUTandthedrainshould

be connected to BAT. In order to help protect the external

MOSFET in over-current situations, it should be placed in

close thermal contact to the LTC4089/LTC4089-5.

constant-current mode once the voltage on the BAT pin

rises above 2.8V. In constant current mode, the charge

current is set by R

. When the battery approaches the

PROG

ﬁnal ﬂoat voltage, the charge current begins to decrease

as the LTC4089/LTC4089-5 switches to constant-voltage

mode. When the charge current drops below 10% of the

programmed charge current while in constant-voltage

mode the CHRG pin assumes a high impedance state.

An external capacitor on the TIMER pin sets the total

minimum charge time. When this time elapses the

charge cycle terminates and the CHRG pin assumes a

high impedance state, if it has not already done so. While

charging in constant current mode, if the charge current

is decreased by thermal regulation or in order to maintain

the programmed input current limit the charge time is

automaticallyincreased.Inotherwords,thechargetimeis

extendedinverselyproportionaltotheactualchargecurrent

deliveredtothebattery.ForLi-Ionandsimilarbatteriesthat

require accurate ﬁnal ﬂoat potential, the internal bandgap

reference,voltageampliﬁerandtheresistordividerprovide

regulation with 0.8% accuracy.

Battery Charger

The battery charger circuits of the LTC4089/LTC4089-5

are designed for charging single cell lithium-ion batter-

ies. Featuring an internal P-channel power MOSFET, the

charger uses a constant-current/constant-voltage charge

algorithm with programmable current and a program-

mabletimerforchargetermination. Chargecurrentcanbe

programmed up to 1.2A. The ﬁnal ﬂoat voltage accuracy

is 0.8% typical. No blocking diode or sense resistor is

required when powering either the IN or the HVIN pins.

The CHRG open-drain status output provides information

regarding the charging status of the LTC4089/LTC4089-5

at all times. An NTC input provides the option of charge

qualiﬁcation using battery temperature.

Trickle Charge and Defective Battery Detection

At the beginning of a charge cycle, if the battery volt-

age is low (below 2.8V) the charger goes into trickle

charge reducing the charge current to 10% of the full-

scale current. If the low battery voltage persists for one

quarter of the total charge time, the battery is assumed

to be defective, the charge cycle is terminated and the

CHRG pin output assumes a high impedance state. If

for any reason the battery voltage rises above ~2.8V the

charge cycle will be restarted. To restart the charge cycle

(i.e., when the dead battery is replaced with a discharged

battery), simply remove the input voltage and reapply it

or cycle the TIMER pin to 0V.

An internal thermal limit reduces the programmed charge

current if the die temperature attempts to rise above a

presetvalueofapproximately105°C. Thisfeatureprotects

the LTC4089/LTC4089-5 from excessive temperature, and

allows the user to push the limits of the power handling

capability of a given circuit board without risk of dam-

aging the LTC4089/LTC4089-5. Another beneﬁt of the

LTC4089/LTC4089-5 thermal limit is that charge current

can be set according to typical, not worst-case, ambient

temperatures for a given application with the assurance

that the charger will automatically reduce the current in

worst-case conditions.

Programming Charge Current

The formula for the battery charge current is:

V_PROG

The charge cycle begins when the voltage at the OUT

pin rises above the battery voltage and the battery volt-

age is below the recharge threshold. No charge current

actually ﬂows until the OUT voltage is 100mV above

the BAT voltage. At the beginning of the charge cycle, if

the battery voltage is below 2.8V, the charger goes into

trickle charge mode to bring the cell voltage up to a safe

level for charging. The charger goes into the fast charge

I_CHG= I_PROG• 50,000 =

• 50,000

R_PROG

whereV

isthePROGpinvoltageandR

isthetotal

PROG

resistancefromthePROGpintoground.Keepinmindthat

40895fc

14

LTC4089/LTC4089-5

OPERATION

when the LTC4089/LTC4089-5 is powered from the IN pin,

the programmed input current limit takes precedent over

the charge current. In such a scenario, the charge current

cannot exceed the programmed input current limit.

corresponds to a three hour charge cycle. However, if the

HPWR input is set to a logic low, then the input current

limit will be reduced from 500mA to 100mA. With no ad-

ditional system load, this means the charge current will

be reduced to 100mA. Therefore, the termination timer

will automatically slow down by a factor of ﬁve until the

For example, if typical 500mA charge current is required,

calculate:

charger reaches constant voltage mode (i.e. V = 4.2V)

BAT

1V

500mA

or HPWR is returned to a logic high. The charge cycle is

automaticallylengthenedtoaccountforthereducedcharge

current. The exact time of the charge cycle will depend on

how long the charger remains in constant-current mode

and/or how long the HPWR pin remains a logic low.

R_PROG

=

• 50,000 = 100k

For best stability over temperature and time, 1% metal ﬁlm

resistorsarerecommended.Undertricklechargeconditions,

this current is reduced to 10% of the full-scale value.

Once a time-out occurs and the voltage on the battery is

greater than the recharge threshold, the charge current

stops, and the CHRG output assumes a high impedance

state if it has not already done so.

The Charge Timer

The programmable charge timer is used to terminate the

charge cycle. The timer duration is programmed by an

external capacitor at the TIMER pin. The charge time is

typically:

Connecting the TIMER pin to ground disables the battery

charger.

C_TIMER•R_PROG• 3hours

t_TIMER(hours) =

CHRG Status Output Pin

0.1μF • 100k

When the charge cycle starts, the CHRG pin is pulled to

ground by an internal N-channel MOSFET capable of driv-

ing an LED. When the charge current drops below 10%

of the programmed full charge current while in constant

voltage mode, the pin assumes a high impedance state,

but charge current continues to ﬂow until the charge

time elapses. If this state is not reached before the end

of the programmable charge time, the pin will assume a

high impedance state when a time-out occurs. The CHRG

current detection threshold can be calculated by the fol-

lowing equation:

The timer starts when an input voltage greater than the

undervoltage lockout threshold level is applied or when

leavingshutdownandthevoltageonthebatteryislessthan

the recharge threshold. At power-up or exiting shutdown

with the battery voltage less than the recharge threshold

the charge time is a full cycle. If the battery is greater than

therechargethresholdthetimerwillnotstartandcharging

is prevented. If after power-up the battery voltage drops

below the recharge threshold, or if after a charge cycle

the battery voltage is still below the recharge threshold,

the charge time is set to one-half of a full cycle.

0.1V

R_PROG

5000V

R_PROG

I_DETECT

=

•50,000 =

TheLTC4089/LTC4089-5hasafeaturethatextendscharge

time automatically. Charge time is extended if the charge

current in constant current mode is reduced due to load

current or thermal regulation. This change in charge time

is inversely proportional to the change in charge current.

As the LTC4089/LTC4089-5 approaches constant voltage

mode the charge current begins to drop. This change in

charge current is due to normal charging operation and

does not affect the timer duration.

For example, if the full charge current is programmed

to 500mA with a 100k PROG resistor the CHRG pin will

change state at a battery charge current of 50mA.

Note: The end-of-charge (EOC) comparator that moni-

tors the charge current latches its decision. Therefore,

the ﬁrst time the charge current drops below 10% of the

programmed full charge current while in constant volt-

age mode, it will toggle CHRG to a high impedance state.

Consider, for example, a USB charge condition where

R

= 2k, R

= 100k and C

= 0.1μF. This

CLPROG

PROG

TIMER

40895fc

15

LTC4089/LTC4089-5

OPERATION

If, for some reason the charge current rises back above

the threshold, the CHRG pin will not resume the strong

pull-down state. The EOC latch can be reset by a recharge

UVLO comparator is tripped, the current limit circuits will

not come out of shutdown until V

falls 50mV below

OUT

the V voltage.

IN

cycle (i.e., V

drops below the recharge threshold) or

BAT

Charger Undervoltage Lockout

toggling the input power to the part.

AninternalundervoltagelockoutcircuitmonitorstheV

OUT

NTC Thermistor—Battery Temperature Charge

Qualiﬁcation

voltage and disables the battery charger circuits until

rises above the undervoltage lockout threshold. The

V

OUT

The battery temperature is measured by placing a nega-

tive temperature coefﬁcient (NTC) thermistor close to the

battery pack. The NTC circuitry is shown in Figure 4.

battery charger UVLO circuit has a built-in hysteresis of

125mV. Furthermore, to protect against reverse current

in the power MOSFET, the charger UVLO circuit keeps the

charger shut down if V

exceeds V . If the charger

BAT

OUT

To use this feature, connect the NTC thermistor (R

)

NTC

UVLO comparator is tripped, the charger circuits will

between the NTC pin and ground and a resistor (R

NOM

not come out of shutdown until V

by 50mV.

exceeds V

OUT

BAT

from the NTC pin to VNTC. R

should be a 1% resis-

NOM

tor with a value equal to the value of the chosen NTC

thermistor at 25°C (this value is 10k for a Vishay NTH-

S0603N02N1002J thermistor). The LTC4089/LTC4089-5

Suspend

The LTC4089/LTC4089-5 can be put in suspend mode by

forcing the SUSP pin greater than 2.3V. In suspend mode,

the ideal diode function from BAT to OUT is kept alive. If

power is applied to the HVIN pin, then charging will be

unaffected. Current drawn from the IN pin is reduced to

50μA. Suspend mode is intended to comply with the USB

power speciﬁcation mode of the same name.

goes into hold mode when the resistance (R ) of the

HOT

NTC thermistor drops to 0.41 times the value of R

,

NOM

or approximately 4.1k, which should be at 50°C. The hold

modefreezesthetimerandstopsthechargecycleuntilthe

thermistor indicates a return to a valid temperature. As the

temperature drops, the resistance of the NTC thermistor

rises. The LTC4089/LTC4089-5 is designed to go into hold

mode when the value of the NTC thermistor increases to

VNTC

6

LTC4089

2.82 times the value of R

. This resistance is R

.

NOM

COLD

For a Vishay NTHS0603N02N1002J thermistor, this value

is 28.2k which corresponds to approximately 0°C. The

hot and cold comparators each have approximately 3°C

of hysteresis to prevent oscillation about the trip point.

Grounding the NTC pin will disable the NTC function.

0.74 • VNTC

R

NOM

–

+

10k

TOO_COLD

NTC

5

R

NTC

10k

Current Limit Undervoltage Lockout

–

+

TOO_HOT

An internal undervoltage lockout circuit monitors the

input voltage and disables the input current limit circuits

0.29 • VNTC

until V rises above the undervoltage lockout threshold.

IN

The current limit UVLO circuit has a built-in hysteresis of

125mV. Furthermore, to protect against reverse current in

the power MOSFET, the current limit UVLO circuit disables

the current limit (i.e., forces the input power path to a high

+

–

NTC_ENABLE

0.1V

4089 F04

impedance state) if V

exceeds V . If the current limit

OUT

IN

Figure 4. NTC Circuit

40895fc

16

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

USB and 5V Wall Adapter Power

expected application load current. For robust operation in

faultconditions,thesaturationcurrentshouldbe~2.3A.To

keep efﬁciency high, the series resistance (DCR) should

be less than 0.1 . Table 1 lists several vendors and types

that are suitable.

Although the LTC4089/LTC4089-5 is designed to draw

power from a USB port, a higher power 5V wall adapter

can also be used to power the application and charge the

battery (higher voltage wall adapters can be connected

directlytoHVIN).Figure5showsanexampleofcombining

a 5V wall adapter and a USB power input. With its gate

grounded by 1k, P-channel MOSFET MP1 provides USB

power to the LTC4089/LTC4089-5 when 5V wall power is

not available. When 5V wall power is available, D1 both

supplies power to the LTC4089, pulls the gate of MN1 high

to increase the charge current (by increasing the input

current limit), and pulls the gate of MP1 high to disable it

and prevent conduction back to the USB port.

Table 1: Inductor Vendors

PART

SERIES

INDUCTANCE

(μH)

SIZE

(mm)

VENDOR

URL

Sumida

www.sumida.com CDRH5D28

CDRH6D38

8.2, 10

10

6

7

6

7

3

4

TDK

www.tdk.com

www.toko.com

SLF6028T

D63LCB

10

6

2.8

Toko

10

6.3 6.3 3

Catch Diode

5V WALL

Depending on load current, a 1A to 2A Schottky diode is

recommended for the D1 catch diode. The diode must

have a reverse voltage rating equal to, or greater than,

the maximum input voltage. The ON Semiconductor

MBRM140 and the Diodes Inc. DFLS140/160/240 are

good choices.

I

CHG

ADAPTER

BAT

850mA I

CHG

D1

LTC4089

USB POWER

IN

PROG

500mA I

+

CHG

Li-Ion

BATTERY

MP1

1k

CLPROG

2.87k

MN1

2k

59k

High Voltage Regulator Capacitor Selection

4089 F05

Bypass the HVIN pin of the LTC4089/LTC4089-5 circuit

with a 1μF, or higher value ceramic capacitor of X7R or

X5Rtype.Y5Vtypeshavepoorperformanceovertempera-

ture and applied voltage and should not be used. A 1μF

ceramic is adequate to bypass the high voltage input and

will easily handle the ripple current. However, if the input

power source has high impedance, or there is signiﬁcant

inductance due to long wires or cables, additional bulk

capacitance may be necessary. This can be provided with

a low performance electrolytic capacitor.

Figure 5. USB or 5V Wall Adapter Power

Inductor Selection and Maximum Output Current

A good choice for the inductor value is L = 10μH. With

this value the maximum load current will be 1A. The RMS

current rating of the inductor must be greater than the

maximum load current and its saturation current should

be about 30% higher. Note that the maximum load current

will be the programmed charge current plus the largest

40895fc

17

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

Thehighvoltageregulatoroutputcapacitorcontrolsoutput

ripple, supplies transient load currents, and stabilizes the

regulator control loop. Ceramic capacitors have very low

equivalent series resistance (ESR) and provide the best

ripple performance. A good value is 10μF. Use X5R or

X7R types, and note that a ceramic capacitor biased with

start-up. A voltage ramp at the HVEN pin can be created by

driving the pin through an external RC ﬁlter (see Figure 6).

By choosing a large RC time constant, the peak start-up

current will not overshoot the current that is required to

regulatetheoutput.Choosethevalueoftheresistorsothat

it can supply 20μA when the HVEN pin reaches 2.3V.

V

will have less than its nominal capacitance. Table

HVOUT

RUN

2 lists several capacitor vendors.

15k

LTC4089

Table 2: Capacitor Vendors

HVEN

PART

VENDOR

PHONE

URL

SERIES COMMENTS

0.1μF

GND

Panasonic (714) 373-7366 www.panasonic.com Ceramic, EEF Series

4089 F06

Polymer,

Tantalum

Figure 6. Using the HVEN Pin to Soft-Start the

High Voltage Regulator.

Kemet

Sanyo

(864) 963-6300

www.kemet.com

Ceramic,

Tantalum

T494,

T495

(408) 749-9714 www.sanyovideo.com Ceramic,

POSCAP

Alternate NTC Thermistors

Polymer,

Tantalum

The LTC4089/LTC4089-5 NTC trip points were designed

to work with thermistors whose resistance-temperature

characteristics follow Vishay Dale’s “R-T Curve 2.” The

Vishay NTHS0603N02N1002J is an example of such a

thermistor. However, Vishay Dale has many thermistor

products that follow the “R-T Curve 2” characteristic in a

variety of sizes. Furthermore, any thermistor whose ratio

Murata

AVX

(404) 436-1300

www.murata.com

www.avxcorp.com

Ceramic

Ceramic,

Tantalum

TPS

Series

Taiyo Yuden (864) 963-6300 www.taiyo-yuden.com Ceramic

BOOST Pin Considerations

of R

to R

is about 7.0 will also work (Vishay Dale

COLD

HOT

Capacitor C3 and diode D2 (see Block Diagram) are used

to generate a boost voltage that is higher than the input

voltage. In most cases, a 0.1μF capacitor and fast-switch-

ing diode (such as the 1N4148 or 1N914) will work well.

The BOOST pin must be at least 2.2V above the SW pin

for proper operation.

R-T Curve 2 shows a ratio of 2.815/0.4086 = 6.89).

Power conscious designs may want to use thermistors

whoseroomtemperaturevalueisgreaterthan10k. Vishay

Dalehasanumberofvaluesofthermistorfrom10kto100k

that follow the “R-T Curve 2.” Using these as indicated

in the NTC Thermistor section will give temperature trip

points of approximately 3°C and 47°C, a delta of 44°C.

This delta in temperature can be moved in either direc-

High Voltage Regulator Soft-Start

The HVEN pin can be used to soft-start the high voltage

regulator and reduce the maximum input current during

tion by changing the value of R

with respect to R

.

NOM

NTC

40895fc

18

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

Increasing R

will move both trip points to lower

where R

COLD

is the value of the bias resistor, R

and

NOM

HOT

temperatures. Likewise, a decrease in R

with respect

R

are the values of R

at the desired temperature

NOM

NTC

to R

will move the trip points to higher temperatures.

trip points. Continuing the forementioned example with

a desired hot trip point of 50°C:

NTC

To calculate R

for a shift to lower temperature, for

NOM

example, use the following equation:

R_COLD−R_HOT

2.815− 0.4086

R_NOM

=

R

R_NOM

=

^COLD•R_NTCat 25°C

2.815

100k •(3.266 − 0.3602)

2.815− 0.4086

where R

is the resistance ratio of R

at the desired

COLD

NTC

=

coldtemperaturetrippoint.Toshiftthetrippointstohigher

temperatures use the following equation:

= 120.8k,121k nearest 1%

R_HOT

0.4086

R_NOM

=

•R_NTCat 25°C

⎡

⎢

0.4086

2.815− 0.4086

3.266 − 0.3602 − 0.3602

⎤

⎥

⎛

⎞

where R

is the resistance ratio of R

at the desired

HOT

NTC

•

⎜

⎝

⎟

⎠

R1= 100k •

hot temperature trip point.

⎢

⎣

⎥

⎦

(

)

Thefollowingexampleusesa100KR-TCurve1Thermistor

from Vishay Dale. The difference between the trip points is

44°C, from before—and the desired cold trip point of 0°C,

would put the hot trip point at 44°C. The R

calculated as follows:

= 13.3k,13.3k isnearest 1%

needed is

NOM

The ﬁnal solution is shown in Figure 7, where

R

= 121k, R1 = 13.3k and R

= 100k at 25°C

NOM

NTC

R_COLD

2.815

R_NOM

=

•R_NTCat 25°C=

VNTC

15

LTC4089

3.266

2.815

•100kΩ=116kΩ

0.74 • VNTC

R

NOM

–

+

121k

NTC

14

The nearest 1% value for R

is 115k. This is the value

NOM

TOO_COLD

TOO_HOT

used to bias the NTC thermistor to get cold and hot trip

points of approximately 0°C and 44°C, respectively. To

extend the delta between the cold and hot trip points,

R1

13.3k

–

+

a resistor (R1) can be added in series with R

Figure 7). The values of the resistors are calculated as

follows:

(see

NTC

0.29 • VNTC

R

NTC

100k

R_COLD−R_HOT

2.815− 0.4086

R_NOM

=

+

–

NTC_ENABLE

0.1V

0.4086

2.815− 0.4086

⎡

⎤

R1=

• R_COLD−R_HOT−R

HOT

[

]

4089 F07

⎢

⎣

⎥

⎦

Figure 7. Modiﬁed NTC Circuit

40895fc

19

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

Power Dissipation and High Temperature

Considerations

dissipated in the battery charger. For a typical application,

an example of this calculation would be:

The die temperature of the LTC4089/LTC4089-5 must

be lower than the maximum rating of 110°C. This is

generally not a concern unless the ambient temperature

is above 85°C. The total power dissipated inside the

LTC4089/LTC4089-5 depends on many factors, including

input voltage (IN or HVIN), battery voltage, programmed

charge current, programmed input current limit, and load

current.

P = (1− 0.87)• 4V •(0.7A + 0.3A) − 0.4V •

[

]

D

4V

12V

⎛

⎞

1−

•(0.7A + 0.3A)+ 0.3V • 0.7A = 463mW

⎜

⎝

⎟

⎠

Thisexampleassumes87%efﬁciency,V

=12V,V

OUT

=

BAT

HVIN

3.7V (V

is about 4V), I = 700mA, I

= 300mA

HVOUT

BAT

resulting in less than 0.5W total dissipation.

If the LTC4089-5 is being powered from HVIN, the power

dissipation can be estimated by calculating the regulator

power loss from an efﬁciency measurement and subtract-

ing the catch diode loss.

Ingeneral,iftheLTC4089/LTC4089-5isbeingpoweredfrom

IN the power dissipation can be calculated as follows:

P_D= (V − V_BAT) •I_BAT+ (V − V_OUT) •I_OUT

IN

P =(1− η)•(5V •(I_BAT+I_OUT))

D

where P is the power dissipated, I

is the battery

D

BAT

charge current, and I

is the application load current.

⎛

⎞

5V

OUT

−V • 1−

•(I_BAT+I_OUT)

D

For a typical application, an example of this calculation

would be:

⎜

⎟

V

⎝

⎠

HVIN

+(5V − V_BAT)•I_BAT

P_D= (5V − 3.7V) • 0.4A + (5V − 4.75V) • 0.1A =

The difference between this equation and the LTC4089 is

the last term which represents the power dissipation in

the battery charger. For a typical application, an example

of this calculation would be:

545mW

This example assumes V = 5V, V

= 4.75V, V = 3.7V,

BAT

IN

OUT

I

= 400mA, and I

= 100mA resulting in slightly more

BAT

OUT

than 0.5W total dissipation.

P =(1− 0.87)•(5V •(0.7A + 0.3A))

D

If the LTC4089 is being powered from HVIN, the power

dissipation can be estimated by calculating the regulator

powerlossfromanefﬁciencymeasurement,andsubtract-

ing the catch diode loss.

5V

12V

−0.4V •(1−

)•(0.7A + 0.3A)

+(5V − 3.7V)•0.7A =1,327mW

P_D= (1− η) •(V_HVOUT•(I_BAT+I_OUT))− V_D•

Like the LTC4089 example, this example assumes 87%

efﬁciency, V

= 12V, V = 3.7V, I = 700mA, I

=

HVIN

BAT

OUT

⎛

⎞

⎟

⎠

V_HVOUT

1−

•(I_BAT+I_OUT)+ 0.3V •I_BAT

300mA resulting in 1.3W total dissipation.

⎜

⎝

V_HVIN

To prevent power dissipation of this magnitude from

causing high die temperature, it is important to solder the

exposed backside of the package to a ground plane. This

ground should be tied to other copper layers below with

thermal vias; these layers will spread the heat dissipated

by the LTC4089. Additional vias should be placed near the

catch diodes. Adding more copper to the top and bottom

layers, and tying this copper to the internal planes with

vias, can reduce thermal resistance further. With these

steps, the thermal resistance from die (i.e., junction) to

where is the efﬁciency of the high voltage regulator

and V is the forward voltage of the catch diode at I =

D

I

+ I . The ﬁrst term corresponds to the power lost

BAT

OUT

in converting V

to V

, the second term subtracts

HVOUT

HVIN

the catch diode loss, and the third term is the power

ambient can be reduced to

= 40°C/W.

JA

40895fc

20

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

The power dissipation in the other power compo-

nents—catch diodes, MOSFETs, boost diodes and induc-

tors—causes additional copper heating and can further

increase the “ambient” temperature of the IC.

High frequency currents, such as the high voltage input

current of the LTC4089, tend to ﬁnd their way along

the ground plane on a mirror path directly beneath the

incident path on the top of the board. If there are slits or

cuts in the ground plane due to other traces on that layer,

the current will be forced to go around the slits. If high

frequency currents are not allowed to ﬂow back through

their natural least-area path, excessive voltage will build

up and radiated emissions will occur. See Figure 9.

Board Layout Considerations

As discussed in the previous section, it is critical that

the exposed metal pad on the backside of the LTC4089/

LTC4089-5 package be soldered to the PC board ground.

Furthermore,properoperationandminimumEMIrequires

acarefulprintedcircuitboard(PCB)layout.Notethatlarge,

switched currents ﬂow in the power switch (between the

HVIN and SW pins), the catch diode and the HVIN input

capacitor. These components, along with the inductor and

output capacitor, should be placed on the same side of

the circuit board, and their connections should be made

on that layer. Place a local, unbroken ground plane below

thesecomponents.Theloopformedbythesecomponents

should be as small as possible. Additionally, the SW and

BOOSTnodesshouldbekeptassmallaspossible.Figure 8

showstherecommendedcomponentplacementwithtrace

and via locations.

4089 F09

Figure 9. Ground Currents Follow Their Incident Path

at High Speed. Slices in the Ground Plane Cause High

Voltage and Increased Emissions.

V and V

IN

Bypass Capacitor

HVIN

MINIMIZE D1, L1,

C3, U1, SW PIN LOOP

Many types of capacitors can be used for input bypassing,

however, cautionmustbeexercisedwhenusingmultilayer

ceramic capacitors. Because of the self-resonant and high

Q characteristics of some types of ceramic capacitors,

high voltage transients can be generated under some

start-up conditions, such as from connecting the charger

input to a hot power source. For more information, refer

to Application Note 88.

C1 AND D1

GND PADS

SIDE-BY-SIDE

AND SEPERATED

WITH C3 GND PAD

Battery Charger Stability Considerations

Theconstant-voltagemodefeedbackloopisstablewithout

any compensation when a battery is connected with low

impedanceleads.Excessiveleadlength,however,mayadd

enough series inductance to require a bypass capacitor

of at least 1μF from BAT to GND. Furthermore, a 4.7μF

capacitor with a 0.2 to 1 series resistor to GND is

recommended at the BAT pin to keep ripple voltage low

when the battery is disconnected.

U1 THERMAL PAD

SOLDERED TO PCB.

VIAS CONNECTED TO ALL

GND PLANES WITHOUT

THERMAL RELIEF.

MINIMIZE TRACE LENGTH

Figure 8. Suggested Board Layout

40895fc

21

LTC4089/LTC4089-5

APPLICATIONS INFORMATION

D2

SD101AWS

L1

C2

0.1μF

6.3V

V

IN

10μH

20

E1

E2

SLF6028T-100M1R3

V

IN

6V

21

19

E16

H

HVIN

BOOST SW

+

VOUT

TO 36V

C3

22μF

6.3V

C9

22μF

50V

R1

1M

1%

C1

D1

1μF

DLFS160

GND

ON

50V

JP1

VIN

D3

HVPR

RED

1

2

3

HVOUT

HVPR

OUT

LTC4089

R7

22

680

HVEN

18

7

C7

1000pF

OFF

50V

Q1

E3

Si2333DS

USB

4.35V

TO 5.5V

R6

12

15

IN

1k

13

10

11

8

C5

4.7μF

6.3V

R2

1Ω

1%

E4

OUT

HPWR

SUSP

C6

4.7μF

6.3V

JP2

CURRENT

16

Q2

Si2333DS

GND

GATE

BAT

C4

1

2

3

USB

500mA

0.1μF

10%

E6

LI-ION+

17

C8

TIMER

D4

4.7μF

6.3V

R3

2.1k

1%

CHGR

100mA

CHRG

VNTC

NTC

GRN

R9

1Ω

R8

680

14

9

CLPROG

PROG

6

E7

GND

E8

HPWR

R4

71.5k

1%

R5

10k

1%

5

JP3

USB ON/OFF

1

E9

CHGR

OFF

V

C

GND

2

GND

1

E11

NTC

2

3

4

JP4

NTC

10pF

4089 F10

ON

1

2

3

EXT

INT

E13

SUSP

E10

CLPROG

R10

10k

1%

E12

PROG

Figure 10. Typical Application Diagram

40895fc

22

LTC4089/LTC4089-5

PACKAGE DESCRIPTION

DJC Package

22-Lead Plastic DFN (6mm × 3mm)

(Reference LTC DWG # 05-08-1714)

0.889

0.70 0.05

R = 0.10

0.889

3.60 0.05

1.65 0.05

2.20 0.05

(2 SIDES)

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

5.35 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. APPLY SOLDER MASK TO AREAS THAT

ARE NOT SOLDERED

3. DRAWING IS NOT TO SCALE

R = 0.115

0.40 0.05

6.00 0.10

(2 SIDES)

TYP

0.889

12

22

R = 0.10

TYP

0.889

3.00 0.10

(2 SIDES)

1.65 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PIN #1 NOTCH

R0.30 TYP OR

0.25mm × 45°

CHAMFER

11

1

0.25 0.05

0.50 BSC

0.75 0.05

0.200 REF

5.35 0.10

(2 SIDES)

(DJC) DFN 0605

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX)

IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

40895fc

InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,

no responsibility is assumed for its use. Linear Technology Corporation makes no representation that

the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTC4089/LTC4089-5

RELATED PARTS

PART NUMBER

Battery Chargers

LTC1733

DESCRIPTION

COMMENTS

Monolithic Lithium-Ion Linear Battery

Charger

Standalone Charger with Programmable Timer, Up to 1.5A Charge Current

Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed

LTC1734

LTC4002

LTC4053

LTC4054

Lithium-Ion Linear Battery Charger in

ThinSOT™

Switch Mode Lithium-Ion Battery

Charger

Standalone, 4.7V ≤ V ≤ 24V, 500kHz Frequency, 3 Hour Charge Termination

IN

USB Compatible Monolithic Li-Ion

Battery Charger

Standalone Charger with Programmable Timer, Up to 1.25A Charge Current

Standalone Linear Li-Ion Battery

Charger with Integrated Pass Transistor Charge Current

in ThinSOT

Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA

LTC4057

LTC4058

Lithium-Ion Linear Battery Charger

Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package

Standalone 950mA Lithium-Ion Charger C/10 Charge Termination, Battery Kelvin Sensing, 7% Charge Accuracy

in DFN

LTC4059

900mA Linear Lithium-Ion Battery

Charger

2mm 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output

LTC4065/LTC4065A Standalone Li-Ion Battery Chargers

in 2mm 2mm DFN

4.2V, 0.6% Float Voltage, Up to 750mA Charge Current, 2mm 2mm DFN,

“A” Version Has ACPR Function.

LTC4411/LTC4412 Low Loss PowerPath Controller in

ThinSOT

Automatic Switching Between DC Sources, Load Sharing, Replaces ORing Diode

LTC4412HV

High Voltage Power Path Controllers in

ThinSOT

V = 3V to 36V, More Efﬁcient than Diode ORing, Automatic Switching Between DC

IN

Sources, Simpliﬁed Load Sharing, ThinSOT Package.

Power Management

LTC3405/LTC3405A 300mA (I ), 1.5MHz, Synchronous

95% Efﬁciency, V = 2.7V to 6V, V

= 0.8V, I = 20μA, I < 1μA, ThinSOT Package

OUT Q SD

OUT

IN

Step-Down DC/DC Converter

LTC3406/LTC3406A 600mA (I ), 1.5MHz, Synchronous

95% Efﬁciency, V = 2.5V to 5.5V, V

= 0.6V, I = 20μA, I < 1μA, ThinSOT Package

Q SD

OUT

IN

OUT

Step-Down DC/DC Converter

LTC3411

LTC3440

LTC3455

LT3493

1.25A (I ), 4MHz, Synchronous

95% Efﬁciency, V = 2.5V to 5.5V, V

= 0.8V, I = 60μA, I < 1μA, MS10 Package

Q SD

OUT

IN

Step-Down DC/DC Converter

600mA (I ), 2MHz, Synchronous

95% Efﬁciency, V = 2.5V to 5.5V, V

= 2.5V, I = 25μA, I < 1μA, MS Package

Q SD

OUT

IN

Buck-Boost DC/DC Converter

Dual DC/DC Converter with USB Power Seamless Transition Between Power Sources: USB, Wall Adapter and Battery; 95%

Manager and Li-Ion Battery Charger

Efﬁcient DC/DC Conversion

1.2A, 750kHz Step-Down Switching

Regulator

88% Efficiency, V = 3.6V to 36V (40V Maximum), V

= 0.8V, I < 2μA, 2mm 3mm

OUT SD

IN

DFN Package

LTC4055

LTC4066

LTC4085

USB Power Controller and Battery

Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

200m Ideal Diode, 4mm 4mm QFN16 Package

USB Power Controller and Li-Ion Battery Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 50m

Charger with Low-Loss Ideal Diode

Ideal Diode, 4mm 4mm QFN24 Package

USB Power Manager with Ideal Diode

Controller and Li-Ion Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

200m Ideal Diode with <50m Option, 4mm 3mm DFN14 Package

ThinSOT is a trademark of Linear Technology Corporation.

40895fc

LT 0309 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4089EDJC-1#TR
厂家：	Linear
描述：	LTC4089-1 - USB Power Manager with High Voltage Switching Charger; Package: DFN; Pins: 22; Temperature Range: -40°C to 85°C 光电二极管
文件：	总24页 (文件大小：344K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC4089EDJC-1#TR [Linear]

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