LTC4085 [Linear]
USB Power Manager with Ideal Diode Controller and Li-Ion Charger; 与理想二极管控制器和锂离子电池充电器的USB电源管理器![LTC4085](http://pdffile.icpdf.com/pdf1/p00136/img/icpdf/LTC40_753647_icpdf.jpg)
型号: | LTC4085 |
厂家: | ![]() |
描述: | USB Power Manager with Ideal Diode Controller and Li-Ion Charger |
文件: | 总24页 (文件大小:276K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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LTC4085
USB Power Manager with
Ideal Diode Controller and
Li-Ion Charger
FEATURES
DESCRIPTION
n
Seamless Transition Between Input Power Sources:
The LTC®4085 is a USB power manager and Li-Ion battery
charger designed for portable battery-powered applica-
tions. The part controls the total current used by the USB
peripheral for operation and battery charging. The total
input current can be limited to 20% or 100% of a pro-
grammed value up to 1.5A (typically 100mA or 500mA).
Battery charge current is automatically reduced such that
the sum of the load current and charge current does not
exceed the programmed input current limit.
Li-Ion Battery, USB and 5V Wall Adapter
n
215mΩ Internal Ideal Diode Plus Optional External
IdealDiodeControllerProvideLowLossPowerPath™
When Wall Adapter/USB Input Not Present
n
Load Dependent Charging Guarantees Accurate USB
Input Current Compliance
n
Constant-Current/Constant-Voltage Operation with
Thermal Feedback to Maximize Charging Rate Without
Risk of Overheating*
The LTC4085 includes a complete constant-current/con-
stant-voltage linear charger for single cell Li-ion batteries.
The float voltage applied to the battery is held to a tight
0.8%tolerance,andchargecurrentisprogrammableusing
an external resistor to ground. An end-of-charge status
output CHRG indicates full charge. Total charge time is
programmable by an external capacitor to ground. When
thebatterydrops100mVbelowthefloatvoltage,automatic
recharging of the battery occurs. Also featured is an NTC
thermistor input used to monitor battery temperature
while charging.
n
Selectable 100% or 20% Input Current Limit
(e.g., 500mA/100mA)
n
Battery Charge Current Independently Programmable
Up to 1.2A
n
Preset 4.2V Charge Voltage with 0.8% Accuracy
n
C/10 Charge Current Detection Output
n
NTC Thermistor Input for Temperature Qualified Charging
n
Tiny (4mm × 3mm × 0.75mm) 14-Lead DFN Package
APPLICATIONS
n
Portable USB Devices: Cameras, MP3 Players, PDAs
The LTC4085 is available in a 14-lead low profile 4mm ×
3mm DFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118,6700364.
Other patents pending.
TYPICAL APPLICATION
Input and Battery Current vs Load Current
I
LOAD
RPROG = 100k, RCLPROG = 2k
5V WALL
ADAPTER
INPUT
TO LDOs,
REGs, ETC
600
4.7μF
I
IN
5V (NOM)
I
IN
FROM USB
500
400
300
200
100
0
IN
WALL
ACPR
OUT
CABLE V
510Ω
1k
BUS
4.7μF
SUSPEND USB POWER
100mA 500mA SELECT
SUSP
HPWR
PROG
CLPROG
NTC
I
LOAD
LTC4085
GND
GATE
BAT
*
I
BAT
(CHARGING)
CHRG
I
V
NTC
TIMER
BAT
I
BAT
(DISCHARGING)
+
10k
WALL = 0V
100
–100
0
200
300 500
400
(mA)
600
*
OPTIONAL - TO LOWER
IDEAL DIODE IMPEDANCE
I
LOAD
0.1μF
100k
2k
10k
4085 TA01b
4085 TA01
4085fc
1
LTC4085
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 3, 4, 5)
Terminal Voltage
TOP VIEW
IN, OUT
IN
OUT
1
2
3
4
5
6
7
14 BAT
t < 1ms and Duty Cycle < 1% .................. –0.3V to 7V
Steady State............................................. –0.3V to 6V
BAT, CHRG, HPWR, SUSP, WALL, ACPR....... –0.3V to 6V
NTC, TIMER, PROG, CLPROG.......–0.3V to (V + 0.3V)
Pin Current (Steady State)
13 GATE
12 PROG
11 CHRG
10 ACPR
CLPROG
HPWR
SUSP
15
CC
TIMER
WALL
9
8
V
NTC
NTC
IN, OUT, BAT (Note 6)...............................................2.5A
Operating Temperature Range.................. –40°C to 85°C
Maximum Operating Junction Temperature .......... 110°C
Storage Temperature Range................... –65°C to 125°C
DE PACKAGE
14-LEAD (4mm s 3mm) PLASTIC DFN
T
JMAX
= 125°C, θ = 40°C/W
JA
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
14-Lead (4mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
LTC4085EDE#PBF
LTC4085EDE#TRPBF
4085
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IN and OUT
BAT
MIN
TYP
MAX
5.5
UNITS
VIN
Input Supply Voltage
Input Voltage
4.35
V
V
V
4.3
BAT
l
l
l
I
IN
Input Supply Current
I
= 0 (Note 7)
0.5
50
60
1.2
100
110
mA
μA
μA
BAT
Suspend Mode; SUSP = 5V
Suspend Mode; SUSP = 5V, WALL = 5V,
V
OUT = 4.8V
l
IOUT
Output Supply Current
Battery Drain Current
VOUT = 5V, V = 0V, NTC = V
0.7
1.4
mA
IN
NTC
l
l
l
I
V
= 4.3V, Charging Stopped
15
22
60
27
35
100
μA
μA
μA
BAT
BAT
Suspend Mode; SUSP = 5V
V
= 0V, BAT Powers OUT, No Load
IN
l
l
VUVLO
Input or Output Undervoltage Lockout
Input or Output Undervoltage Lockout
V
V
Powers Part, Rising Threshold
3.6
2.75
3.8
4
3.15
V
V
IN
OUT Powers Part, Rising Threshold
Rising – V Falling
2.95
V
IN
130
mV
ΔVUVLO
IN
or VOUT Rising – VOUT Falling
Current Limit
l
l
ILIM
Current Limit
RCLPROG = 2k (0.1%), HPWR = 5V
475
90
500
100
525
110
mA
mA
R
CLPROG = 2k (0.1%), HPWR = 0V
I
Maximum Input Current Limit
ON Resistance V to V
(Note 8)
= 100mA Load
2.4
A
IN(MAX)
RON
I
215
mΩ
IN
OUT
OUT
4085fc
2
LTC4085
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
ELECTRICAL CHARACTERISTICS
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
VCLPROG
CLPROG Pin Voltage
RPROG = 2k
0.98
0.98
1
1
1.02
1.02
V
V
R
PROG = 1k
IN or OUT
(V – V ) V Rising
ISS
Soft-Start Inrush Current
5
mA/μs
VCLEN
Input Current Limit Enable Threshold
Voltage
20
–80
50
–60
80
–20
mV
mV
IN
IN
OUT
(V – V ) V Falling
IN
IN
OUT
Battery Charger
VFLOAT
Regulated Output Voltage
IBAT = 2mA
BAT = 2mA, (0°C to 85°C)
RPROG = 100k (0.1%), No Load
PROG = 50k (0.1%), No Load
4.165
4.158
4.2
4.2
4.235
4.242
V
V
I
l
l
IBAT
Current Mode Charge Current
465
900
500
1000
535
1080
mA
mA
R
IBAT(MAX)
VPROG
Maximum Charge Current
PROG Pin Voltage
(Note 8)
1.5
A
l
l
RPROG = 100k
0.98
0.98
1
1
1.02
1.02
V
V
RPROG = 50k
l
l
l
kEOC
Ratio of End-of-Charge Current to
Charge Current
VBAT = VFLOAT (4.2V)
0.085
0.1
0.11
mA/mA
ITRIKL
VTRIKL
VCEN
Trickle Charge Current
VBAT = 2V, RPROG = 100k (0.1%)
40
50
60
3
mA
V
Trickle Charge Threshold Voltage
Charger Enable Threshold Voltage
2.8
2.9
(VOUT – VBAT) Falling; VBAT = 4V
(VOUT – VBAT) Rising; VBAT = 4V
55
80
mV
mV
VRECHRG
tTIMER
Recharge Battery Threshold Voltage
TIMER Accuracy
VFLOAT – VRECHRG
65
100
135
10
mV
%
VBAT = 4.3V
-10
Recharge Time
Percent of Total Charge Time
Percent of Total Charge Time, VBAT < 2.8V
50
25
%
Low-Battery Trickle Charge Time
%
TLIM
Junction Temperature in Constant
Temperature Mode
105
°C
Internal Ideal Diode
RFWD
Incremental Resistance, VON Regulation IBAT = 100mA
125
215
mΩ
mΩ
RDIO(ON)
VFWD
ON Resistance VBAT to VOUT
IBAT = 600mA
l
Voltage Forward Drop (VBAT – VOUT
)
IBAT = 5mA
10
30
55
160
50
mV
mV
mV
I
I
BAT = 100mA
BAT = 600mA
VOFF
Diode Disable Battery Voltage
2.8
550
2.2
V
mA
A
IFWD
Load Current Limit, for VON Regulation
Diode Current Limit
ID(MAX)
External Ideal Diode
VFWD,EDA
Logic
VOL
External Ideal Diode Forward Voltage
VGATE = 1.85V; IGATE = 0
20
mV
l
l
l
Output Low Voltage, CHRG, ACPR
Input High Voltage
ISINK = 5mA
0.1
0.25
0.4
V
V
VIH
SUSP, HPWR Pin
SUSP, HPWR Pin
SUSP, HPWR
1.2
VIL
Input Low Voltage
V
IPULLDN
Logic Input Pull-Down Current
2
μA
4085fc
3
LTC4085
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
ELECTRICAL CHARACTERISTICS
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
VCHG(SD)
Charger Shutdown Threshold Voltage
on TIMER
0.15
0.4
V
ICHG(SD)
Charger Shutdown Pull-Up Current
on TIMER
VTIMER = 0V
5
14
μA
VWAR
VWAF
VWDR
VWDF
IWALL
NTC
Absolute Wall Input Threshold Voltage
Absolute Wall Input Threshold Voltage
Delta Wall Input Threshold Voltage
Delta Wall Input Threshold Voltage
Wall Input Current
VWALL Rising Threshold
VWALL Falling Threshold
VWALL – VBAT Rising Threshold
VWALL – VBAT Falling Threshold
VWALL = 5V
4.15
4.25
3.12
75
4.35
V
V
mV
mV
μA
l
l
0
25
50
75
150
VVNTC
INTC
VNTC Bias Voltage
4.4
4.85
0
V
IVNTC = 500μA
NTC Input Leakage Current
VNTC = 1V
1
μA
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
0.74 • V
0.02 • V
V
V
VNTC
VNTC
VHOT
VDIS
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
0.29 • V
0.01 • V
V
V
VNTC
VNTC
l
NTC Disable Voltage
NTC Input Voltage to GND (Falling)
Hysteresis
75
100
35
125
mV
mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The LTC4085E is guaranteed to meet specified performance from
0°C to 85°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with
statistical process controls.
Note 2: V is the greater of V , V
or V .
BAT
Note 6: Guaranteed by long term current density limitations.
CC
IN OUT
Note 3: All voltage values are with respect to GND.
Note 7: Total input current is equal to this specification plus 1.002 • I
BAT
where I is the charge current.
BAT
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.
4085fc
4
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Input Supply Current
vs Temperature
Input Supply Current vs
Battery Drain Current vs Temperature
(BAT Powers OUT, No Load)
Temperature (Suspend Mode)
70
60
50
40
30
20
10
0
900
800
700
600
500
400
300
200
100
100
90
80
70
60
50
40
30
20
10
0
V
V
R
R
= 5V
V
V
R
R
= 5V
V
V
= 0V
IN
BAT
IN
IN
= 4.2V
= 4.2V
= 4.2V
BAT
PROG
BAT
PROG
= 100k
= 100k
= 2k
= 2k
CLPROG
CLPROG
SUSP = 5V
0
50
TEMPERATURE (°C)
100
–50
25
0
25
75
–50
–25
0
25
100
–50
–25
25
50
75
100
50
75
0
TEMPERATURE (°C)
TEMPERATURE (°C)
4085 G02
4085 G01
4085 G03
Input Current Limit
vs Temperature, HPWR = 5V
Input Current Limit
vs Temperature, HPWR = 0V
CLPROG Pin Voltage
vs Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0
525
515
505
495
110
108
106
104
102
100
98
V
= 5V
CLPROG
V
V
R
R
= 5V
V
V
R
R
= 5V
IN
IN
IN
R
= 2k
= 3.7V
= 3.7V
BAT
PROG
BAT
PROG
= 100k
= 100k
HPWR = 5V
= 2k
= 2k
CLPROG
CLPROG
96
HPWR = 0V
50
94
485
475
92
90
–50
0
25
75
100
–25
–50
0
25
50
75
100
–25
–50
–25
25
50
75
100
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4085 G06
4085 G04
4085 G05
PROG Pin Voltage
vs Temperature
Battery Regulation (Float)
Voltage vs Temperature
VFLOAT Load Regulation
4.30
4.25
4.220
4.215
4.210
4.205
1.020
1.015
1.010
1.005
V
I
= 5V
= 2mA
V
V
R
R
= 5V
R
= 34k
PROG
IN
IN
= 4.2V
BAT
BAT
= 100k
PROG
= 2k
CLPROG
4.20
4.15
4.200
4.195
1.000
0.995
4.10
4.05
4.00
4.190
4.185
4.180
0.990
0.985
0.980
–25
0
50
–50
75
100
–25
0
50
25
–50
75
100
0
200
400
I
600
(mA)
800
1000
25
TEMPERATURE (°C)
TEMPERATURE (°C)
BAT
4085 G09
4085 G07
4085 G08
4085fc
5
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Battery Current and Voltage
vs Time
Charge Current vs Temperature
(Thermal Regulation)
Input RON vs Temperature
600
500
6
5
600
500
400
300
275
250
225
200
175
150
125
I
= 400mA
LOAD
CHRG
I
BAT
V
= 4.5V
IN
V
BAT
400
300
4
3
V
= 5V
IN
V
= 5.5V
IN
200
100
0
2
1
0
200
100
0
400mAhr CELL
= 5V
C/10
TERMINATION
V
V
V
JA
= 5V
IN
IN
R
R
= 100k
= 3.5V
BAT
PROG
CLPROG
= 2.1k
Q
= 50°C/W
0
50
100
150
200
–50
25
50
75
100 125
–25
0
–50
0
25
50
75
100
–25
TIME (MINUTES)
TEMPERATURE (°C)
TEMPERATURE (°C)
4085 G11
4085 G12
4085 G10
Ideal Diode Current vs Forward
Voltage and Temperature
(No External Device)
Charging from USB, Low Power,
IBAT vs VBAT
Charging from USB, IBAT vs VBAT
1000
900
800
700
600
500
400
300
200
100
0
600
500
120
100
V
V
R
R
= 5V
V
V
R
R
= 5V
IN
OUT
V
V
= 3.7V
BAT
IN
IN
OUT
= NO LOAD
= 100k
= NO LOAD
= 100k
= 0V
PROG
PROG
= 2k
= 2k
CLPROG
CLPROG
HPWR = 5V
HPWR = 0V
400
80
300
200
60
40
–50°C
0°C
50°C
100°C
100
0
20
0
0
0.5
1
1.5
2
2.5
(V)
3
3.5
4
4.5
0
50
100
V (mV)
FWD
200
150
0
0.5
1
1.5
2
2.5
(V)
3
3.5
4
4.5
V
V
BAT
BAT
4085 G13
4085 G15
4085 G14
Ideal Diode Resistance and
Current vs Forward Voltage
(No External Device)
Ideal Diode Current vs Forward
Voltage and Temperature with
External Device
Ideal Diode Resistance and
Current vs Forward Voltage with
External Device
1000
900
800
700
600
500
400
300
200
100
0
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
V
V
= 3.7V
BAT
IN
V
V
= 3.7V
V
= 3.7V
BAT
BAT
IN
= 0V
= 0V
V
= 0V
IN
Si2333 PFET
Si2333 PFET
I
OUT
R
DIO
–50°C
0°C
50°C
100°C
0
0
0
50
100
(mV)
150
200
0
20
40
V
60
80
100
0
20
40
V
60
80
100
V
(mV)
(mV)
FWD
FWD
FWD
4085 G16
4085 G17
4085 G18
4085fc
6
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Input Connect Waveforms
Input Disconnect Waveforms
V
V
IN
IN
5V/DIV
5V/DIV
V
V
OUT
OUT
5V/DIV
5V/DIV
I
IN
I
IN
0.5A/DIV
0.5A/DIV
I
BAT
I
BAT
0.5A/DIV
0.5A/DIV
4085 G20
4085 G23
4085 G24
4085 G19
4085 G22
4085 G21
V
I
= 3.85V
1ms/DIV
V
I
= 3.85V
1ms/DIV
BAT
OUT
BAT
OUT
= 100mA
= 100mA
Wall Connect Waveforms,
V
Wall Disconnect Waveforms,
VIN = 0V
IN = 0V
WALL
WALL
5V/DIV
5V/DIV
V
V
OUT
OUT
5V/DIV
5V/DIV
I
I
WALL
WALL
0.5A/DIV
0.5A/DIV
I
I
BAT
BAT
0.5A/DIV
0.5A/DIV
1ms/DIV
V
I
= 3.85V
= 100mA
= 100k
1ms/DIV
V
= 3.85V
= 100mA
= 100k
BAT
OUT
R
BAT
OUT
PROG
I
R
PROG
Response to HPWR
Response to Suspend
HPWR
5V/DIV
SUSP
5V/DIV
V
OUT
I
IN
5V/DIV
0.5A/DIV
I
IN
0.5A/DIV
I
BAT
0.5A/DIV
I
BAT
0.5A/DIV
100μs/DIV
V
I
= 3.85V
= 50mA
100μs/DIV
V
I
= 3.85V
= 50mA
BAT
OUT
BAT
OUT
4085fc
7
LTC4085
PIN FUNCTIONS
IN (Pin 1): Input Supply. Connect to USB supply, V
.
HPWR (Pin 4): High Power Select. This logic input is used
to control the input current limit. A voltage greater than
1.2V on the pin will set the input current limit to 100% of
the current programmed by the CLPROG pin. A voltage
less than 0.4V on the pin will set the input current limit
to 20% of the current programmed by the CLPROG pin.
A 2μA pull-down is internally applied to this pin to ensure
it is low at power up when the pin is not being driven
externally.
BUS
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as deter-
mined by the state of the HPWR pin. Charge current (to
BAT pin) supplied through the input is set to the current
programmed by the PROG pin but will be limited by the
input current limit if charge current is set greater than the
input current limit.
OUT (Pin 2): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB V
SUSP (Pin 5): Suspend Mode Input. Pulling this pin above
1.2V will disable the power path from IN to OUT. The sup-
ply current from IN will be reduced to comply with the
USB specification for suspend mode. Both the ability to
charge the battery from OUT and the ideal diode function
(from BAT to OUT) will remain active. Suspend mode will
BUS
(IN) or the battery (BAT) when the USB is not present.
This pin can also be used as an input for battery charging
when the USB is not present and a wall adapter is applied
to this pin. OUT should be bypassed with at least 4.7μF
to GND.
reset the charge timer if V
is less than V
while in
OUT
BAT
BAT
CLPROG (Pin 3): Current Limit Program and Input Cur-
suspend mode. If V
is kept greater than V , such as
OUT
rent Monitor. Connecting a resistor, R , to ground
CLPROG
when a wall adapter is present, the charge timer will not
be reset when the part is put in suspend. A 2μA pull-down
is internally applied to this pin to ensure it is low at power
up when the pin is not being driven externally.
programs the input to output current limit. The current
limit is programmed as follows:
1000V
ICL(A) =
RCLPROG
TIMER(Pin6):TimerCapacitor.Placingacapacitor,C
,
TIMER
to GND sets the timer period. The timer period is:
In USB applications the resistor R
to no less than 2.1k.
should be set
CLPROG
CTIMER •RPROG • 3Hours
tTIMER(Hours) =
0.1μF •100k
The voltage on the CLPROG pin is always proportional to
the current flowing through the IN to OUT power path.
This current can be calculated as follows:
Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).
VCLPROG
RCLPROG
IIN(A) =
•1000
Shorting the TIMER pin to GND disables the battery
charging functions.
4085fc
8
LTC4085
PIN FUNCTIONS
WALL (Pin 7): Wall Adapter Present Input. Pulling this
pin above 4.25V will disconnect the power path from IN
to OUT. The ACPR pin will also be pulled low to indicate
that a wall adapter has been detected.
the charge current drops below 10% of the programmed
charge current (while in voltage mode) or the input supply
or output supply is removed, the CHRG pin is forced to a
high impedance state.
NTC (Pin 8): Input to the NTC Thermistor Monitoring
Circuits. Under normal operation, tie a thermistor from
the NTC pin to ground and a resistor of equal value
PROG (Pin 12): Charge Current Program. Connecting a
resistor, R
, to ground programs the battery charge
PROG
current. The battery charge current is programmed as
follows:
from NTC to V . When the voltage on this pin is above
NTC
0.74 • V
(Cold, 0°C) or below 0.29 • V
(Hot, 50°C)
VNTC
VNTC
50,000V
ICHG(A) =
the timer is suspended, but not cleared, the charging is
disabled and the CHRG pin remains in its former state.
When the voltage on NTC comes back between 0.74 •
RPROG
GATE (Pin 13): External Ideal Diode Gate Pin. This pin
can be used to drive the gate of an optional external
PFET connected between BAT and OUT. By doing so, the
impedance of the ideal diodebetween BAT and OUT can be
reduced. When not in use, this pin should be left floating.
It is important to maintain a high impedance on this pin
and minimize all leakage paths.
V
and 0.29 • V
, the timer continues where it
VNTC
VNTC
left off and charging is re-enabled if the battery voltage
is below the recharge threshold. There is approximately
3°C of temperature hysteresis associated with each of the
input comparators.
Connect the NTC pin to ground to disable this feature. This
will disable all of the LTC4085 NTC functions.
BAT (Pin 14): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and
as an input when supplying power to OUT. When the OUT
pin potential drops below the BAT pin potential, an ideal
V
(Pin 9): Output Bias Voltage for NTC. A resistor from
NTC
this pin to the NTC pin will bias the NTC thermistor.
ACPR (Pin 10): Wall Adapter Present Output. Active low
open-drain output pin. A low on this pin indicates that the
wall adapter input comparator has had its input pulled
above the input threshold. This feature is disabled if no
power is present on IN or OUT or BAT (i.e., below UVLO
thresholds).
diode function connects BAT to OUT and prevents V
OUT
fromdroppingsignificantlybelowV .Aprecisioninternal
BAT
resistor divider sets the final float (charging) potential on
thispin. Theinternalresistordividerisdisconnectedwhen
IN and OUT are in undervoltage lockout.
Exposed Pad (Pin 15): Ground. The exposed package pad
is ground and must be soldered to the PC board for proper
functionality and for maximum heat transfer.
CHRG (Pin 11): Open-Drain Charge Status Output. When
the battery is being charged, the CHRG pin is pulled low by
aninternalN-channelMOSFET. Whenthetimerrunsoutor
4085fc
9
LTC4085
BLOCK DIAGRAM
V
BUS
1
IN
CURRENT LIMIT
OUT
GATE
BAT
ILIM_CNTL
2
ENABLE
+
25mV
I
SOFT_START
IN
–
–
1000
+
–
1V
+
ILIM
25mV
–
EDA
+
CURRENT_CONTROL
CL
CLPROG
HPWR
CC/CV REGULATOR
CHARGER
3
4
13
14
2k
IN OUT BAT
IDEAL_DIODE
ENABLE
500mA/100mA
2μA
105°C
DIE TEMP
–
+
TA
SOFT_START2
I
CHRG
CHARGE_CONTROL
+
–
1V
+
CHG
–
0.25V
PROG
12
+
–
2.8V
+
25mV
–
BATTERY UVLO
100k
–
+
+
–
4.1V
RECHARGE
WALL
VOLTAGE_DETECT
UVLO
7
+
–
ACPR
4.25V
10
BAT_UV
RECHRG
TIMER
OSCILLATOR
6
V
NTC
9
8
CONTROL_LOGIC
CLK
–
+
HOLD
100k
CHRG
2C0LD
11
NTC
STOP
NTCERR
RESET
COUNTER
NTC
–
+
2HOT
100k
C/10
EOC
2μA
+
–
NTC_ENABLE
0.1V
4085 BD
GND
SUSP
4085fc
10
LTC4085
OPERATION
The LTC4085 is a complete PowerPath controller for bat-
tery powered USB applications. The LTC4085 is designed
to receive power from a USB source, a wall adapter, or a
battery. It can then deliver power to an application con-
nected to the OUT pin and a battery connected to the
BAT pin (assuming that an external supply other than the
battery is present). Power supplies that have limited cur-
Furthermore,poweringswitchingregulatorloadsfromthe
OUT pin (rather than directly from the battery) results in
shorter battery charge times. This is due to the fact that
switchingregulatorstypicallyrequireconstantinputpower.
WhenthispowerisdrawnfromtheOUTpinvoltage(rather
than the lower BAT pin voltage) the current consumed
by the switching regulator is lower leaving more current
available to charge the battery.
rent resources (such as USB V
supplies) should be
BUS
connectedtotheINpinwhichhasaprogrammablecurrent
limit. Batterychargecurrentwillbeadjustedtoensurethat
the sum of the charge current and load current does not
exceed the programmed input current limit.
The LTC4085 also has the ability to receive power from
a wall adapter. Wall adapter power can be connected to
the output (load side) of the LTC4085 through an exter-
nal device such as a power Schottky or FET, as shown in
Figure 1. The LTC4085 has the unique ability to use the
output, which is powered by the wall adapter, as a path
to charge the battery while providing power to the load. A
walladaptercomparatorontheLTC4085canbeconfigured
to detect the presence of the wall adapter and shut off the
connection to the USB to prevent reverse conduction out
to the USB bus.
An ideal diode function provides power from the battery
whenoutput/loadcurrentexceedstheinputcurrentlimitor
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.
4085fc
11
LTC4085
OPERATION
WALL
ADAPTER
10
ACPR
4.25V
(RISING)
3.15V
–
+
(FALLING)
WALL
7
+
–
75mV (RISING)
25mV (FALLING)
+
ENABLE
CURRENT LIMIT
CONTROL
–
IN
OUT
USB V
BUS
1
2
LOAD
CHRG
CONTROL
IDEAL
DIODE
BAT
14
4085 F01
+
Li-Ion
Figure 1: Simplified Block Diagram—PowerPath
4085fc
12
LTC4085
OPERATION
Table 1. Operating Modes—PowerPath States
Current Limited Input Power (IN to OUT)
WALL PRESENT
SUSPEND
VIN > 3.8V
VIN > (VOUT + 100mV)
VIN > (VBAT + 100mV) CURRENT LIMIT ENABLED
Y
X
X
X
X
N
X
Y
X
X
X
N
X
X
N
X
X
Y
X
X
X
N
X
Y
X
X
X
X
N
Y
N
N
N
N
N
Y
Battery Charger (OUT to BAT)
WALL PRESENT
SUSPEND
VOUT > 4.35V
VOUT > (VBAT + 100mV)
CHARGER ENABLED
X
X
X
X
X
X
N
X
Y
X
N
Y
N
N
Y
Ideal Diode (BAT to OUT)
WALL PRESENT
SUSPEND
VIN
X
VBAT > VOUT
VBAT > 2.8V
DIODE ENABLED
X
X
X
X
X
X
X
N
Y
N
X
Y
N
N
Y
X
X
Operating Modes—Pin Currents vs Programmed Currents (Powered from IN)
PROGRAMMING
OUTPUT CURRENT
BATTERY CURRENT
INPUT CURRENT
ICL = ICHG
IOUT < ICL
IOUT = ICL = ICHG
IOUT > ICL
IBAT = ICL – IOUT
IBAT = 0
IIN = IQ + ICL
IIN = IQ + ICL
IIN = IQ + ICL
I
BAT = ICL – IOUT
ICL > ICHG
IOUT < (ICL – ICHG
OUT > (ICL – ICHG
OUT = ICL
)
)
IBAT = ICHG
IBAT = ICL – IOUT
IBAT = 0
IIN = IQ + ICHG + IOUT
IIN = IQ + ICL
I
I
IIN = IQ + ICL
IOUT > ICL
I
BAT = ICL – IOUT
IIN = IQ + ICL
ICL < ICHG
IOUT < ICL
IOUT > ICL
IBAT = ICL – IOUT
IBAT = ICL – IOUT
IIN = IQ + ICL
IIN = IQ + ICL
4085fc
13
LTC4085
OPERATION
ThecurrentlimitingcircuitryintheLTC4085canandshould
be configured to limit current to 500mA for USB applica-
tions (selectable using the HPWR pin and programmed
using the CLPROG pin).
USB Current Limit and Charge Current Control
The current limit and charger control circuits of the
LTC4085 are designed to limit input current as well as
control battery charge current as a function of I . The
programmed current limit, I is defined as:
OUT
The LTC4085 reduces battery charge current such that the
sum of the battery charge current and the load current
does not exceed the programmed input current limit (one-
fifth of the programmed input current limit when HPWR
is low, see Figure 2). The battery charge current goes to
zero when load current exceeds the programmed input
current limit (one-fifth of the limit when HPWR is low). If
theloadcurrentisgreaterthanthecurrentlimit, theoutput
voltage will drop to just under the battery voltage where
the ideal diode circuit will take over and the excess load
current will be drawn from the battery.
CL,
⎛
⎞
1000
1000V
RCLPROG
ICL =
• VCLPROG
=
⎜
⎟
R
⎝
⎠
CLPROG
The programmed battery charge current, I , is defined
as:
CHG
⎛ 50,000
⎝ RPROG
⎞
50,000V
RPROG
ICHG
=
• VPROG
=
⎜
⎟
⎠
Input current, I , is equal to the sum of the BAT pin output
IN
current and the OUT pin output current:
I = I
IN
+ I
BAT
OUT
600
500
400
300
200
100
0
120
100
80
600
500
I
I
IN
IN
I
IN
400
300
200
100
0
I
I
I
LOAD
LOAD
LOAD
60
I
= I
BAT CHG
40
I
I
BAT
BAT
I
= I – I
BAT CL OUT
I
CHARGING
CHARGING
BAT
20
CHARGING
0
–100
0
–20
–100
100
200
300
(mA)
400
500
600
0
20
40
60
(mA)
80
100
120
0
100
200
300
(mA)
400
500
600
I
I
I
BAT
BAT
BAT
I
I
I
LOAD
LOAD
LOAD
(IDEAL DIODE)
(IDEAL DIODE)
(IDEAL DIODE)
4085 F02a
4085 F02b
4085 F02c
(2c) High Power Mode with
ICL = 500mA and ICHG = 250mA
RPROG = 100k and RCLPROG = 2k
(2b) Low Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
(2a) High Power Mode/Full Charge
R
PROG = 100k and RCLPROG = 2k
Figure 2: Input and Battery Currents as a Function of Load Current
4085fc
14
LTC4085
OPERATION
Programming Current Limit
seconds and prevents the OUT pin voltage from dropping
significantly below the BAT pin voltage. A comparison of
the I-V curve of the ideal diode and a Schottky diode can
be seen in Figure 3.
The formula for input current limit is:
⎛
⎞
1000
1000V
RCLPROG
ICL =
• VCLPROG
=
⎜
⎟
If the input current increases beyond the programmed
input current limit additional current will be drawn from
the battery via the internal ideal diode. Furthermore, if
R
⎝
⎠
CLPROG
where V
is the CLPROG pin voltage and R
CLPROG
CLPROG
is the total resistance from the CLPROG pin to ground.
power to IN (USB V ) or OUT (external wall adapter) is
BUS
removed, then all of the application power will be provided
by the battery via the ideal diode. A 4.7μF capacitor at OUT
issufficienttokeepatransitionfrominputpowertobattery
power from causing significant output voltage droop. The
ideal diode consists of a precision amplifier that enables a
large P-channel MOSFET transistor whenever the voltage
For example, if typical 500mA current limit is required,
calculate:
1V
500mA
RCLPROG
=
•1000 = 2k
In USB applications, the minimum value for R
atOUTisapproximately20mV(V )belowthevoltageat
CLPROG
FWD
should be 2.1k. This will prevent the application current
from exceeding 500mA due to LTC4085 tolerances and
quiescent currents. A 2.1k CLPROG resistor will give
a typical current limit of 476mA in high power mode
(HPWR = 1) or 95mA in low power mode (HPWR = 0).
BAT. The resistance of the internal ideal diode is approxi-
mately 200mΩ. If this is sufficient for the application then
no external components are necessary. However, if more
conductanceisneeded,anexternalPFETcanbeaddedfrom
BAT to OUT. The GATE pin of the LTC4085 drives the gate
of the PFET for automatic ideal diode control. The source
of the external PFET should be connected to OUT and the
drain should be connected to BAT. In order to help protect
the external PFET in overcurrent situations, it should be
placed in close thermal contact to the LTC4085.
V
will track the input current according to the fol-
CLPROG
lowing equation:
VCLPROG
RCLPROG
I =
•1000
IN
For best stability over temperature and time, 1% metal
film resistors are recommended.
I
MAX
Ideal Diode from BAT to OUT
SLOPE: 1/R
The LTC4085 has an internal ideal diode as well as a
controller for an optional external ideal diode. If a battery
is the only power supply available or if the load current
exceeds the programmed input current limit, then the
battery will automatically deliver power to the load via an
ideal diode circuit between the BAT and OUT pins. The
ideal diode circuit (along with the recommended 4.7μF
capacitor on the OUT pin) allows the LTC4085 to handle
DIO(ON)
SCHOTTKY
DIODE
4085 F03
FORWARD VOLTAGE (V)
(BAT-OUT)
V
FWD
large transient loads and wall adapter or USB V
con-
BUS
nect/disconnect scenarios without the need for large bulk
capacitors. The ideal diode responds within a few micro-
Figure 3. LTC4085 Schottky Diode vs Forward Voltage Drop
4085fc
15
LTC4085
OPERATION
Battery Charger
In constant-current mode, the charge current is set by
.Whenthebatteryapproachesthefinalfloatvoltage,
the charge current begins to decrease as the LTC4085
switches to constant-voltage mode. When the charge
current drops below 10% of the programmed charge
current while in constant-voltage mode the CHRG pin
assumes a high impedance state.
R
PROG
The battery charger circuits of the LTC4085 are designed
for charging single cell lithium-ion batteries. Featuring
an internal P-channel power MOSFET, the charger uses a
constant-current/constant-voltage charge algorithm with
programmable current and a programmable timer for
charge termination. Charge current can be programmed
up to 1.5A. The final float voltage accuracy is 0.8% typi-
cal. No blocking diode or sense resistor is required when
powering the IN pin. The CHRG open-drain status output
provides information regarding the charging status of the
LTC4085 at all times. An NTC input provides the option of
charge qualification using battery temperature.
An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the CHRG pin assumes a
high impedance state, if it has not already done so. While
charging in constant-current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automatically increased. In other words, the charge time
is extended inversely proportional to charge current de-
livered to the battery. For Li-Ion and similar batteries that
require accurate final float potential, the internal bandgap
reference,voltageamplifierandtheresistordividerprovide
regulation with 0.8% accuracy.
An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
presetvalueofapproximately105°C. Thisfeatureprotects
the LTC4085 from excessive temperature, and allows the
usertopushthelimitsofthepowerhandlingcapabilityofa
given circuit board without risk of damaging the LTC4085.
Another benefitofthe LTC4085 thermallimitisthat charge
current can be set according to typical, not worst-case,
ambient temperatures for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Trickle Charge and Defective Battery Detection
At the beginning of a charge cycle, if the battery voltage
is low (below 2.8V) the charger goes into trickle charge
reducing the charge current to 10% of the full-scale cur-
rent. If the low-battery voltage persists for one quarter
of the total charge time, the battery is assumed to be
defective, the charge cycle is terminated and the CHRG
pin output assumes a high impedance state. If for any
reason the battery voltage rises above ~2.8V the charge
cyclewillberestarted.Torestartthechargecycle(i.e.when
the dead battery is replaced with a discharged battery),
simply remove the input voltage and reapply it or cycle
the TIMER pin to 0V.
The charge cycle begins when the voltage at the OUT pin
rises above the output UVLO level and the battery volt-
age is below the recharge threshold. No charge current
actually flows until the OUT voltage is greater than the
output UVLO level and 100mV above the BAT voltage. At
the beginning of the charge cycle, if the battery voltage
is below 2.8V, the charger goes into trickle charge mode
to bring the cell voltage up to a safe level for charging.
The charger goes into the fast charge constant-current
mode once the voltage on the BAT pin rises above 2.8V.
4085fc
16
LTC4085
OPERATION
Programming Charge Current
therechargethresholdthetimerwillnotstartandcharging
is prevented. If after power-up the battery voltage drops
below the recharge threshold or if after a charge cycle the
battery voltage is still below the recharge threshold the
charge time is set to one half of a full cycle.
The formula for the battery charge current is:
V
ICHG = I
• 50,000 = PROG • 50,000
(
)
PROG
RPROG
The LTC4085 has a feature that extends charge time au-
tomatically. Charge time is extended if the charge current
in constant-current mode is reduced due to load current
or thermal regulation. This change in charge time is in-
versely proportional to the change in charge current. As
theLTC4085approachesconstant-voltagemodethecharge
current begins to drop. This change in charge current is
due to normal charging operation and does not affect the
timer duration.
where V
is the PROG pin voltage and R
is the
PROG
PROG
total resistance from the PROG pin to ground. Keep in
mind that when the LTC4085 is powered from the IN pin,
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.
For example, if typical 500mA charge current is required,
calculate:
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
1V
500mA
⎛
⎜
⎝
⎞
⎟
⎠
RPROG
=
• 50,000 = 100k
For best stability over temperature and time, 1% metal
film resistors are recommended. Under trickle charge
conditions, this current is reduced to 10% of the full-
scale value.
Connecting the TIMER pin to ground disables the battery
charger.
CHRG Status Output Pin
The Charge Timer
When the charge cycle starts, the CHRG pin is pulled to
groundbyaninternalN-channelMOSFETcapableofdriving
an LED. When the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode,thepinassumesahighimpedancestate(butcharge
current continues to flow until the charge time elapses).
If this state is not reached before the end of the program-
mable charge time, the pin will assume a high impedance
statewhenatime-outoccurs. TheCHRGcurrentdetection
threshold can be calculated by the following equation:
The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:
CTIMER •RPROG •3Hours
tTIMER(Hours)=
0.1μF •100k
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leavingshutdownandthevoltageonthebatteryislessthan
the recharge threshold. At power up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
0.1V
5000V
RPROG
IDETECT
=
• 50,000 =
RPROG
4085fc
17
LTC4085
OPERATION
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Suspend
The LTC4085 can be put in suspend mode by forcing the
SUSPpingreaterthan1V. Insuspendmodetheidealdiode
function from BAT to OUT is kept alive. If power is applied
to the OUT pin externally (i.e., a wall adapter is present)
then charging will be unaffected. Current drawn from the
IN pin is reduced to 50μA. Suspend mode is intended to
comply with the USB power specification mode of the
same name.
Note: The end-of-charge (EOC) comparator that moni-
tors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant-volt-
age mode will toggle CHRG to a high impedance state.
If, for some reason, the charge current rises back above
the threshold the CHRG pin will not resume the strong
pull-down state. The EOC latch can be reset by a recharge
NTC Thermistor
Thebatterytemperatureismeasuredbyplacinganegative
temperature coefficient (NTC) thermistor close to the bat-
tery pack. The NTC circuitry is shown in Figure 4. To use
cycle (i.e. V
drops below the recharge threshold) or
BAT
toggling the input power to the part.
Current Limit Undervoltage Lockout
this feature, connect the NTC thermistor (R ) between
NTC
the NTC pin and ground and a resistor (R
) from the
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
NOM
NTC pin to V . R
should be a 1% resistor with a
NTC
NOM
value equal to the value of the chosen NTC thermistor at
25°C(thisvalueis10kforaVishayNTHS0603N02N1002J
thermistor). The LTC4085 goes into hold mode when the
until V rises above the undervoltage lockout threshold.
IN
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e. forces the input power path to a high
resistance (R ) of the NTC thermistor drops to 0.41
HOT
times the value of R
or approximately 4.1k, which
NOM
should be at 50°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4085 is
designed to go into hold mode when the value of the NTC
impedance state) if V
exceeds V . If the current limit
OUT
IN
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until V
falls 50mV below
OUT
the V voltage.
IN
Charger Undervoltage Lockout
thermistor increases to 2.82 times the value of R
. This
NOM
resistance is R
. For a Vishay NTHS0603N02N1002J
AninternalundervoltagelockoutcircuitmonitorstheV
voltageanddisablesthebatterychargercircuitsuntilV
COLD
OUT
OUT
thermistor, this value is 28.2k which corresponds to ap-
proximately 0°C. The hot and cold comparators each have
approximately 3°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin can disable
the NTC function.
risesabovetheundervoltagelockoutthreshold.Thebattery
charger UVLO circuit has a built-in hysteresis of 125mV.
Furthermore,toprotectagainstreversecurrentinthepower
MOSFET, the charger UVLO circuit keeps the charger shut
downifV exceedsV .IfthechargerUVLOcomparator
BAT
OUT
is tripped, the charger circuits will not come out of shut
down until V
exceeds V by 50mV.
OUT
BAT
4085fc
18
LTC4085
APPLICATIONS INFORMATION
V
NTC
9
V
NTC
9
LTC4085
LTC4085
0.74 • V
0.74 • V
NTC
NTC
R
R
NOM
121k
NTC
NOM
–
+
–
+
10k
TOO_COLD
TOO_COLD
NTC
8
8
R
R1
NTC
10k
13.3k
–
+
–
+
TOO_HOT
TOO_HOT
0.29 • V
0.29 • V
NTC
NTC
R
100k
NTC
+
–
+
–
NTC_ENABLE
NTC_ENABLE
0.1V
0.1V
4085 F04a
4085 F04b
(4a)
(4b)
Figure 4. NTC Circuits
Thermistors
RCOLD
2.815
RNOM
=
•RNTC at 25°C
The LTC4085 NTC trip points were designed to work
with thermistors whose resistance-temperature charac-
teristics follow Vishay Dale’s “R-T Curve 2”. The Vishay
NTHS0603N02N1002Jisanexampleofsuchathermistor.
However, Vishay Dale has many thermistor products that
followthe“R-TCurve2”characteristicinavarietyofsizes.
where R
is the resistance ratio of R
at the desired
COLD
NTC
coldtemperaturetrippoint.Ifyouwanttoshiftthetrippoints
to higher temperatures use the following equation:
RHOT
0.4086
RNOM
=
•RNTC at 25°C
Furthermore, anythermistorwhoseratioofR
toR
COLD
HOT
isabout7.0willalsowork(VishayDaleR-TCurve2shows
where R
is the resistance ratio of R
at the desired
NTC
a ratio of R to R of 2.815/0.4086 = 6.89).
HOT
COLD
HOT
hot temperature trip point.
Power conscious designs may want to use thermistors
whoseroomtemperaturevalueisgreaterthan10k. Vishay
Dalehasanumberofvaluesofthermistorfrom10kto100k
that follow the “R-T Curve 2”. Using these as indicated
in the NTC Thermistor section will give temperature trip
pointsofapproximately3°Cand47°C,adeltaof44°C.This
delta in temperature can be moved in either direction by
Here is an example using a 100k R-T Curve 1 thermistor
from Vishay Dale. The difference between the trip points
is 44°C, from before, and we want the cold trip point to
be 0°C, which would put the hot trip point at 44°C. The
R
needed is calculated as follows:
NOM
RCOLD
2.815
3.266
changingthevalueofR
withrespecttoR .Increasing
RNOM
=
=
•RNTC at 25°C
•100k = 116k
NOM
NTC
R
will move both trip points to lower temperatures.
NOM
Likewise a decrease in R
with respect to R
will
NOM
NTC
move the trip points to higher temperatures. To calculate
for a shift to lower temperature for example, use
2.815
R
NOM
the following equation:
4085fc
19
LTC4085
APPLICATIONS INFORMATION
1. The WALL pin voltage exceeds V
4.25V); and
(approximately
(approximately
The nearest 1% value for R
is 115K. This is the value
WAR
NOM
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 44°C respectively. To ex-
tendthedeltabetweenthecoldandhottrippointsaresistor
2. The WALL pin voltage exceeds V
75mV above V
WDR
)
BAT
(R1) can be added in series with R . (see Figure 3b).
NTC
The input power path (between IN and OUT) is re-enabled
and the ACPR pin assumes a high impedance state when
either of the following conditions is met:
The values of the resistors are calculated as follows:
RCOLD –RHOT
2.815 – 0.4086
RNOM
=
1. The WALL pin voltage falls below V
(approximately
WDF
25mV above V ); or
0.4086
2.815 – 0.4086
⎛
⎝
⎞
BAT
R1=
• RCOLD –RHOT –R
HOT
(
)
⎜
⎟
⎠
2. The WALL pin voltage falls below V
3.12V)
(approximately
WAF
where R
COLD
is the value of the bias resistor, R
and
NOM
HOT
R
are the values of R
at the desired temperature
NTC
Each of these thresholds is suitably filtered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
trip points. Continuing the example from before with a
desired hot trip point of 50°C:
100k • 3.266 – 0.3602
RCOLD –RHOT
2.815 – 0.4086
(
)
Power Dissipation
RNOM
=
=
2.815 – 0.4086
The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part.Forhighchargecurrentsandawalladapterappliedto
= 120.8k, 121k nearest 1%
⎡
0.4086
2.815 – 0.4086
⎤
⎛
⎞
R1= 100k •
• 3.266 – 0.3602 – 0.3602
(
)
⎜
⎝
⎟
⎠
⎢
⎥
⎦
⎣
V
, the LTC4085 power dissipation is approximately:
OUT
= 13.3k, 13.3k is nearest 1%
P = (V
– V ) • I
BAT BAT
D
OUT
The final solution is as shown in Figure 3b where
= 121k, R1 = 13.3k and R = 100k at 25°C
Where, P is the power dissipated, V
is the supply
BAT
D
OUT
R
NOM
NTC
voltage, V is the battery voltage, and I is the battery
BAT
Using the WALL Pin to Detect the Presence of a Wall
Adapter
charge current. It is not necessary to perform any worst-
case power dissipation scenarios because the LTC4085
will automatically reduce the charge current to maintain
the die temperature at approximately 105°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:
The WALL input pin identifies the presence of a wall
adapter (the pin should be tied directly to the adapter
outputvoltage).Thisinformationisusedtodisconnectthe
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the ACPR pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfied:
T = 105°C – P • θ
A JA
D
T = 105°C – (V
A
– V ) • I • θ
BAT BAT JA
OUT
4085fc
20
LTC4085
APPLICATIONS INFORMATION
2
Example: Consider an LTC4085 operating from a wall
board. Correctly soldered to a 2500mm double-sided
adapter with 5V at V
providing 0.8A to a 3V Li-Ion
1oz. copper board the LTC4085 has a thermal resistance
of approximately 37°C/W. Failure to make thermal contact
between the Exposed Pad on the backside of the package
and the copper board will result in thermal resistances far
greater than 37°C/W. As an example, a correctly soldered
LTC4085 can deliver over 1A to a battery from a 5V supply
at room temperature. Without a backside thermal connec-
tion, this number could drop to less than 500mA.
OUT
battery. The ambient temperature above which the
LTC4085 will begin to reduce the 0.8A charge current, is
approximately
T = 105°C – (5V – 3V) • 0.8A • 37°C/W
A
T = 105°C – 1.6W • 37°C/W = 105°C – 59°C = 46°C
A
The LTC4085 can be used above 46°C, but the charge cur-
rent will be reduced below 0.8A. The charge current at a
given ambient temperature can be approximated by:
V and Wall Adapter Bypass Capacitor
IN
Many types of capacitors can be used for input bypassing.
However,cautionmustbeexercisedwhenusingmultilayer
ceramic capacitors. Because of the self resonant and high
Qcharacteristicsofsometypesofceramiccapacitors,high
voltage transients can be generated under some start-up
conditions, such as connecting the charger input to a hot
power source. For more information, refer to Application
Note 88.
105°C – TA
IBAT
=
V
OUT – VBAT • θ
(
)
JA
Consider the above example with an ambient temperature
of 55°C. The charge current will be reduced to approxi-
mately:
105°C – 55°C
50°C
IBAT
=
=
= 0.675A
Stability
5V – 3V • 37°C/W 74°C/A
(
)
Theconstant-voltagemodefeedbackloopisstablewithout
any compensation when a battery is connected. However,
a 4.7μF capacitor with a 1Ω series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
Board Layout Considerations
In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad on
the backside of the LTC4085 package is soldered to the
4085fc
21
LTC4085
TYPICAL APPLICATION
USB Power Control Application with Wall Adapter Input
5V WALL
ADAPTER
INPUT
TO LDOs
REGs, ETC
4.7μF
1Ω*
4.7μF
1k
510Ω 510Ω
5V (NOM)
OUT
FROM USB
IN
CABLE V
BUS
4.7μF
1Ω*
CHRG
ACPR
WALL
GATE
BAT
V
+
NTC
Li-Ion
CELL
R
NTCBIAS
LTC4085
10k
NTC
R
NTC
10k
SUSPEND USB POWER
500mA/100mA SELECT
SUSP
HPWR
TIMER
CLPROG
PROG
R
GND
0.15μF
*SERIES 1W RESISTOR ONLY
NEEDED FOR INDUCTIVE
INPUT SUPPLIES
R
PROG
CLPROG
4085 TA02
71.5k
2.1k
4085fc
22
LTC4085
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 0.05
3.30 0.05
1.70 0.05
3.60 0.05
2.20 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 0.10
4.00 0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 0.10
3.00 0.10
(2 SIDES)
1.70 0.10
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 s 45°
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4085fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4085
RELATED PARTS
PART NUMBER
Battery Chargers
LTC1733
DESCRIPTION
COMMENTS
Monolithic Lithium-Ion Linear Battery Charger
Lithium-Ion Linear Battery Charger in ThinSOT
Lithium-Ion Linear Battery Charger in ThinSOT
Switch Mode Lithium-Ion Battery Charger
Monolithic Lithium-Ion Battery Pulse Charger
Standalone Charger with Programmable Timer, Up to 1.5A Charge Current
Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed
™
LTC1734
LTC1734L
LTC4002
Low Current Version of LTC1734; 50mA ≤ I
≤ 180mA
CHRG
Standalone, 4.7V ≤ V ≤ 24 V, 500kHz Frequency, 3 Hour Charge Termination
IN
LTC4052
No Blocking Diode or External Power FET Required, ≤ 1.5A Charge Current
LTC4053
USB Compatible Monolithic Li-Ion Battery Charger Standalone Charger with Programmable Timer, Up to 1.25A Charge Current
LTC4054
Standalone Linear Li-Ion Battery Charger
with Integrated Pass Transistor in ThinSOT
Thermal Regulation Prevents Overheating, C/10 Termination,
C/10 Indicator, Up to 800mA Charge Current
LTC4057
LTC4058
LTC4059
Lithium-Ion Linear Battery Charger
Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package
C/10 Charge Termination, Battery Kelvin Sensing, 7% Charge Accuracy
2mm × 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output
Standalone 950mA Lithium-Ion Charger in DFN
900mA Linear Lithium-Ion Battery Charger
LTC4065/LTC4065A Standalone Li-Ion Battery Chargers in
4.2V, 0.6% Float Voltage, Up to 750mA Charge Current, 2mm × 2mm DFN,
“A” Version has ACPR Function.
2mm × 2mm DFN
LTC4411/LTC4412 Low Loss PowerPath Controller in ThinSOT
Automatic Switching Between DC Sources, Load Sharing,
Replaces ORing Diodes
Power Management
LTC3405/LTC3405A 300mA (I ), 1.5 MHz, Synchronous Step-Down 95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 20μA, I < 1μA,
Q SD
OUT
IN
OUT
DC/DC Converter
ThinSOT Package
LTC3406/LTC3406A 600mA (I ), 1.5 MHz, Synchronous Step-Down 95% Efficiency, V = 2.5V to 5.5V, V
= 0.6V, I = 20μA, I < 1μA,
Q SD
OUT
IN
OUT
OUT
OUT
DC/DC Converter
ThinSOT Package
LTC3411
LTC3440
LTC3455
LTC4055
LTC4066
1.25A (I ), 4 MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60μA, I < 1μA,
Q SD
OUT
IN
DC/DC Converter
MS10 Package
600mA (I ), 2 MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.5V to 5.5V, V
= 2.5V, I = 25μA, I < 1μA,
Q SD
OUT
IN
DC/DC Converter
MS Package
Dual DC/DC Converter with USB Power Manager
and Li-Ion Battery Charger
Seamless Transition Between Power Souces: USB, Wall Adapter and Battery;
95% Efficient DC/DC Conversion
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode, 4mm × 4mm QFN16 Package
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 50mΩ Ideal Diode, 4mm × 4mm QFN24 Package
ThinSOT is a trademark of Linear Technology Corporation.
4085fc
LT 1008 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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